i386.opt revision 1.6.2.2
1 ; Options for the IA-32 and AMD64 ports of the compiler. 2 3 ; Copyright (C) 2005-2016 Free Software Foundation, Inc. 4 ; 5 ; This file is part of GCC. 6 ; 7 ; GCC is free software; you can redistribute it and/or modify it under 8 ; the terms of the GNU General Public License as published by the Free 9 ; Software Foundation; either version 3, or (at your option) any later 10 ; version. 11 ; 12 ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13 ; WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 ; for more details. 16 ; 17 ; You should have received a copy of the GNU General Public License 18 ; along with GCC; see the file COPYING3. If not see 19 ; <http://www.gnu.org/licenses/>. 20 21 HeaderInclude 22 config/i386/i386-opts.h 23 24 ; Bit flags that specify the ISA we are compiling for. 25 Variable 26 HOST_WIDE_INT ix86_isa_flags = TARGET_64BIT_DEFAULT | TARGET_SUBTARGET_ISA_DEFAULT 27 28 ; A mask of ix86_isa_flags that includes bit X if X was set or cleared 29 ; on the command line. 30 Variable 31 HOST_WIDE_INT ix86_isa_flags_explicit 32 33 TargetVariable 34 int recip_mask = RECIP_MASK_DEFAULT 35 36 Variable 37 int recip_mask_explicit 38 39 TargetSave 40 int x_recip_mask_explicit 41 42 ;; Definitions to add to the cl_target_option structure 43 ;; -march= processor 44 TargetSave 45 unsigned char arch 46 47 ;; -mtune= processor 48 TargetSave 49 unsigned char tune 50 51 ;; -march= processor-string 52 TargetSave 53 const char *x_ix86_arch_string 54 55 ;; -mtune= processor-string 56 TargetSave 57 const char *x_ix86_tune_string 58 59 ;; CPU schedule model 60 TargetSave 61 unsigned char schedule 62 63 ;; True if processor has SSE prefetch instruction. 64 TargetSave 65 unsigned char prefetch_sse 66 67 ;; branch cost 68 TargetSave 69 unsigned char branch_cost 70 71 ;; which flags were passed by the user 72 TargetSave 73 HOST_WIDE_INT x_ix86_isa_flags_explicit 74 75 ;; which flags were passed by the user 76 Variable 77 int ix86_target_flags_explicit 78 79 ;; which flags were passed by the user 80 TargetSave 81 HOST_WIDE_INT x_ix86_target_flags_explicit 82 83 ;; whether -mtune was not specified 84 TargetSave 85 unsigned char tune_defaulted 86 87 ;; whether -march was specified 88 TargetSave 89 unsigned char arch_specified 90 91 ;; -mcmodel= model 92 TargetSave 93 enum cmodel x_ix86_cmodel 94 95 ;; -mabi= 96 TargetSave 97 enum calling_abi x_ix86_abi 98 99 ;; -masm= 100 TargetSave 101 enum asm_dialect x_ix86_asm_dialect 102 103 ;; -mbranch-cost= 104 TargetSave 105 int x_ix86_branch_cost 106 107 ;; -mdump-tune-features= 108 TargetSave 109 int x_ix86_dump_tunes 110 111 ;; -mstackrealign= 112 TargetSave 113 int x_ix86_force_align_arg_pointer 114 115 ;; -mforce-drap= 116 TargetSave 117 int x_ix86_force_drap 118 119 ;; -mincoming-stack-boundary= 120 TargetSave 121 int x_ix86_incoming_stack_boundary_arg 122 123 ;; -maddress-mode= 124 TargetSave 125 enum pmode x_ix86_pmode 126 127 ;; -mpreferred-stack-boundary= 128 TargetSave 129 int x_ix86_preferred_stack_boundary_arg 130 131 ;; -mrecip= 132 TargetSave 133 const char *x_ix86_recip_name 134 135 ;; -mregparm= 136 TargetSave 137 int x_ix86_regparm 138 139 ;; -mlarge-data-threshold= 140 TargetSave 141 int x_ix86_section_threshold 142 143 ;; -msse2avx= 144 TargetSave 145 int x_ix86_sse2avx 146 147 ;; -mstack-protector-guard= 148 TargetSave 149 enum stack_protector_guard x_ix86_stack_protector_guard 150 151 ;; -mstringop-strategy= 152 TargetSave 153 enum stringop_alg x_ix86_stringop_alg 154 155 ;; -mtls-dialect= 156 TargetSave 157 enum tls_dialect x_ix86_tls_dialect 158 159 ;; -mtune-ctrl= 160 TargetSave 161 const char *x_ix86_tune_ctrl_string 162 163 ;; -mmemcpy-strategy= 164 TargetSave 165 const char *x_ix86_tune_memcpy_strategy 166 167 ;; -mmemset-strategy= 168 TargetSave 169 const char *x_ix86_tune_memset_strategy 170 171 ;; -mno-default= 172 TargetSave 173 int x_ix86_tune_no_default 174 175 ;; -mveclibabi= 176 TargetSave 177 enum ix86_veclibabi x_ix86_veclibabi_type 178 179 ;; x86 options 180 m128bit-long-double 181 Target RejectNegative Report Mask(128BIT_LONG_DOUBLE) Save 182 sizeof(long double) is 16. 183 184 m80387 185 Target Report Mask(80387) Save 186 Use hardware fp. 187 188 m96bit-long-double 189 Target RejectNegative Report InverseMask(128BIT_LONG_DOUBLE) Save 190 sizeof(long double) is 12. 191 192 mlong-double-80 193 Target Report RejectNegative Negative(mlong-double-64) InverseMask(LONG_DOUBLE_64) Save 194 Use 80-bit long double. 195 196 mlong-double-64 197 Target Report RejectNegative Negative(mlong-double-128) Mask(LONG_DOUBLE_64) InverseMask(LONG_DOUBLE_128) Save 198 Use 64-bit long double. 199 200 mlong-double-128 201 Target Report RejectNegative Negative(mlong-double-80) Mask(LONG_DOUBLE_128) InverseMask(LONG_DOUBLE_64) Save 202 Use 128-bit long double. 203 204 maccumulate-outgoing-args 205 Target Report Mask(ACCUMULATE_OUTGOING_ARGS) Save 206 Reserve space for outgoing arguments in the function prologue. 207 208 malign-double 209 Target Report Mask(ALIGN_DOUBLE) Save 210 Align some doubles on dword boundary. 211 212 malign-functions= 213 Target RejectNegative Joined UInteger 214 Function starts are aligned to this power of 2. 215 216 malign-jumps= 217 Target RejectNegative Joined UInteger 218 Jump targets are aligned to this power of 2. 219 220 malign-loops= 221 Target RejectNegative Joined UInteger 222 Loop code aligned to this power of 2. 223 224 malign-stringops 225 Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS) Save 226 Align destination of the string operations. 227 228 malign-data= 229 Target RejectNegative Joined Var(ix86_align_data_type) Enum(ix86_align_data) Init(ix86_align_data_type_compat) 230 Use the given data alignment. 231 232 Enum 233 Name(ix86_align_data) Type(enum ix86_align_data) 234 Known data alignment choices (for use with the -malign-data= option): 235 236 EnumValue 237 Enum(ix86_align_data) String(compat) Value(ix86_align_data_type_compat) 238 239 EnumValue 240 Enum(ix86_align_data) String(abi) Value(ix86_align_data_type_abi) 241 242 EnumValue 243 Enum(ix86_align_data) String(cacheline) Value(ix86_align_data_type_cacheline) 244 245 march= 246 Target RejectNegative Joined Var(ix86_arch_string) 247 Generate code for given CPU. 248 249 masm= 250 Target RejectNegative Joined Enum(asm_dialect) Var(ix86_asm_dialect) Init(ASM_ATT) 251 Use given assembler dialect. 252 253 Enum 254 Name(asm_dialect) Type(enum asm_dialect) 255 Known assembler dialects (for use with the -masm-dialect= option): 256 257 EnumValue 258 Enum(asm_dialect) String(intel) Value(ASM_INTEL) 259 260 EnumValue 261 Enum(asm_dialect) String(att) Value(ASM_ATT) 262 263 mbranch-cost= 264 Target RejectNegative Joined UInteger Var(ix86_branch_cost) 265 Branches are this expensive (1-5, arbitrary units). 266 267 mlarge-data-threshold= 268 Target RejectNegative Joined UInteger Var(ix86_section_threshold) Init(DEFAULT_LARGE_SECTION_THRESHOLD) 269 Data greater than given threshold will go into .ldata section in x86-64 medium model. 270 271 mcmodel= 272 Target RejectNegative Joined Enum(cmodel) Var(ix86_cmodel) Init(CM_32) 273 Use given x86-64 code model. 274 275 Enum 276 Name(cmodel) Type(enum cmodel) 277 Known code models (for use with the -mcmodel= option): 278 279 EnumValue 280 Enum(cmodel) String(small) Value(CM_SMALL) 281 282 EnumValue 283 Enum(cmodel) String(medium) Value(CM_MEDIUM) 284 285 EnumValue 286 Enum(cmodel) String(large) Value(CM_LARGE) 287 288 EnumValue 289 Enum(cmodel) String(32) Value(CM_32) 290 291 EnumValue 292 Enum(cmodel) String(kernel) Value(CM_KERNEL) 293 294 maddress-mode= 295 Target RejectNegative Joined Enum(pmode) Var(ix86_pmode) Init(PMODE_SI) 296 Use given address mode. 297 298 Enum 299 Name(pmode) Type(enum pmode) 300 Known address mode (for use with the -maddress-mode= option): 301 302 EnumValue 303 Enum(pmode) String(short) Value(PMODE_SI) 304 305 EnumValue 306 Enum(pmode) String(long) Value(PMODE_DI) 307 308 mcpu= 309 Target RejectNegative Joined Undocumented Alias(mtune=) Warn(%<-mcpu=%> is deprecated; use %<-mtune=%> or %<-march=%> instead) 310 311 mfancy-math-387 312 Target RejectNegative Report InverseMask(NO_FANCY_MATH_387, USE_FANCY_MATH_387) Save 313 Generate sin, cos, sqrt for FPU. 314 315 mforce-drap 316 Target Report Var(ix86_force_drap) 317 Always use Dynamic Realigned Argument Pointer (DRAP) to realign stack. 318 319 mfp-ret-in-387 320 Target Report Mask(FLOAT_RETURNS) Save 321 Return values of functions in FPU registers. 322 323 mfpmath= 324 Target RejectNegative Joined Var(ix86_fpmath) Enum(fpmath_unit) Init(FPMATH_387) Save 325 Generate floating point mathematics using given instruction set. 326 327 Enum 328 Name(fpmath_unit) Type(enum fpmath_unit) 329 Valid arguments to -mfpmath=: 330 331 EnumValue 332 Enum(fpmath_unit) String(387) Value(FPMATH_387) 333 334 EnumValue 335 Enum(fpmath_unit) String(sse) Value(FPMATH_SSE) 336 337 EnumValue 338 Enum(fpmath_unit) String(387,sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 339 340 EnumValue 341 Enum(fpmath_unit) String(387+sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 342 343 EnumValue 344 Enum(fpmath_unit) String(sse,387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 345 346 EnumValue 347 Enum(fpmath_unit) String(sse+387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 348 349 EnumValue 350 Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 351 352 mhard-float 353 Target RejectNegative Mask(80387) Save 354 Use hardware fp. 355 356 mieee-fp 357 Target Report Mask(IEEE_FP) Save 358 Use IEEE math for fp comparisons. 359 360 minline-all-stringops 361 Target Report Mask(INLINE_ALL_STRINGOPS) Save 362 Inline all known string operations. 363 364 minline-stringops-dynamically 365 Target Report Mask(INLINE_STRINGOPS_DYNAMICALLY) Save 366 Inline memset/memcpy string operations, but perform inline version only for small blocks. 367 368 mintel-syntax 369 Target Undocumented Alias(masm=, intel, att) Warn(%<-mintel-syntax%> and %<-mno-intel-syntax%> are deprecated; use %<-masm=intel%> and %<-masm=att%> instead) 370 ;; Deprecated 371 372 mms-bitfields 373 Target Report Mask(MS_BITFIELD_LAYOUT) Save 374 Use native (MS) bitfield layout. 375 376 mno-align-stringops 377 Target RejectNegative Report Mask(NO_ALIGN_STRINGOPS) Undocumented Save 378 379 mno-fancy-math-387 380 Target RejectNegative Report Mask(NO_FANCY_MATH_387) Undocumented Save 381 382 mno-push-args 383 Target RejectNegative Report Mask(NO_PUSH_ARGS) Undocumented Save 384 385 mno-red-zone 386 Target RejectNegative Report Mask(NO_RED_ZONE) Undocumented Save 387 388 momit-leaf-frame-pointer 389 Target Report Mask(OMIT_LEAF_FRAME_POINTER) Save 390 Omit the frame pointer in leaf functions. 391 392 mpc32 393 Target RejectNegative Report 394 Set 80387 floating-point precision to 32-bit. 395 396 mpc64 397 Target RejectNegative Report 398 Set 80387 floating-point precision to 64-bit. 399 400 mpc80 401 Target RejectNegative Report 402 Set 80387 floating-point precision to 80-bit. 403 404 mpreferred-stack-boundary= 405 Target RejectNegative Joined UInteger Var(ix86_preferred_stack_boundary_arg) 406 Attempt to keep stack aligned to this power of 2. 407 408 mincoming-stack-boundary= 409 Target RejectNegative Joined UInteger Var(ix86_incoming_stack_boundary_arg) 410 Assume incoming stack aligned to this power of 2. 411 412 mpush-args 413 Target Report InverseMask(NO_PUSH_ARGS, PUSH_ARGS) Save 414 Use push instructions to save outgoing arguments. 415 416 mred-zone 417 Target RejectNegative Report InverseMask(NO_RED_ZONE, RED_ZONE) Save 418 Use red-zone in the x86-64 code. 419 420 mregparm= 421 Target RejectNegative Joined UInteger Var(ix86_regparm) 422 Number of registers used to pass integer arguments. 423 424 mrtd 425 Target Report Mask(RTD) Save 426 Alternate calling convention. 427 428 msoft-float 429 Target InverseMask(80387) Save 430 Do not use hardware fp. 431 432 msseregparm 433 Target RejectNegative Mask(SSEREGPARM) Save 434 Use SSE register passing conventions for SF and DF mode. 435 436 mstackrealign 437 Target Report Var(ix86_force_align_arg_pointer) Init(-1) 438 Realign stack in prologue. 439 440 mstack-arg-probe 441 Target Report Mask(STACK_PROBE) Save 442 Enable stack probing. 443 444 mmemcpy-strategy= 445 Target RejectNegative Joined Var(ix86_tune_memcpy_strategy) 446 Specify memcpy expansion strategy when expected size is known. 447 448 mmemset-strategy= 449 Target RejectNegative Joined Var(ix86_tune_memset_strategy) 450 Specify memset expansion strategy when expected size is known. 451 452 mstringop-strategy= 453 Target RejectNegative Joined Enum(stringop_alg) Var(ix86_stringop_alg) Init(no_stringop) 454 Chose strategy to generate stringop using. 455 456 Enum 457 Name(stringop_alg) Type(enum stringop_alg) 458 Valid arguments to -mstringop-strategy=: 459 460 EnumValue 461 Enum(stringop_alg) String(rep_byte) Value(rep_prefix_1_byte) 462 463 EnumValue 464 Enum(stringop_alg) String(libcall) Value(libcall) 465 466 EnumValue 467 Enum(stringop_alg) String(rep_4byte) Value(rep_prefix_4_byte) 468 469 EnumValue 470 Enum(stringop_alg) String(rep_8byte) Value(rep_prefix_8_byte) 471 472 EnumValue 473 Enum(stringop_alg) String(byte_loop) Value(loop_1_byte) 474 475 EnumValue 476 Enum(stringop_alg) String(loop) Value(loop) 477 478 EnumValue 479 Enum(stringop_alg) String(unrolled_loop) Value(unrolled_loop) 480 481 EnumValue 482 Enum(stringop_alg) String(vector_loop) Value(vector_loop) 483 484 mtls-dialect= 485 Target RejectNegative Joined Var(ix86_tls_dialect) Enum(tls_dialect) Init(TLS_DIALECT_GNU) 486 Use given thread-local storage dialect. 487 488 Enum 489 Name(tls_dialect) Type(enum tls_dialect) 490 Known TLS dialects (for use with the -mtls-dialect= option): 491 492 EnumValue 493 Enum(tls_dialect) String(gnu) Value(TLS_DIALECT_GNU) 494 495 EnumValue 496 Enum(tls_dialect) String(gnu2) Value(TLS_DIALECT_GNU2) 497 498 mtls-direct-seg-refs 499 Target Report Mask(TLS_DIRECT_SEG_REFS) 500 Use direct references against %gs when accessing tls data. 501 502 mtune= 503 Target RejectNegative Joined Var(ix86_tune_string) 504 Schedule code for given CPU. 505 506 mtune-ctrl= 507 Target RejectNegative Joined Var(ix86_tune_ctrl_string) 508 Fine grain control of tune features. 509 510 mno-default 511 Target RejectNegative Var(ix86_tune_no_default) Init(0) 512 Clear all tune features. 513 514 mdump-tune-features 515 Target RejectNegative Var(ix86_dump_tunes) Init(0) 516 517 miamcu 518 Target Report Mask(IAMCU) 519 Generate code that conforms to Intel MCU psABI. 520 521 mabi= 522 Target RejectNegative Joined Var(ix86_abi) Enum(calling_abi) Init(SYSV_ABI) 523 Generate code that conforms to the given ABI. 524 525 Enum 526 Name(calling_abi) Type(enum calling_abi) 527 Known ABIs (for use with the -mabi= option): 528 529 EnumValue 530 Enum(calling_abi) String(sysv) Value(SYSV_ABI) 531 532 EnumValue 533 Enum(calling_abi) String(ms) Value(MS_ABI) 534 535 mveclibabi= 536 Target RejectNegative Joined Var(ix86_veclibabi_type) Enum(ix86_veclibabi) Init(ix86_veclibabi_type_none) 537 Vector library ABI to use. 538 539 Enum 540 Name(ix86_veclibabi) Type(enum ix86_veclibabi) 541 Known vectorization library ABIs (for use with the -mveclibabi= option): 542 543 EnumValue 544 Enum(ix86_veclibabi) String(svml) Value(ix86_veclibabi_type_svml) 545 546 EnumValue 547 Enum(ix86_veclibabi) String(acml) Value(ix86_veclibabi_type_acml) 548 549 mvect8-ret-in-mem 550 Target Report Mask(VECT8_RETURNS) Save 551 Return 8-byte vectors in memory. 552 553 mrecip 554 Target Report Mask(RECIP) Save 555 Generate reciprocals instead of divss and sqrtss. 556 557 mrecip= 558 Target Report RejectNegative Joined Var(ix86_recip_name) 559 Control generation of reciprocal estimates. 560 561 mcld 562 Target Report Mask(CLD) Save 563 Generate cld instruction in the function prologue. 564 565 mvzeroupper 566 Target Report Mask(VZEROUPPER) Save 567 Generate vzeroupper instruction before a transfer of control flow out of 568 the function. 569 570 mstv 571 Target Report Mask(STV) Save 572 Disable Scalar to Vector optimization pass transforming 64-bit integer 573 computations into a vector ones. 574 575 mdispatch-scheduler 576 Target RejectNegative Var(flag_dispatch_scheduler) 577 Do dispatch scheduling if processor is bdver1, bdver2, bdver3, bdver4 578 or znver1 and Haifa scheduling is selected. 579 580 mprefer-avx128 581 Target Report Mask(PREFER_AVX128) SAVE 582 Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer. 583 584 ;; ISA support 585 586 m32 587 Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save 588 Generate 32bit i386 code. 589 590 m64 591 Target RejectNegative Negative(mx32) Report Mask(ABI_64) Var(ix86_isa_flags) Save 592 Generate 64bit x86-64 code. 593 594 mx32 595 Target RejectNegative Negative(m16) Report Mask(ABI_X32) Var(ix86_isa_flags) Save 596 Generate 32bit x86-64 code. 597 598 m16 599 Target RejectNegative Negative(m32) Report Mask(CODE16) InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save 600 Generate 16bit i386 code. 601 602 mmmx 603 Target Report Mask(ISA_MMX) Var(ix86_isa_flags) Save 604 Support MMX built-in functions. 605 606 m3dnow 607 Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) Save 608 Support 3DNow! built-in functions. 609 610 m3dnowa 611 Target Undocumented Mask(ISA_3DNOW_A) Var(ix86_isa_flags) Save 612 Support Athlon 3Dnow! built-in functions. 613 614 msse 615 Target Report Mask(ISA_SSE) Var(ix86_isa_flags) Save 616 Support MMX and SSE built-in functions and code generation. 617 618 msse2 619 Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) Save 620 Support MMX, SSE and SSE2 built-in functions and code generation. 621 622 msse3 623 Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) Save 624 Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation. 625 626 mssse3 627 Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) Save 628 Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation. 629 630 msse4.1 631 Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) Save 632 Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code generation. 633 634 msse4.2 635 Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save 636 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation. 637 638 msse4 639 Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save 640 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation. 641 642 mno-sse4 643 Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save 644 Do not support SSE4.1 and SSE4.2 built-in functions and code generation. 645 646 msse5 647 Target Undocumented Alias(mavx) Warn(%<-msse5%> was removed) 648 ;; Deprecated 649 650 mavx 651 Target Report Mask(ISA_AVX) Var(ix86_isa_flags) Save 652 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation. 653 654 mavx2 655 Target Report Mask(ISA_AVX2) Var(ix86_isa_flags) Save 656 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and AVX2 built-in functions and code generation. 657 658 mavx512f 659 Target Report Mask(ISA_AVX512F) Var(ix86_isa_flags) Save 660 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation. 661 662 mavx512pf 663 Target Report Mask(ISA_AVX512PF) Var(ix86_isa_flags) Save 664 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512PF built-in functions and code generation. 665 666 mavx512er 667 Target Report Mask(ISA_AVX512ER) Var(ix86_isa_flags) Save 668 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512ER built-in functions and code generation. 669 670 mavx512cd 671 Target Report Mask(ISA_AVX512CD) Var(ix86_isa_flags) Save 672 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512CD built-in functions and code generation. 673 674 mavx512dq 675 Target Report Mask(ISA_AVX512DQ) Var(ix86_isa_flags) Save 676 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512DQ built-in functions and code generation. 677 678 mavx512bw 679 Target Report Mask(ISA_AVX512BW) Var(ix86_isa_flags) Save 680 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512BW built-in functions and code generation. 681 682 mavx512vl 683 Target Report Mask(ISA_AVX512VL) Var(ix86_isa_flags) Save 684 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VL built-in functions and code generation. 685 686 mavx512ifma 687 Target Report Mask(ISA_AVX512IFMA) Var(ix86_isa_flags) Save 688 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512IFMA built-in functions and code generation. 689 690 mavx512vbmi 691 Target Report Mask(ISA_AVX512VBMI) Var(ix86_isa_flags) Save 692 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VBMI built-in functions and code generation. 693 694 mfma 695 Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save 696 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation. 697 698 msse4a 699 Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) Save 700 Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation. 701 702 mfma4 703 Target Report Mask(ISA_FMA4) Var(ix86_isa_flags) Save 704 Support FMA4 built-in functions and code generation. 705 706 mxop 707 Target Report Mask(ISA_XOP) Var(ix86_isa_flags) Save 708 Support XOP built-in functions and code generation. 709 710 mlwp 711 Target Report Mask(ISA_LWP) Var(ix86_isa_flags) Save 712 Support LWP built-in functions and code generation. 713 714 mabm 715 Target Report Mask(ISA_ABM) Var(ix86_isa_flags) Save 716 Support code generation of Advanced Bit Manipulation (ABM) instructions. 717 718 mpopcnt 719 Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) Save 720 Support code generation of popcnt instruction. 721 722 mbmi 723 Target Report Mask(ISA_BMI) Var(ix86_isa_flags) Save 724 Support BMI built-in functions and code generation. 725 726 mbmi2 727 Target Report Mask(ISA_BMI2) Var(ix86_isa_flags) Save 728 Support BMI2 built-in functions and code generation. 729 730 mlzcnt 731 Target Report Mask(ISA_LZCNT) Var(ix86_isa_flags) Save 732 Support LZCNT built-in function and code generation. 733 734 mhle 735 Target Report Mask(ISA_HLE) Var(ix86_isa_flags) Save 736 Support Hardware Lock Elision prefixes. 737 738 mrdseed 739 Target Report Mask(ISA_RDSEED) Var(ix86_isa_flags) Save 740 Support RDSEED instruction. 741 742 mprfchw 743 Target Report Mask(ISA_PRFCHW) Var(ix86_isa_flags) Save 744 Support PREFETCHW instruction. 745 746 madx 747 Target Report Mask(ISA_ADX) Var(ix86_isa_flags) Save 748 Support flag-preserving add-carry instructions. 749 750 mclflushopt 751 Target Report Mask(ISA_CLFLUSHOPT) Var(ix86_isa_flags) Save 752 Support CLFLUSHOPT instructions. 753 754 mclwb 755 Target Report Mask(ISA_CLWB) Var(ix86_isa_flags) Save 756 Support CLWB instruction. 757 758 mpcommit 759 Target Undocumented Warn(%<-mpcommit%> was deprecated) 760 ;; Deprecated 761 762 mfxsr 763 Target Report Mask(ISA_FXSR) Var(ix86_isa_flags) Save 764 Support FXSAVE and FXRSTOR instructions. 765 766 mxsave 767 Target Report Mask(ISA_XSAVE) Var(ix86_isa_flags) Save 768 Support XSAVE and XRSTOR instructions. 769 770 mxsaveopt 771 Target Report Mask(ISA_XSAVEOPT) Var(ix86_isa_flags) Save 772 Support XSAVEOPT instruction. 773 774 mxsavec 775 Target Report Mask(ISA_XSAVEC) Var(ix86_isa_flags) Save 776 Support XSAVEC instructions. 777 778 mxsaves 779 Target Report Mask(ISA_XSAVES) Var(ix86_isa_flags) Save 780 Support XSAVES and XRSTORS instructions. 781 782 mtbm 783 Target Report Mask(ISA_TBM) Var(ix86_isa_flags) Save 784 Support TBM built-in functions and code generation. 785 786 mcx16 787 Target Report Mask(ISA_CX16) Var(ix86_isa_flags) Save 788 Support code generation of cmpxchg16b instruction. 789 790 msahf 791 Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) Save 792 Support code generation of sahf instruction in 64bit x86-64 code. 793 794 mmovbe 795 Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags) Save 796 Support code generation of movbe instruction. 797 798 mcrc32 799 Target Report Mask(ISA_CRC32) Var(ix86_isa_flags) Save 800 Support code generation of crc32 instruction. 801 802 maes 803 Target Report Mask(ISA_AES) Var(ix86_isa_flags) Save 804 Support AES built-in functions and code generation. 805 806 msha 807 Target Report Mask(ISA_SHA) Var(ix86_isa_flags) Save 808 Support SHA1 and SHA256 built-in functions and code generation. 809 810 mpclmul 811 Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) Save 812 Support PCLMUL built-in functions and code generation. 813 814 msse2avx 815 Target Report Var(ix86_sse2avx) 816 Encode SSE instructions with VEX prefix. 817 818 mfsgsbase 819 Target Report Mask(ISA_FSGSBASE) Var(ix86_isa_flags) Save 820 Support FSGSBASE built-in functions and code generation. 821 822 mrdrnd 823 Target Report Mask(ISA_RDRND) Var(ix86_isa_flags) Save 824 Support RDRND built-in functions and code generation. 825 826 mf16c 827 Target Report Mask(ISA_F16C) Var(ix86_isa_flags) Save 828 Support F16C built-in functions and code generation. 829 830 mprefetchwt1 831 Target Report Mask(ISA_PREFETCHWT1) Var(ix86_isa_flags) Save 832 Support PREFETCHWT1 built-in functions and code generation. 833 834 mfentry 835 Target Report Var(flag_fentry) Init(-1) 836 Emit profiling counter call at function entry before prologue. 837 838 mrecord-mcount 839 Target Report Var(flag_record_mcount) Init(0) 840 Generate __mcount_loc section with all mcount or __fentry__ calls. 841 842 mnop-mcount 843 Target Report Var(flag_nop_mcount) Init(0) 844 Generate mcount/__fentry__ calls as nops. To activate they need to be 845 patched in. 846 847 mskip-rax-setup 848 Target Report Var(flag_skip_rax_setup) Init(0) 849 Skip setting up RAX register when passing variable arguments. 850 851 m8bit-idiv 852 Target Report Mask(USE_8BIT_IDIV) Save 853 Expand 32bit/64bit integer divide into 8bit unsigned integer divide with run-time check. 854 855 mavx256-split-unaligned-load 856 Target Report Mask(AVX256_SPLIT_UNALIGNED_LOAD) Save 857 Split 32-byte AVX unaligned load. 858 859 mavx256-split-unaligned-store 860 Target Report Mask(AVX256_SPLIT_UNALIGNED_STORE) Save 861 Split 32-byte AVX unaligned store. 862 863 mrtm 864 Target Report Mask(ISA_RTM) Var(ix86_isa_flags) Save 865 Support RTM built-in functions and code generation. 866 867 mmpx 868 Target Report Mask(ISA_MPX) Var(ix86_isa_flags) Save 869 Support MPX code generation. 870 871 mmwaitx 872 Target Report Mask(ISA_MWAITX) Var(ix86_isa_flags) Save 873 Support MWAITX and MONITORX built-in functions and code generation. 874 875 mclzero 876 Target Report Mask(ISA_CLZERO) Var(ix86_isa_flags) Save 877 Support CLZERO built-in functions and code generation. 878 879 mpku 880 Target Report Mask(ISA_PKU) Var(ix86_isa_flags) Save 881 Support PKU built-in functions and code generation. 882 883 mstack-protector-guard= 884 Target RejectNegative Joined Enum(stack_protector_guard) Var(ix86_stack_protector_guard) Init(SSP_TLS) 885 Use given stack-protector guard. 886 887 Enum 888 Name(stack_protector_guard) Type(enum stack_protector_guard) 889 Known stack protector guard (for use with the -mstack-protector-guard= option): 890 891 EnumValue 892 Enum(stack_protector_guard) String(tls) Value(SSP_TLS) 893 894 EnumValue 895 Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL) 896 897 mmitigate-rop 898 Target Var(flag_mitigate_rop) Init(0) 899 Attempt to avoid generating instruction sequences containing ret bytes. 900 901 mindirect-branch= 902 Target Report RejectNegative Joined Enum(indirect_branch) Var(ix86_indirect_branch) Init(indirect_branch_keep) 903 Convert indirect call and jump to call and return thunks. 904 905 mfunction-return= 906 Target Report RejectNegative Joined Enum(indirect_branch) Var(ix86_function_return) Init(indirect_branch_keep) 907 Convert function return to call and return thunk. 908 909 Enum 910 Name(indirect_branch) Type(enum indirect_branch) 911 Known indirect branch choices (for use with the -mindirect-branch=/-mfunction-return= options): 912 913 EnumValue 914 Enum(indirect_branch) String(keep) Value(indirect_branch_keep) 915 916 EnumValue 917 Enum(indirect_branch) String(thunk) Value(indirect_branch_thunk) 918 919 EnumValue 920 Enum(indirect_branch) String(thunk-inline) Value(indirect_branch_thunk_inline) 921 922 EnumValue 923 Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern) 924 925 mindirect-branch-register 926 Target Report Var(ix86_indirect_branch_register) Init(0) 927 Force indirect call and jump via register. 928
Indexes created Tue May 05 00:25:04 UTC 2026