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      1 /* LoongArch definitions.
      2    Copyright (C) 2021-2022 Free Software Foundation, Inc.
      3    Contributed by Loongson Ltd.
      4 
      5 This file is part of GCC.
      6 
      7 GCC is free software; you can redistribute it and/or modify
      8 it under the terms of the GNU General Public License as published by
      9 the Free Software Foundation; either version 3, or (at your option)
     10 any later version.
     11 
     12 GCC is distributed in the hope that it will be useful,
     13 but WITHOUT ANY WARRANTY; without even the implied warranty of
     14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     15 GNU General Public License for more details.
     16 
     17 You should have received a copy of the GNU General Public License
     18 along with GCC; see the file COPYING3.  If not see
     19 <http://www.gnu.org/licenses/>.  */
     20 
     21 /* Definition of standard codes for:
     22     - base architecture types	(isa_base),
     23     - ISA extensions		(isa_ext),
     24     - base ABI types		(abi_base),
     25     - ABI extension types	(abi_ext).
     26 
     27     - code models		      (cmodel)
     28     - other command-line switches     (switch)
     29 
     30    These values are primarily used for implementing option handling
     31    logic in "loongarch.opt", "loongarch-driver.c" and "loongarch-opt.c".
     32 
     33    As for the result of this option handling process, the following
     34    scheme is adopted to represent the final configuration:
     35 
     36     - The target ABI is encoded with a tuple (abi_base, abi_ext)
     37       using the code defined below.
     38 
     39     - The target ISA is encoded with a "struct loongarch_isa" defined
     40       in loongarch-cpu.h.
     41 
     42     - The target microarchitecture is represented with a cpu model
     43       index defined in loongarch-cpu.h.
     44 */
     45 
     46 #ifndef LOONGARCH_DEF_H
     47 #define LOONGARCH_DEF_H
     48 
     49 #include "loongarch-tune.h"
     50 
     51 #ifdef __cplusplus
     52 extern "C" {
     53 #endif
     54 
     55 /* enum isa_base */
     56 extern const char* loongarch_isa_base_strings[];
     57 #define ISA_BASE_LA64V100     0
     58 #define N_ISA_BASE_TYPES      1
     59 
     60 /* enum isa_ext_* */
     61 extern const char* loongarch_isa_ext_strings[];
     62 #define ISA_EXT_NOFPU	      0
     63 #define ISA_EXT_FPU32	      1
     64 #define ISA_EXT_FPU64	      2
     65 #define N_ISA_EXT_FPU_TYPES   3
     66 #define N_ISA_EXT_TYPES	      3
     67 
     68 /* enum abi_base */
     69 extern const char* loongarch_abi_base_strings[];
     70 #define ABI_BASE_LP64D	      0
     71 #define ABI_BASE_LP64F	      1
     72 #define ABI_BASE_LP64S	      2
     73 #define N_ABI_BASE_TYPES      3
     74 
     75 /* enum abi_ext */
     76 extern const char* loongarch_abi_ext_strings[];
     77 #define ABI_EXT_BASE	      0
     78 #define N_ABI_EXT_TYPES	      1
     79 
     80 /* enum cmodel */
     81 extern const char* loongarch_cmodel_strings[];
     82 #define CMODEL_NORMAL	      0
     83 #define CMODEL_TINY	      1
     84 #define CMODEL_TINY_STATIC    2
     85 #define CMODEL_LARGE	      3
     86 #define CMODEL_EXTREME	      4
     87 #define N_CMODEL_TYPES	      5
     88 
     89 /* enum switches */
     90 /* The "SW_" codes represent command-line switches (options that
     91    accept no parameters). Definition for other switches that affects
     92    the target ISA / ABI configuration will also be appended here
     93    in the future.  */
     94 
     95 extern const char* loongarch_switch_strings[];
     96 #define SW_SOFT_FLOAT	      0
     97 #define SW_SINGLE_FLOAT	      1
     98 #define SW_DOUBLE_FLOAT	      2
     99 #define N_SWITCH_TYPES	      3
    100 
    101 /* The common default value for variables whose assignments
    102    are triggered by command-line options.  */
    103 
    104 #define M_OPTION_NOT_SEEN -1
    105 #define M_OPT_ABSENT(opt_enum)  ((opt_enum) == M_OPTION_NOT_SEEN)
    106 
    107 
    108 /* Internal representation of the target.  */
    109 struct loongarch_isa
    110 {
    111   unsigned char base;	    /* ISA_BASE_ */
    112   unsigned char fpu;	    /* ISA_EXT_FPU_ */
    113 };
    114 
    115 struct loongarch_abi
    116 {
    117   unsigned char base;	    /* ABI_BASE_ */
    118   unsigned char ext;	    /* ABI_EXT_ */
    119 };
    120 
    121 struct loongarch_target
    122 {
    123   struct loongarch_isa isa;
    124   struct loongarch_abi abi;
    125   unsigned char cpu_arch;   /* CPU_ */
    126   unsigned char cpu_tune;   /* same */
    127   unsigned char cpu_native; /* same */
    128   unsigned char cmodel;	    /* CMODEL_ */
    129 };
    130 
    131 /* CPU properties.  */
    132 /* index */
    133 #define CPU_NATIVE	  0
    134 #define CPU_LOONGARCH64	  1
    135 #define CPU_LA464	  2
    136 #define N_ARCH_TYPES	  3
    137 #define N_TUNE_TYPES	  3
    138 
    139 /* parallel tables.  */
    140 extern const char* loongarch_cpu_strings[];
    141 extern struct loongarch_isa loongarch_cpu_default_isa[];
    142 extern int loongarch_cpu_issue_rate[];
    143 extern int loongarch_cpu_multipass_dfa_lookahead[];
    144 
    145 extern struct loongarch_cache loongarch_cpu_cache[];
    146 extern struct loongarch_rtx_cost_data loongarch_cpu_rtx_cost_data[];
    147 
    148 #ifdef __cplusplus
    149 }
    150 #endif
    151 #endif /* LOONGARCH_DEF_H */
    152