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      1 ;; Scheduling description for PowerPC A2 processors.
      2 ;; Copyright (C) 2009-2022 Free Software Foundation, Inc.
      3 ;; Contributed by Ben Elliston (bje (a] au.ibm.com)
      4 
      5 ;; This file is part of GCC.
      6 
      7 ;; GCC is free software; you can redistribute it and/or modify it
      8 ;; under the terms of the GNU General Public License as published
      9 ;; by the Free Software Foundation; either version 3, or (at your
     10 ;; option) any later version.
     11 
     12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
     13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
     14 ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
     15 ;; License for more details.
     16 
     17 ;; You should have received a copy of the GNU General Public License
     18 ;; along with GCC; see the file COPYING3.  If not see
     19 ;; <http://www.gnu.org/licenses/>.
     20 
     21 (define_automaton "ppca2")
     22 
     23 ;; CPU units
     24 
     25 ;; The multiplier pipeline.
     26 (define_cpu_unit "mult" "ppca2")
     27 
     28 ;; The auxiliary processor unit (FP/vector unit).
     29 (define_cpu_unit "axu" "ppca2")
     30 
     31 ;; D.4.6
     32 ;; Some peculiarities for certain SPRs
     33 
     34 (define_insn_reservation "ppca2-mfcr" 1
     35   (and (eq_attr "type" "mfcr")
     36        (eq_attr "cpu" "ppca2"))
     37    "nothing")
     38 
     39 (define_insn_reservation "ppca2-mfjmpr" 5
     40   (and (eq_attr "type" "mfjmpr")
     41        (eq_attr "cpu" "ppca2"))
     42   "nothing")
     43 
     44 (define_insn_reservation "ppca2-mtjmpr" 5
     45   (and (eq_attr "type" "mtjmpr")
     46        (eq_attr "cpu" "ppca2"))
     47   "nothing")
     48 
     49 ;; D.4.8
     50 (define_insn_reservation "ppca2-imul" 1
     51   (and (eq_attr "type" "mul")
     52        (eq_attr "size" "8,16,32")
     53        (eq_attr "cpu" "ppca2"))
     54   "nothing")
     55 
     56 ;; FIXME: latency and multiplier reservation for 64-bit multiply?
     57 (define_insn_reservation "ppca2-lmul" 6
     58   (and (eq_attr "type" "mul")
     59        (eq_attr "size" "64")
     60        (eq_attr "cpu" "ppca2"))
     61   "mult*3")
     62 
     63 ;; D.4.9
     64 (define_insn_reservation "ppca2-idiv" 32
     65   (and (eq_attr "type" "div")
     66        (eq_attr "size" "32")
     67        (eq_attr "cpu" "ppca2"))
     68   "mult*32")
     69 
     70 (define_insn_reservation "ppca2-ldiv" 65
     71   (and (eq_attr "type" "div")
     72        (eq_attr "size" "64")
     73        (eq_attr "cpu" "ppca2"))
     74   "mult*65")
     75 
     76 ;; D.4.13
     77 (define_insn_reservation "ppca2-load" 5
     78   (and (eq_attr "type" "load")
     79        (eq_attr "cpu" "ppca2"))
     80   "nothing")
     81 
     82 ;; D.8.1
     83 (define_insn_reservation "ppca2-fp" 6
     84   (and (eq_attr "type" "fp,fpsimple")
     85        (eq_attr "cpu" "ppca2"))
     86   "axu")
     87 
     88 ;; D.8.4
     89 (define_insn_reservation "ppca2-fp-load" 6
     90   (and (eq_attr "type" "fpload")
     91        (eq_attr "cpu" "ppca2"))
     92   "axu")
     93 
     94 ;; D.8.5
     95 (define_insn_reservation "ppca2-fp-store" 2
     96   (and (eq_attr "type" "fpstore")
     97        (eq_attr "cpu" "ppca2"))
     98   "axu")
     99 
    100 ;; D.8.6
    101 (define_insn_reservation "ppca2-fpcompare" 5
    102   (and (eq_attr "type" "fpcompare")
    103        (eq_attr "cpu" "ppca2"))
    104  "axu")
    105 
    106 ;; D.8.7
    107 ;;
    108 ;; Instructions from the same thread succeeding the floating-point
    109 ;; divide cannot be executed until the floating-point divide has
    110 ;; completed.  Since there is nothing else we can do, this thread will
    111 ;; just have to stall.
    112 
    113 (define_insn_reservation "ppca2-ddiv" 72
    114   (and (eq_attr "type" "ddiv")
    115        (eq_attr "cpu" "ppca2"))
    116    "axu")
    117 
    118 (define_insn_reservation "ppca2-sdiv" 59
    119   (and (eq_attr "type" "sdiv")
    120        (eq_attr "cpu" "ppca2"))
    121    "axu")
    122 
    123 ;; D.8.8
    124 ;; 
    125 ;; Instructions from the same thread succeeding the floating-point
    126 ;; divide cannot be executed until the floating-point divide has
    127 ;; completed.  Since there is nothing else we can do, this thread will
    128 ;; just have to stall.
    129 
    130 (define_insn_reservation "ppca2-dsqrt" 69
    131   (and (eq_attr "type" "dsqrt")
    132        (eq_attr "cpu" "ppca2"))
    133   "axu")
    134 
    135 (define_insn_reservation "ppca2-ssqrt" 65
    136   (and (eq_attr "type" "ssqrt")
    137        (eq_attr "cpu" "ppca2"))
    138   "axu")
    139