a2.md revision 1.1.1.1.8.2
1 1.1.1.1.8.2 tls ;; Scheduling description for PowerPC A2 processors. 2 1.1.1.1.8.2 tls ;; Copyright (C) 2009 Free Software Foundation, Inc. 3 1.1.1.1.8.2 tls ;; Contributed by Ben Elliston (bje (a] au.ibm.com) 4 1.1.1.1.8.2 tls 5 1.1.1.1.8.2 tls ;; This file is part of GCC. 6 1.1.1.1.8.2 tls 7 1.1.1.1.8.2 tls ;; GCC is free software; you can redistribute it and/or modify it 8 1.1.1.1.8.2 tls ;; under the terms of the GNU General Public License as published 9 1.1.1.1.8.2 tls ;; by the Free Software Foundation; either version 3, or (at your 10 1.1.1.1.8.2 tls ;; option) any later version. 11 1.1.1.1.8.2 tls 12 1.1.1.1.8.2 tls ;; GCC is distributed in the hope that it will be useful, but WITHOUT 13 1.1.1.1.8.2 tls ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 1.1.1.1.8.2 tls ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 1.1.1.1.8.2 tls ;; License for more details. 16 1.1.1.1.8.2 tls 17 1.1.1.1.8.2 tls ;; You should have received a copy of the GNU General Public License 18 1.1.1.1.8.2 tls ;; along with GCC; see the file COPYING3. If not see 19 1.1.1.1.8.2 tls ;; <http://www.gnu.org/licenses/>. 20 1.1.1.1.8.2 tls 21 1.1.1.1.8.2 tls (define_automaton "ppca2") 22 1.1.1.1.8.2 tls 23 1.1.1.1.8.2 tls ;; CPU units 24 1.1.1.1.8.2 tls 25 1.1.1.1.8.2 tls ;; The multiplier pipeline. 26 1.1.1.1.8.2 tls (define_cpu_unit "mult" "ppca2") 27 1.1.1.1.8.2 tls 28 1.1.1.1.8.2 tls ;; The auxillary processor unit (FP/vector unit). 29 1.1.1.1.8.2 tls (define_cpu_unit "axu" "ppca2") 30 1.1.1.1.8.2 tls 31 1.1.1.1.8.2 tls ;; D.4.6 32 1.1.1.1.8.2 tls ;; Some peculiarities for certain SPRs 33 1.1.1.1.8.2 tls 34 1.1.1.1.8.2 tls (define_insn_reservation "ppca2-mfcr" 1 35 1.1.1.1.8.2 tls (and (eq_attr "type" "mfcr") 36 1.1.1.1.8.2 tls (eq_attr "cpu" "ppca2")) 37 1.1.1.1.8.2 tls "nothing") 38 1.1.1.1.8.2 tls 39 1.1.1.1.8.2 tls (define_insn_reservation "ppca2-mfjmpr" 5 40 1.1.1.1.8.2 tls (and (eq_attr "type" "mfjmpr") 41 1.1.1.1.8.2 tls (eq_attr "cpu" "ppca2")) 42 1.1.1.1.8.2 tls "nothing") 43 1.1.1.1.8.2 tls 44 1.1.1.1.8.2 tls (define_insn_reservation "ppca2-mtjmpr" 5 45 1.1.1.1.8.2 tls (and (eq_attr "type" "mtjmpr") 46 1.1.1.1.8.2 tls (eq_attr "cpu" "ppca2")) 47 1.1.1.1.8.2 tls "nothing") 48 1.1.1.1.8.2 tls 49 1.1.1.1.8.2 tls ;; D.4.8 50 1.1.1.1.8.2 tls (define_insn_reservation "ppca2-imul" 1 51 1.1.1.1.8.2 tls (and (eq_attr "type" "imul,imul2,imul3,imul_compare") 52 1.1.1.1.8.2 tls (eq_attr "cpu" "ppca2")) 53 1.1.1.1.8.2 tls "nothing") 54 1.1.1.1.8.2 tls 55 1.1.1.1.8.2 tls ;; FIXME: latency and multiplier reservation for 64-bit multiply? 56 1.1.1.1.8.2 tls (define_insn_reservation "ppca2-lmul" 6 57 1.1.1.1.8.2 tls (and (eq_attr "type" "lmul,lmul_compare") 58 1.1.1.1.8.2 tls (eq_attr "cpu" "ppca2")) 59 1.1.1.1.8.2 tls "mult*3") 60 1.1.1.1.8.2 tls 61 1.1.1.1.8.2 tls ;; D.4.9 62 1.1.1.1.8.2 tls (define_insn_reservation "ppca2-idiv" 32 63 1.1.1.1.8.2 tls (and (eq_attr "type" "idiv") 64 1.1.1.1.8.2 tls (eq_attr "cpu" "ppca2")) 65 1.1.1.1.8.2 tls "mult*32") 66 1.1.1.1.8.2 tls 67 1.1.1.1.8.2 tls (define_insn_reservation "ppca2-ldiv" 65 68 1.1.1.1.8.2 tls (and (eq_attr "type" "ldiv") 69 1.1.1.1.8.2 tls (eq_attr "cpu" "ppca2")) 70 1.1.1.1.8.2 tls "mult*65") 71 1.1.1.1.8.2 tls 72 1.1.1.1.8.2 tls ;; D.4.13 73 1.1.1.1.8.2 tls (define_insn_reservation "ppca2-load" 5 74 1.1.1.1.8.2 tls (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u") 75 1.1.1.1.8.2 tls (eq_attr "cpu" "ppca2")) 76 1.1.1.1.8.2 tls "nothing") 77 1.1.1.1.8.2 tls 78 1.1.1.1.8.2 tls ;; D.8.1 79 1.1.1.1.8.2 tls (define_insn_reservation "ppca2-fp" 6 80 1.1.1.1.8.2 tls (and (eq_attr "type" "fp") ;; Ignore fpsimple insn types (SPE only). 81 1.1.1.1.8.2 tls (eq_attr "cpu" "ppca2")) 82 1.1.1.1.8.2 tls "axu") 83 1.1.1.1.8.2 tls 84 1.1.1.1.8.2 tls ;; D.8.4 85 1.1.1.1.8.2 tls (define_insn_reservation "ppca2-fp-load" 6 86 1.1.1.1.8.2 tls (and (eq_attr "type" "fpload,fpload_u,fpload_ux") 87 1.1.1.1.8.2 tls (eq_attr "cpu" "ppca2")) 88 1.1.1.1.8.2 tls "axu") 89 1.1.1.1.8.2 tls 90 1.1.1.1.8.2 tls ;; D.8.5 91 1.1.1.1.8.2 tls (define_insn_reservation "ppca2-fp-store" 2 92 1.1.1.1.8.2 tls (and (eq_attr "type" "fpstore,fpstore_u,fpstore_ux") 93 1.1.1.1.8.2 tls (eq_attr "cpu" "ppca2")) 94 1.1.1.1.8.2 tls "axu") 95 1.1.1.1.8.2 tls 96 1.1.1.1.8.2 tls ;; D.8.6 97 1.1.1.1.8.2 tls (define_insn_reservation "ppca2-fpcompare" 5 98 1.1.1.1.8.2 tls (and (eq_attr "type" "fpcompare") 99 1.1.1.1.8.2 tls (eq_attr "cpu" "ppca2")) 100 1.1.1.1.8.2 tls "axu") 101 1.1.1.1.8.2 tls 102 1.1.1.1.8.2 tls ;; D.8.7 103 1.1.1.1.8.2 tls ;; 104 1.1.1.1.8.2 tls ;; Instructions from the same thread succeeding the floating-point 105 1.1.1.1.8.2 tls ;; divide cannot be executed until the floating-point divide has 106 1.1.1.1.8.2 tls ;; completed. Since there is nothing else we can do, this thread will 107 1.1.1.1.8.2 tls ;; just have to stall. 108 1.1.1.1.8.2 tls 109 1.1.1.1.8.2 tls (define_insn_reservation "ppca2-ddiv" 72 110 1.1.1.1.8.2 tls (and (eq_attr "type" "ddiv") 111 1.1.1.1.8.2 tls (eq_attr "cpu" "ppca2")) 112 1.1.1.1.8.2 tls "axu") 113 1.1.1.1.8.2 tls 114 1.1.1.1.8.2 tls (define_insn_reservation "ppca2-sdiv" 59 115 1.1.1.1.8.2 tls (and (eq_attr "type" "sdiv") 116 1.1.1.1.8.2 tls (eq_attr "cpu" "ppca2")) 117 1.1.1.1.8.2 tls "axu") 118 1.1.1.1.8.2 tls 119 1.1.1.1.8.2 tls ;; D.8.8 120 1.1.1.1.8.2 tls ;; 121 1.1.1.1.8.2 tls ;; Instructions from the same thread succeeding the floating-point 122 1.1.1.1.8.2 tls ;; divide cannot be executed until the floating-point divide has 123 1.1.1.1.8.2 tls ;; completed. Since there is nothing else we can do, this thread will 124 1.1.1.1.8.2 tls ;; just have to stall. 125 1.1.1.1.8.2 tls 126 1.1.1.1.8.2 tls (define_insn_reservation "ppca2-dsqrt" 69 127 1.1.1.1.8.2 tls (and (eq_attr "type" "dsqrt") 128 1.1.1.1.8.2 tls (eq_attr "cpu" "ppca2")) 129 1.1.1.1.8.2 tls "axu") 130 1.1.1.1.8.2 tls 131 1.1.1.1.8.2 tls (define_insn_reservation "ppca2-ssqrt" 65 132 1.1.1.1.8.2 tls (and (eq_attr "type" "ssqrt") 133 1.1.1.1.8.2 tls (eq_attr "cpu" "ppca2")) 134 1.1.1.1.8.2 tls "axu") 135
Indexes created Sun Apr 12 00:22:20 UTC 2026