1 /* Power ISA 3.0 atomic memory operation include file. 2 Copyright (C) 2017-2022 Free Software Foundation, Inc. 3 Contributed by Michael Meissner <meissner (at) linux.vnet.ibm.com>. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published 9 by the Free Software Foundation; either version 3, or (at your 10 option) any later version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 License for more details. 16 17 Under Section 7 of GPL version 3, you are granted additional 18 permissions described in the GCC Runtime Library Exception, version 19 3.1, as published by the Free Software Foundation. 20 21 You should have received a copy of the GNU General Public License and 22 a copy of the GCC Runtime Library Exception along with this program; 23 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see 24 <http://www.gnu.org/licenses/>. */ 25 26 #ifndef _AMO_H 27 #define _AMO_H 28 29 #if !defined(_ARCH_PWR9) || !defined(_ARCH_PPC64) 30 #error "The atomic memory operations require Power 64-bit ISA 3.0" 31 32 #else 33 #include <stdint.h> 34 35 /* Enumeration of the LWAT/LDAT sub-opcodes. */ 36 enum _AMO_LD { 37 _AMO_LD_ADD = 0x00, /* Fetch and Add. */ 38 _AMO_LD_XOR = 0x01, /* Fetch and Xor. */ 39 _AMO_LD_IOR = 0x02, /* Fetch and Ior. */ 40 _AMO_LD_AND = 0x03, /* Fetch and And. */ 41 _AMO_LD_UMAX = 0x04, /* Fetch and Unsigned Maximum. */ 42 _AMO_LD_SMAX = 0x05, /* Fetch and Signed Maximum. */ 43 _AMO_LD_UMIN = 0x06, /* Fetch and Unsigned Minimum. */ 44 _AMO_LD_SMIN = 0x07, /* Fetch and Signed Minimum. */ 45 _AMO_LD_SWAP = 0x08, /* Swap. */ 46 _AMO_LD_CS_NE = 0x10, /* Compare and Swap Not Equal. */ 47 _AMO_LD_INC_BOUNDED = 0x18, /* Fetch and Increment Bounded. */ 48 _AMO_LD_INC_EQUAL = 0x19, /* Fetch and Increment Equal. */ 49 _AMO_LD_DEC_BOUNDED = 0x1C /* Fetch and Decrement Bounded. */ 50 }; 51 52 /* Implementation of the simple LWAT/LDAT operations that take one register and 53 modify one word or double-word of memory and return the value that was 54 previously in the memory location. 55 56 The LWAT/LDAT opcode requires the address to be a single register, and that 57 points to a suitably aligned memory location. Asm volatile is used to 58 prevent the optimizer from moving the operation. */ 59 60 #define _AMO_LD_SIMPLE(NAME, TYPE, OPCODE, FC) \ 61 static __inline__ TYPE \ 62 NAME (TYPE *_PTR, TYPE _VALUE) \ 63 { \ 64 unsigned __int128 _TMP; \ 65 TYPE _RET; \ 66 __asm__ volatile ("mr %L1,%3\n" \ 67 "\t" OPCODE " %1,%P0,%4\n" \ 68 "\tmr %2,%1\n" \ 69 : "+Q" (_PTR[0]), "=&r" (_TMP), "=r" (_RET) \ 70 : "r" (_VALUE), "n" (FC)); \ 71 return _RET; \ 72 } 73 74 _AMO_LD_SIMPLE (amo_lwat_add, uint32_t, "lwat", _AMO_LD_ADD) 75 _AMO_LD_SIMPLE (amo_lwat_xor, uint32_t, "lwat", _AMO_LD_XOR) 76 _AMO_LD_SIMPLE (amo_lwat_ior, uint32_t, "lwat", _AMO_LD_IOR) 77 _AMO_LD_SIMPLE (amo_lwat_and, uint32_t, "lwat", _AMO_LD_AND) 78 _AMO_LD_SIMPLE (amo_lwat_umax, uint32_t, "lwat", _AMO_LD_UMAX) 79 _AMO_LD_SIMPLE (amo_lwat_umin, uint32_t, "lwat", _AMO_LD_UMIN) 80 _AMO_LD_SIMPLE (amo_lwat_swap, uint32_t, "lwat", _AMO_LD_SWAP) 81 82 _AMO_LD_SIMPLE (amo_lwat_sadd, int32_t, "lwat", _AMO_LD_ADD) 83 _AMO_LD_SIMPLE (amo_lwat_smax, int32_t, "lwat", _AMO_LD_SMAX) 84 _AMO_LD_SIMPLE (amo_lwat_smin, int32_t, "lwat", _AMO_LD_SMIN) 85 _AMO_LD_SIMPLE (amo_lwat_sswap, int32_t, "lwat", _AMO_LD_SWAP) 86 87 _AMO_LD_SIMPLE (amo_ldat_add, uint64_t, "ldat", _AMO_LD_ADD) 88 _AMO_LD_SIMPLE (amo_ldat_xor, uint64_t, "ldat", _AMO_LD_XOR) 89 _AMO_LD_SIMPLE (amo_ldat_ior, uint64_t, "ldat", _AMO_LD_IOR) 90 _AMO_LD_SIMPLE (amo_ldat_and, uint64_t, "ldat", _AMO_LD_AND) 91 _AMO_LD_SIMPLE (amo_ldat_umax, uint64_t, "ldat", _AMO_LD_UMAX) 92 _AMO_LD_SIMPLE (amo_ldat_umin, uint64_t, "ldat", _AMO_LD_UMIN) 93 _AMO_LD_SIMPLE (amo_ldat_swap, uint64_t, "ldat", _AMO_LD_SWAP) 94 95 _AMO_LD_SIMPLE (amo_ldat_sadd, int64_t, "ldat", _AMO_LD_ADD) 96 _AMO_LD_SIMPLE (amo_ldat_smax, int64_t, "ldat", _AMO_LD_SMAX) 97 _AMO_LD_SIMPLE (amo_ldat_smin, int64_t, "ldat", _AMO_LD_SMIN) 98 _AMO_LD_SIMPLE (amo_ldat_sswap, int64_t, "ldat", _AMO_LD_SWAP) 99 100 /* Enumeration of the STWAT/STDAT sub-opcodes. */ 101 enum _AMO_ST { 102 _AMO_ST_ADD = 0x00, /* Store Add. */ 103 _AMO_ST_XOR = 0x01, /* Store Xor. */ 104 _AMO_ST_IOR = 0x02, /* Store Ior. */ 105 _AMO_ST_AND = 0x03, /* Store And. */ 106 _AMO_ST_UMAX = 0x04, /* Store Unsigned Maximum. */ 107 _AMO_ST_SMAX = 0x05, /* Store Signed Maximum. */ 108 _AMO_ST_UMIN = 0x06, /* Store Unsigned Minimum. */ 109 _AMO_ST_SMIN = 0x07, /* Store Signed Minimum. */ 110 _AMO_ST_TWIN = 0x18 /* Store Twin. */ 111 }; 112 113 /* Implementation of the simple STWAT/STDAT operations that take one register 114 and modify one word or double-word of memory. No value is returned. 115 116 The STWAT/STDAT opcode requires the address to be a single register, and 117 that points to a suitably aligned memory location. Asm volatile is used to 118 prevent the optimizer from moving the operation. */ 119 120 #define _AMO_ST_SIMPLE(NAME, TYPE, OPCODE, FC) \ 121 static __inline__ void \ 122 NAME (TYPE *_PTR, TYPE _VALUE) \ 123 { \ 124 __asm__ volatile (OPCODE " %1,%P0,%2" \ 125 : "+Q" (_PTR[0]) \ 126 : "r" (_VALUE), "n" (FC)); \ 127 return; \ 128 } 129 130 _AMO_ST_SIMPLE (amo_stwat_add, uint32_t, "stwat", _AMO_ST_ADD) 131 _AMO_ST_SIMPLE (amo_stwat_xor, uint32_t, "stwat", _AMO_ST_XOR) 132 _AMO_ST_SIMPLE (amo_stwat_ior, uint32_t, "stwat", _AMO_ST_IOR) 133 _AMO_ST_SIMPLE (amo_stwat_and, uint32_t, "stwat", _AMO_ST_AND) 134 _AMO_ST_SIMPLE (amo_stwat_umax, uint32_t, "stwat", _AMO_ST_UMAX) 135 _AMO_ST_SIMPLE (amo_stwat_umin, uint32_t, "stwat", _AMO_ST_UMIN) 136 137 _AMO_ST_SIMPLE (amo_stwat_sadd, int32_t, "stwat", _AMO_ST_ADD) 138 _AMO_ST_SIMPLE (amo_stwat_smax, int32_t, "stwat", _AMO_ST_SMAX) 139 _AMO_ST_SIMPLE (amo_stwat_smin, int32_t, "stwat", _AMO_ST_SMIN) 140 141 _AMO_ST_SIMPLE (amo_stdat_add, uint64_t, "stdat", _AMO_ST_ADD) 142 _AMO_ST_SIMPLE (amo_stdat_xor, uint64_t, "stdat", _AMO_ST_XOR) 143 _AMO_ST_SIMPLE (amo_stdat_ior, uint64_t, "stdat", _AMO_ST_IOR) 144 _AMO_ST_SIMPLE (amo_stdat_and, uint64_t, "stdat", _AMO_ST_AND) 145 _AMO_ST_SIMPLE (amo_stdat_umax, uint64_t, "stdat", _AMO_ST_UMAX) 146 _AMO_ST_SIMPLE (amo_stdat_umin, uint64_t, "stdat", _AMO_ST_UMIN) 147 148 _AMO_ST_SIMPLE (amo_stdat_sadd, int64_t, "stdat", _AMO_ST_ADD) 149 _AMO_ST_SIMPLE (amo_stdat_smax, int64_t, "stdat", _AMO_ST_SMAX) 150 _AMO_ST_SIMPLE (amo_stdat_smin, int64_t, "stdat", _AMO_ST_SMIN) 151 #endif /* _ARCH_PWR9 && _ARCH_PPC64. */ 152 #endif /* _POWERPC_AMO_H. */ 153
Indexes created Sat Feb 28 05:31:39 UTC 2026