1 (define_insn_and_split "*movsi_aarch64" 2 [(set (match_operand:SI 0 "nonimmediate_operand") 3 (match_operand:SI 1 "aarch64_mov_operand"))] 4 "(register_operand (operands[0], SImode) 5 || aarch64_reg_or_zero (operands[1], SImode))" 6 {@ [ cons: =0 , 1 ; attrs: type , arch , length ] 7 [ r , r ; mov_reg , * , 4 ] mov\t%w0, %w1 8 [ k , r ; mov_reg , * , 4 ] mov\t%w0, %w1 9 [ r , k ; mov_reg , * , 4 ] mov\t%w0, %w1 10 [ r , M ; mov_imm , * , 4 ] mov\t%w0, %1 11 [ r , n ; mov_imm , * , * ] # 12 [ r , Usv ; mov_imm , sve , 4 ] << aarch64_output_sve_cnt_immediate ("cnt", "%x0", operands[1]); 13 [ r , m ; load_4 , * , 4 ] ldr\t%w0, %1 14 [ w , m ; load_4 , fp , 4 ] ldr\t%s0, %1 15 [ m , rZ ; store_4 , * , 4 ] str\t%w1, %0 16 [ m , w ; store_4 , fp , 4 ] str\t%s1, %0 17 [ r , Usw ; load_4 , * , 8 ] adrp\t%x0, %A1\;ldr\t%w0, [%x0, %L1] 18 [ r , Usa ; adr , * , 4 ] adr\t%x0, %c1 19 [ r , Ush ; adr , * , 4 ] adrp\t%x0, %A1 20 [ w , rZ ; f_mcr , fp , 4 ] fmov\t%s0, %w1 21 [ r , w ; f_mrc , fp , 4 ] fmov\t%w0, %s1 22 [ w , w ; fmov , fp , 4 ] fmov\t%s0, %s1 23 [ w , Ds ; neon_move , simd , 4 ] << aarch64_output_scalar_simd_mov_immediate (operands[1], SImode); 24 } 25 "CONST_INT_P (operands[1]) && !aarch64_move_imm (INTVAL (operands[1]), SImode) 26 && REG_P (operands[0]) && GP_REGNUM_P (REGNO (operands[0]))" 27 [(const_int 0)] 28 "{ 29 aarch64_expand_mov_immediate (operands[0], operands[1]); 30 DONE; 31 }" 32 ) 33
Indexes created Mon Sep 07 00:24:45 UTC 2026