1 <?xml version="1.0"?> 2 <!DOCTYPE target SYSTEM "gdb-target.dtd"> 3 <target> 4 <architecture>riscv</architecture> 5 <feature name="org.gnu.gdb.riscv.cpu"> 6 <reg name="zero" bitsize="32" type="int"/> 7 <reg name="ra" bitsize="32" type="code_ptr"/> 8 <reg name="sp" bitsize="32" type="data_ptr"/> 9 <reg name="gp" bitsize="32" type="data_ptr"/> 10 <reg name="tp" bitsize="32" type="data_ptr"/> 11 <reg name="t0" bitsize="32" type="int"/> 12 <reg name="t1" bitsize="32" type="int"/> 13 <reg name="t2" bitsize="32" type="int"/> 14 <reg name="fp" bitsize="32" type="data_ptr"/> 15 <reg name="s1" bitsize="32" type="int"/> 16 <reg name="a0" bitsize="32" type="int"/> 17 <reg name="a1" bitsize="32" type="int"/> 18 <reg name="a2" bitsize="32" type="int"/> 19 <reg name="a3" bitsize="32" type="int"/> 20 <reg name="a4" bitsize="32" type="int"/> 21 <reg name="a5" bitsize="32" type="int"/> 22 <reg name="a6" bitsize="32" type="int"/> 23 <reg name="a7" bitsize="32" type="int"/> 24 <reg name="s2" bitsize="32" type="int"/> 25 <reg name="s3" bitsize="32" type="int"/> 26 <reg name="s4" bitsize="32" type="int"/> 27 <reg name="s5" bitsize="32" type="int"/> 28 <reg name="s6" bitsize="32" type="int"/> 29 <reg name="s7" bitsize="32" type="int"/> 30 <reg name="s8" bitsize="32" type="int"/> 31 <reg name="s9" bitsize="32" type="int"/> 32 <reg name="s10" bitsize="32" type="int"/> 33 <reg name="s11" bitsize="32" type="int"/> 34 <reg name="t3" bitsize="32" type="int"/> 35 <reg name="t4" bitsize="32" type="int"/> 36 <reg name="t5" bitsize="32" type="int"/> 37 <reg name="t6" bitsize="32" type="int"/> 38 <reg name="pc" bitsize="32" type="code_ptr"/> 39 </feature> 40 <feature name="org.gnu.gdb.riscv.fpu"> 41 <reg name="ft0" bitsize="32" type="float"/> 42 <reg name="ft1" bitsize="32" type="float"/> 43 <reg name="ft2" bitsize="32" type="float"/> 44 <reg name="ft3" bitsize="32" type="float"/> 45 <reg name="ft4" bitsize="32" type="float"/> 46 <reg name="ft5" bitsize="32" type="float"/> 47 <reg name="ft6" bitsize="32" type="float"/> 48 <reg name="ft7" bitsize="32" type="float"/> 49 <reg name="fs0" bitsize="32" type="float"/> 50 <reg name="fs1" bitsize="32" type="float"/> 51 <reg name="fa0" bitsize="32" type="float"/> 52 <reg name="fa1" bitsize="32" type="float"/> 53 <reg name="fa2" bitsize="32" type="float"/> 54 <reg name="fa3" bitsize="32" type="float"/> 55 <reg name="fa4" bitsize="32" type="float"/> 56 <reg name="fa5" bitsize="32" type="float"/> 57 <reg name="fa6" bitsize="32" type="float"/> 58 <reg name="fa7" bitsize="32" type="float"/> 59 <reg name="fs2" bitsize="32" type="float"/> 60 <reg name="fs3" bitsize="32" type="float"/> 61 <reg name="fs4" bitsize="32" type="float"/> 62 <reg name="fs5" bitsize="32" type="float"/> 63 <reg name="fs6" bitsize="32" type="float"/> 64 <reg name="fs7" bitsize="32" type="float"/> 65 <reg name="fs8" bitsize="32" type="float"/> 66 <reg name="fs9" bitsize="32" type="float"/> 67 <reg name="fs10" bitsize="32" type="float"/> 68 <reg name="fs11" bitsize="32" type="float"/> 69 <reg name="ft8" bitsize="32" type="float"/> 70 <reg name="ft9" bitsize="32" type="float"/> 71 <reg name="ft10" bitsize="32" type="float"/> 72 <reg name="ft11" bitsize="32" type="float"/> 73 <!-- The following 3 registers are duplicated. --> 74 <reg name="fflags" bitsize="32" type="int"/> 75 <reg name="frm" bitsize="32" type="int"/> 76 <reg name="fcsr" bitsize="32" type="int"/> 77 </feature> 78 <feature name="org.gnu.gdb.riscv.csr"> 79 <!-- The following 3 registers are duplicated. --> 80 <reg name="fflags" bitsize="32" type="int"/> 81 <reg name="frm" bitsize="32" type="int"/> 82 <reg name="fcsr" bitsize="32" type="int"/> 83 <!-- The following is a CSR unknown to GDB. --> 84 <reg name="unknown_csr" bitsize="32" type="int"/> 85 <!-- The following is now known as 'dscratch0' in the official 86 RISC-V spec, but GDB should NOT rename this register. --> 87 <reg name="dscratch" bitsize="32" type="int"/> 88 </feature> 89 </target> 90
Indexes created Thu Apr 09 00:23:28 UTC 2026