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      1 //Original:/testcases/core/c_dsp32alu_r_lh_a0pa1/c_dsp32alu_r_lh_a0pa1.dsp
      2 // Spec Reference: dsp32alu r(lh) = ( a0 += a1)
      3 # mach: bfin
      4 
      5 .include "testutils.inc"
      6 	start
      7 
      8 
      9 
     10 
     11 imm32 r0, 0x15678911;
     12 imm32 r1, 0x0125ab2d;
     13 imm32 r2, 0x04445535;
     14 imm32 r3, 0x00567747;
     15 imm32 r4, 0x0566895b;
     16 imm32 r5, 0x07897b6d;
     17 imm32 r6, 0x04445875;
     18 imm32 r7, 0x06667797;
     19 A0 = R0;
     20 A1 = R1;
     21 R0 = ( A0 += A1 );
     22 R1 = ( A0 += A1 );
     23 R2 = ( A0 += A1 );
     24 R3 = ( A0 += A1 );
     25 R4 = ( A0 += A1 );
     26 R5 = ( A0 += A1 );
     27 R6 = ( A0 += A1 );
     28 R7 = ( A0 += A1 );
     29 CHECKREG r0, 0x168D343E;
     30 CHECKREG r1, 0x17B2DF6B;
     31 CHECKREG r2, 0x18D88A98;
     32 CHECKREG r3, 0x19FE35C5;
     33 CHECKREG r4, 0x1B23E0F2;
     34 CHECKREG r5, 0x1C498C1F;
     35 CHECKREG r6, 0x1D6F374C;
     36 CHECKREG r7, 0x1E94E279;
     37 
     38 imm32 r0, 0x068D343E;
     39 imm32 r1, 0x02B2DF6B;
     40 imm32 r2, 0x48388A98;
     41 imm32 r3, 0x59F435C5;
     42 imm32 r4, 0x6B25E0F2;
     43 imm32 r5, 0x7C496C1F;
     44 imm32 r6, 0x886F374C;
     45 imm32 r7, 0x9E94E279;
     46 A0 = R0;
     47 A1 = R1;
     48 R0.L = ( A0 += A1 );
     49 R0.H = ( A0 += A1 );
     50 R1.L = ( A0 += A1 );
     51 R1.H = ( A0 += A1 );
     52 R2.L = ( A0 += A1 );
     53 R2.H = ( A0 += A1 );
     54 R3.L = ( A0 += A1 );
     55 R3.H = ( A0 += A1 );
     56 R4.L = ( A0 += A1 );
     57 R4.H = ( A0 += A1 );
     58 R5.L = ( A0 += A1 );
     59 R5.H = ( A0 += A1 );
     60 R6.L = ( A0 += A1 );
     61 R6.H = ( A0 += A1 );
     62 R7.L = ( A0 += A1 );
     63 R7.H = ( A0 += A1 );
     64 CHECKREG r0, 0x0BF30940;
     65 CHECKREG r1, 0x11590EA6;
     66 CHECKREG r2, 0x16BE140C;
     67 CHECKREG r3, 0x1C241971;
     68 CHECKREG r4, 0x218A1ED7;
     69 CHECKREG r5, 0x26F0243D;
     70 CHECKREG r6, 0x2C5529A3;
     71 CHECKREG r7, 0x31BB2F08;
     72 
     73 
     74 
     75 pass
     76