1 //Original:/testcases/core/c_dsp32alu_rl_p/c_dsp32alu_rl_p.dsp 2 // Spec Reference: dsp32alu dreg (half) 3 # mach: bfin 4 5 .include "testutils.inc" 6 start 7 8 9 10 11 imm32 r0, 0x19678911; 12 imm32 r1, 0x2799ab1d; 13 imm32 r2, 0x34945515; 14 imm32 r3, 0x46967717; 15 imm32 r4, 0x5678891b; 16 imm32 r5, 0x6789ab1d; 17 imm32 r6, 0x74445515; 18 imm32 r7, 0x86669977; 19 R0.L = R0.L + R0.L (NS); 20 R1.L = R0.L + R1.H (NS); 21 R2.L = R0.H + R2.L (NS); 22 R3.L = R0.H + R3.H (NS); 23 R4.L = R0.L + R4.L (NS); 24 R5.L = R0.L + R5.H (NS); 25 R6.L = R0.H + R6.L (NS); 26 R7.L = R0.H + R7.H (NS); 27 CHECKREG r4, 0x56789B3D; 28 CHECKREG r5, 0x678979AB; 29 CHECKREG r6, 0x74446E7C; 30 CHECKREG r7, 0x86669FCD; 31 CHECKREG r4, 0x56789B3D; 32 CHECKREG r5, 0x678979AB; 33 CHECKREG r6, 0x74446E7C; 34 CHECKREG r7, 0x86669FCD; 35 36 imm32 r0, 0x15678911; 37 imm32 r1, 0xaa89ab1d; 38 imm32 r2, 0x34445515; 39 imm32 r3, 0x46a67717; 40 imm32 r4, 0x567a891b; 41 imm32 r5, 0x6789ab1d; 42 imm32 r6, 0x74445a15; 43 imm32 r7, 0x866677a7; 44 R0.L = R1.L + R0.L (NS); 45 R1.L = R1.L + R1.H (NS); 46 R2.L = R1.H + R2.L (NS); 47 R3.L = R1.H + R3.H (NS); 48 R4.L = R1.L + R4.L (NS); 49 R5.L = R1.L + R5.H (NS); 50 R6.L = R1.H + R6.L (NS); 51 R7.L = R1.H + R7.H (NS); 52 CHECKREG r4, 0x567ADEC1; 53 CHECKREG r5, 0x6789BD2F; 54 CHECKREG r6, 0x7444049E; 55 CHECKREG r7, 0x866630EF; 56 CHECKREG r4, 0x567ADEC1; 57 CHECKREG r5, 0x6789BD2F; 58 CHECKREG r6, 0x7444049E; 59 CHECKREG r7, 0x866630EF; 60 61 imm32 r0, 0x15678911; 62 imm32 r1, 0x2789ab1d; 63 imm32 r2, 0x34445515; 64 imm32 r3, 0x46667717; 65 imm32 r4, 0x5678891b; 66 imm32 r5, 0x6789ab1d; 67 imm32 r6, 0x74445515; 68 imm32 r7, 0x86667777; 69 R0.L = R2.L + R0.L (NS); 70 R1.L = R2.L + R1.H (NS); 71 R2.L = R2.H + R2.L (NS); 72 R3.L = R2.H + R3.H (NS); 73 R4.L = R2.L + R4.L (NS); 74 R5.L = R2.L + R5.H (NS); 75 R6.L = R2.H + R6.L (NS); 76 R7.L = R2.H + R7.H (NS); 77 CHECKREG r4, 0x56781274; 78 CHECKREG r5, 0x6789F0E2; 79 CHECKREG r6, 0x74448959; 80 CHECKREG r7, 0x8666BAAA; 81 CHECKREG r4, 0x56781274; 82 CHECKREG r5, 0x6789F0E2; 83 CHECKREG r6, 0x74448959; 84 CHECKREG r7, 0x8666BAAA; 85 86 imm32 r0, 0xb5678911; 87 imm32 r1, 0x2789ab1d; 88 imm32 r2, 0x3bb45515; 89 imm32 r3, 0x46667717; 90 imm32 r4, 0x567b891b; 91 imm32 r5, 0x6789ab1d; 92 imm32 r6, 0x7444b515; 93 imm32 r7, 0x86667b77; 94 R0.L = R3.L + R0.L (NS); 95 R1.L = R3.L + R1.H (NS); 96 R2.L = R3.H + R2.L (NS); 97 R3.L = R3.H + R3.H (NS); 98 R4.L = R3.L + R4.L (NS); 99 R5.L = R3.L + R5.H (NS); 100 R6.L = R3.H + R6.L (NS); 101 R7.L = R3.H + R7.H (NS); 102 CHECKREG r4, 0x567B15E7; 103 CHECKREG r5, 0x6789F455; 104 CHECKREG r6, 0x7444FB7B; 105 CHECKREG r7, 0x8666CCCC; 106 CHECKREG r4, 0x567B15E7; 107 CHECKREG r5, 0x6789F455; 108 CHECKREG r6, 0x7444FB7B; 109 CHECKREG r7, 0x8666CCCC; 110 111 imm32 r0, 0x15678911; 112 imm32 r1, 0x2789ab1d; 113 imm32 r2, 0x34445515; 114 imm32 r3, 0x46667717; 115 imm32 r4, 0x5678891b; 116 imm32 r5, 0x6789ab1d; 117 imm32 r6, 0x74445515; 118 imm32 r7, 0x86667777; 119 R0.L = R4.L + R0.L (NS); 120 R1.L = R4.L + R1.H (NS); 121 R2.L = R4.H + R2.L (NS); 122 R3.L = R4.H + R3.H (NS); 123 R4.L = R4.L + R4.L (NS); 124 R5.L = R4.L + R5.H (NS); 125 R6.L = R4.H + R6.L (NS); 126 R7.L = R4.H + R7.H (NS); 127 CHECKREG r4, 0x56781236; 128 CHECKREG r5, 0x678979BF; 129 CHECKREG r6, 0x7444AB8D; 130 CHECKREG r7, 0x8666DCDE; 131 CHECKREG r4, 0x56781236; 132 CHECKREG r5, 0x678979BF; 133 CHECKREG r6, 0x7444AB8D; 134 CHECKREG r7, 0x8666DCDE; 135 136 imm32 r0, 0xcc678911; 137 imm32 r1, 0x2789ab1d; 138 imm32 r2, 0x3c445515; 139 imm32 r3, 0x46c67717; 140 imm32 r4, 0x567c891b; 141 imm32 r5, 0x6789cb1d; 142 imm32 r6, 0x74445515; 143 imm32 r7, 0x86667c77; 144 R0.L = R5.L + R0.L (NS); 145 R1.L = R5.L + R1.H (NS); 146 R2.L = R5.H + R2.L (NS); 147 R3.L = R5.H + R3.H (NS); 148 R4.L = R5.L + R4.L (NS); 149 R5.L = R5.L + R5.H (NS); 150 R6.L = R5.H + R6.L (NS); 151 R7.L = R5.H + R7.H (NS); 152 CHECKREG r4, 0x567C5438; 153 CHECKREG r5, 0x678932A6; 154 CHECKREG r6, 0x7444BC9E; 155 CHECKREG r7, 0x8666EDEF; 156 CHECKREG r4, 0x567C5438; 157 CHECKREG r5, 0x678932A6; 158 CHECKREG r6, 0x7444BC9E; 159 CHECKREG r7, 0x8666EDEF; 160 161 imm32 r0, 0xd5678911; 162 imm32 r1, 0x2789ab1d; 163 imm32 r2, 0x3d445515; 164 imm32 r3, 0x46d67717; 165 imm32 r4, 0x5678891b; 166 imm32 r5, 0x678dab1d; 167 imm32 r6, 0x7444d515; 168 imm32 r7, 0x86667d77; 169 R0.L = R6.L + R0.L (NS); 170 R1.L = R6.L + R1.H (NS); 171 R2.L = R6.H + R2.L (NS); 172 R3.L = R6.H + R3.H (NS); 173 R4.L = R6.L + R4.L (NS); 174 R5.L = R6.L + R5.H (NS); 175 R6.L = R6.H + R6.L (NS); 176 R7.L = R6.H + R7.H (NS); 177 CHECKREG r4, 0x56785E30; 178 CHECKREG r5, 0x678D3CA2; 179 CHECKREG r6, 0x74444959; 180 CHECKREG r7, 0x8666FAAA; 181 CHECKREG r4, 0x56785E30; 182 CHECKREG r5, 0x678D3CA2; 183 CHECKREG r6, 0x74444959; 184 CHECKREG r7, 0x8666FAAA; 185 186 imm32 r0, 0xf5678911; 187 imm32 r1, 0x2f89ab1d; 188 imm32 r2, 0x34f45515; 189 imm32 r3, 0x466f7717; 190 imm32 r4, 0x5678f91b; 191 imm32 r5, 0x6789af1d; 192 imm32 r6, 0x744455f5; 193 imm32 r7, 0x8666777f; 194 R0.L = R7.L + R0.L (NS); 195 R1.L = R7.L + R1.H (NS); 196 R2.L = R7.H + R2.L (NS); 197 R3.L = R7.H + R3.H (NS); 198 R4.L = R7.L + R4.L (NS); 199 R5.L = R7.L + R5.H (NS); 200 R6.L = R7.H + R6.L (NS); 201 R7.L = R7.H + R7.H (NS); 202 CHECKREG r4, 0x5678709A; 203 CHECKREG r5, 0x6789DF08; 204 CHECKREG r6, 0x7444DC5B; 205 CHECKREG r7, 0x86660CCC; 206 CHECKREG r4, 0x5678709A; 207 CHECKREG r5, 0x6789DF08; 208 CHECKREG r6, 0x7444DC5B; 209 CHECKREG r7, 0x86660CCC; 210 211 imm32 r0, 0x55678911; 212 imm32 r1, 0x2589ab1d; 213 imm32 r2, 0x35545515; 214 imm32 r3, 0x46d67717; 215 imm32 r4, 0x5678891b; 216 imm32 r5, 0x678dab1d; 217 imm32 r6, 0x7444d515; 218 imm32 r7, 0x86667d77; 219 R6.L = R2.L + R3.L (S); 220 R1.L = R4.L + R5.H (S); 221 R5.L = R7.H + R2.L (S); 222 R3.L = R0.H + R0.H (S); 223 R0.L = R3.L + R4.L (S); 224 R2.L = R5.L + R7.H (S); 225 R7.L = R6.H + R7.L (S); 226 R4.L = R1.H + R6.H (S); 227 CHECKREG r4, 0x56787FFF; 228 CHECKREG r5, 0x678DDB7B; 229 CHECKREG r6, 0x74447FFF; 230 CHECKREG r7, 0x86667FFF; 231 CHECKREG r4, 0x56787FFF; 232 CHECKREG r5, 0x678DDB7B; 233 CHECKREG r6, 0x74447FFF; 234 CHECKREG r7, 0x86667FFF; 235 236 imm32 r0, 0x15678911; 237 imm32 r1, 0x2789ab1d; 238 imm32 r2, 0x34445515; 239 imm32 r3, 0x46667717; 240 imm32 r4, 0x5678891b; 241 imm32 r5, 0x6789ab1d; 242 imm32 r6, 0x74445515; 243 imm32 r7, 0x86667777; 244 R3.L = R4.L + R0.L (S); 245 R1.L = R6.L + R3.H (S); 246 R4.L = R3.H + R2.L (S); 247 R6.L = R7.H + R1.H (S); 248 R2.L = R5.L + R4.L (S); 249 R7.L = R2.L + R7.H (S); 250 R0.L = R1.H + R6.L (S); 251 R5.L = R0.H + R5.H (S); 252 CHECKREG r4, 0x56787FFF; 253 CHECKREG r5, 0x67897CF0; 254 CHECKREG r6, 0x7444ADEF; 255 CHECKREG r7, 0x8666B182; 256 CHECKREG r4, 0x56787FFF; 257 CHECKREG r5, 0x67897CF0; 258 CHECKREG r6, 0x7444ADEF; 259 CHECKREG r7, 0x8666B182; 260 261 262 263 pass 264
Indexes created Sun May 17 00:24:36 UTC 2026