1 # Blackfin testcase for register load instructions 2 # mach: bfin 3 4 5 .include "testutils.inc" 6 7 start 8 9 .macro load32 num:req, reg0:req, reg1:req 10 imm32 \reg0 \num 11 imm32 \reg1 \num 12 CC = \reg0 == \reg1 13 if CC jump 2f; 14 fail 15 2: 16 .endm 17 18 .macro load32p num:req preg:req 19 imm32 r0 \num 20 imm32 \preg \num 21 r1 = \preg 22 cc = r0 == r1 23 if CC jump 3f; 24 fail 25 3: 26 imm32 \preg 0 27 .endm 28 29 .macro load16z num:req reg0:req reg1:req 30 \reg0 = \num (Z); 31 imm32 \reg1 \num 32 CC = \reg0 == \reg1 33 if CC jump 4f; 34 fail 35 4: 36 .endm 37 38 .macro load16zp num:req reg:req 39 \reg = \num (Z); 40 imm32 r1 \num; 41 r0 = \reg; 42 cc = r0 == r1 43 if CC jump 5f; 44 fail 45 5: 46 .endm 47 48 .macro load16x num:req reg0:req reg1:req 49 \reg0 = \num (X); 50 imm32 \reg1, \num 51 CC = \reg0 == \reg1 52 if CC jump 6f; 53 fail 54 6: 55 .endm 56 57 /* Clobbers R0 */ 58 .macro loadinc preg0:req, preg1:req, dreg:req 59 loadsym \preg0, _buf 60 \preg1 = \preg0; 61 \dreg = \preg0; 62 [\preg0\()++] = \preg0; 63 \dreg += 4; 64 R0 = \preg0; 65 CC = \dreg == R0; 66 if CC jump 7f; 67 fail 68 7: 69 R0 = [ \preg1\() ]; 70 \dreg += -4; 71 CC = \dreg == R0; 72 if CC jump 8f; 73 fail 74 8: 75 .endm 76 77 /* test a bunch of values */ 78 79 /* load_immediate (Half-Word Load) 80 * register = constant 81 * reg_lo = uimm16; 82 * reg_hi = uimm16; 83 */ 84 85 load32 0 R0 R1 86 load32 0xFFFFFFFF R0 R1 87 load32 0x55aaaa55 r0 r1 88 load32 0x12345678 r0 r1 89 load32 0x12345678 R0 R2 90 load32 0x23456789 R0 R3 91 load32 0x3456789a R0 R4 92 load32 0x456789ab R0 R5 93 load32 0x56789abc R0 R6 94 load32 0x6789abcd R0 R7 95 load32 0x789abcde R0 R0 96 load32 0x89abcdef R1 R0 97 load32 0x9abcdef0 R2 R0 98 load32 0xabcdef01 R3 R0 99 load32 0xbcdef012 R4 R0 100 load32 0xcdef0123 R5 R0 101 load32 0xdef01234 R6 R0 102 load32 0xef012345 R7 R0 103 104 load32p 0xf0123456 P0 105 load32p 0x01234567 P1 106 load32p 0x12345678 P2 107 .ifndef BFIN_HOST 108 load32p 0x23456789 P3 109 .endif 110 load32p 0x3456789a P4 111 load32p 0x456789ab P5 112 load32p 0x56789abc SP 113 load32p 0x6789abcd FP 114 115 load32p 0x789abcde I0 116 load32p 0x89abcdef I1 117 load32p 0x9abcdef0 I2 118 load32p 0xabcdef01 I3 119 load32p 0xbcdef012 M0 120 load32p 0xcdef0123 M1 121 load32p 0xdef01234 M2 122 load32p 0xef012345 M3 123 124 load32p 0xf0123456 B0 125 load32p 0x01234567 B1 126 load32p 0x12345678 B2 127 load32p 0x23456789 B3 128 load32p 0x3456789a L0 129 load32p 0x456789ab L1 130 load32p 0x56789abc L2 131 load32p 0x6789abcd L3 132 133 /* Zero Extended */ 134 load16z 0x1234 R0 R1 135 load16z 0x2345 R0 R1 136 load16z 0x3456 R0 R2 137 load16z 0x4567 R0 R3 138 load16z 0x5678 R0 R4 139 load16z 0x6789 R0 R5 140 load16z 0x789a R0 R6 141 load16z 0x89ab R0 R7 142 load16z 0x9abc R1 R0 143 load16z 0xabcd R2 R0 144 load16z 0xbcde R3 R0 145 load16z 0xcdef R4 R0 146 load16z 0xdef0 R5 R0 147 load16z 0xef01 R6 R0 148 load16z 0xf012 R7 R0 149 150 load16zp 0x0123 P0 151 load16zp 0x1234 P1 152 load16zp 0x1234 p2 153 .ifndef BFIN_HOST 154 load16zp 0x2345 p3 155 .endif 156 load16zp 0x3456 p4 157 load16zp 0x4567 p5 158 load16zp 0x5678 sp 159 load16zp 0x6789 fp 160 load16zp 0x789a i0 161 load16zp 0x89ab i1 162 load16zp 0x9abc i2 163 load16zp 0xabcd i3 164 load16zp 0xbcde m0 165 load16zp 0xcdef m1 166 load16zp 0xdef0 m2 167 load16zp 0xef01 m3 168 load16zp 0xf012 b0 169 load16zp 0x0123 b1 170 load16zp 0x1234 b2 171 load16zp 0x2345 b3 172 load16zp 0x3456 l0 173 load16zp 0x4567 l1 174 load16zp 0x5678 l2 175 load16zp 0x6789 l3 176 177 /* Sign Extended */ 178 load16x 0x20 R0 R1 179 load16x 0x3F R0 R1 180 load16x -0x20 R0 R1 181 load16x -0x3F R0 R1 182 load16x 0x1234 R0 R1 183 load16x 0x2345 R0 R1 184 load16x 0x3456 R0 R2 185 load16x 0x4567 R0 R3 186 load16x 0x5678 R0 R4 187 load16x 0x6789 R0 R5 188 load16x 0x789a R0 R6 189 load16x 0x09ab R0 R7 190 load16x -0x1abc R1 R0 191 load16x -0x2bcd R2 R0 192 load16x -0x3cde R3 R0 193 load16x -0x4def R4 R0 194 load16x -0x5ef0 R5 R0 195 load16x -0x6f01 R6 R0 196 load16x -0x7012 R7 R0 197 198 loadinc P0, P1, R1 199 loadinc P1, P2, R1 200 loadinc P2, P1, R2 201 .ifndef BFIN_HOST 202 loadinc P3, P4, R3 203 .endif 204 loadinc P4, P5, R4 205 loadinc FP, P0, R7 206 loadinc P0, I0, R1 207 loadinc P1, I1, R1 208 loadinc P2, I2, R1 209 .ifndef BFIN_HOST 210 loadinc P3, I0, R1 211 .endif 212 loadinc P4, I2, R1 213 loadinc P5, I3, R1 214 215 A1 = A0 = 0; 216 R0 = 0x01 (Z); 217 A0.x = R0; 218 imm32 r4, 0x32e02d1a 219 A1.x = R4; 220 A0.w = A1.x; 221 R3 = A0.w; 222 R2 = A0.x; 223 imm32 r0, 0x0000001a 224 imm32 r1, 0x00000001 225 CC = R1 == R2; 226 if CC jump 1f; 227 fail 228 1: 229 CC = R0 == R3 230 if CC jump 2f; 231 fail 232 2: 233 pass 234 235 .data 236 _buf: 237 .rept 0x80 238 .long 0 239 .endr 240
Indexes created Sun Mar 01 05:31:48 UTC 2026