1 # frv testcase for sdivi $GRi,$s12,$GRk 2 # mach: all 3 4 .include "../testutils.inc" 5 6 start 7 8 .global sdivi 9 sdivi: 10 ; simple division 12 / 3 11 set_gr_immed 12,gr1 12 sdivi gr1,3,gr2 13 test_gr_immed 4,gr2 14 15 ; Random example 16 set_gr_limmed 0xfedc,0xba98,gr1 17 sdivi gr1,0x7ff,gr2 18 test_gr_limmed 0xffff,0xdb93,gr2 19 20 ; Random negative example 21 set_gr_limmed 0xfedc,0xba98,gr1 22 sdivi gr1,-2048,gr2 23 test_gr_immed 0x2468,gr2 24 25 ; Special case from the Arch Spec Vol 2 26 or_spr_immed 0x20,isr ; turn on isr.edem 27 set_gr_limmed 0x8000,0x0000,gr1 28 sdivi gr1,-1,gr2 29 test_gr_limmed 0x7fff,0xffff,gr2 30 test_spr_bits 0x4,2,1,isr ; isr.aexc is set 31 32 and_spr_immed -33,isr ; turn off isr.edem 33 ; set up exception handler 34 set_psr_et 1 35 and_spr_immed -4081,tbr ; clear tbr.tt 36 set_gr_spr tbr,gr17 37 inc_gr_immed 0x170,gr17 ; address of exception handler 38 set_bctrlr_0_0 gr17 39 set_spr_immed 128,lcr 40 set_gr_immed 0,gr15 41 42 ; divide will cause overflow 43 set_spr_addr ok1,lr 44 set_gr_limmed 0x8000,0x0000,gr1 45 e1: sdivi gr1,-1,gr2 46 test_gr_immed 1,gr15 47 test_gr_limmed 0x8000,0x0000,gr2 48 49 ; divide by zero 50 set_spr_addr ok2,lr 51 e2: sdivi gr1,0,gr2 ; divide by zero 52 test_gr_immed 2,gr15 53 54 pass 55 56 ok1: ; exception handler for overflow 57 test_spr_bits 0x18,3,0x2,isr ; isr.dtt is set 58 test_spr_bits 0x0001,0,0x1,esr0 ; esr0 is valid 59 test_spr_bits 0x003e,1,0x13,esr0 ; esr0.ec is set 60 inc_gr_immed 1,gr15 61 rett 0 62 fail 63 64 ok2: ; exception handler for divide by zero 65 test_spr_bits 0x18,3,0x3,isr ; isr.dtt is set 66 test_spr_bits 0x0001,0,0x1,esr0 ; esr0 is valid 67 test_spr_bits 0x003e,1,0x13,esr0 ; esr0.ec is set 68 inc_gr_immed 1,gr15 69 rett 0 70 fail 71
Indexes created Mon Oct 26 00:26:21 UTC 2026