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      1 # frv testcase for teq $ICCi_2,$GRi,$GRj
      2 # mach: all
      3 
      4 	.include "testutils.inc"
      5 
      6 	start
      7 
      8 	.global teq
      9 teq:
     10 	and_spr_immed	-4081,tbr		; clear tbr.tt
     11 	set_gr_spr	tbr,gr7
     12 	inc_gr_immed	2112,gr7		; address of exception handler
     13 	set_bctrlr_0_0	gr7	; bctrlr 0,0
     14 
     15 	set_spr_immed	128,lcr
     16 	set_gr_immed	0,gr7
     17 	set_gr_immed	4,gr8
     18 
     19 	set_spr_addr	bad,lr
     20 	set_icc		0x0 0
     21 	teq 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
     22 
     23 	set_spr_addr	bad,lr
     24 	set_icc		0x1 0
     25 	teq 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
     26 
     27 	set_spr_addr	bad,lr
     28 	set_icc		0x2 0
     29 	teq 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
     30 
     31 	set_spr_addr	bad,lr
     32 	set_icc		0x3 0
     33 	teq 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
     34 
     35 	set_psr_et	1
     36 	set_spr_addr	ok4,lr
     37 	set_icc		0x4 0
     38 	teq 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
     39 	fail
     40 ok4:
     41 	set_psr_et	1
     42 	set_spr_addr	ok5,lr
     43 	set_icc		0x5 0
     44 	teq 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
     45 	fail
     46 ok5:
     47 	set_psr_et	1
     48 	set_spr_addr	ok6,lr
     49 	set_icc		0x6 0
     50 	teq 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
     51 	fail
     52 ok6:
     53 	set_psr_et	1
     54 	set_spr_addr	ok7,lr
     55 	set_icc		0x7 0
     56 	teq 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
     57 	fail
     58 ok7:
     59 	set_spr_addr	bad,lr
     60 	set_icc		0x8 0
     61 	teq 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
     62 
     63 	set_spr_addr	bad,lr
     64 	set_icc		0x9 0
     65 	teq 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
     66 
     67 	set_spr_addr	bad,lr
     68 	set_icc		0xa 0
     69 	teq 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
     70 
     71 	set_spr_addr	bad,lr
     72 	set_icc		0xb 0
     73 	teq 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
     74 
     75 	set_psr_et	1
     76 	set_spr_addr	okc,lr
     77 	set_icc		0xc 0
     78 	teq 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
     79 	fail
     80 okc:
     81 	set_psr_et	1
     82 	set_spr_addr	okd,lr
     83 	set_icc		0xd 0
     84 	teq 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
     85 	fail
     86 okd:
     87 	set_psr_et	1
     88 	set_spr_addr	oke,lr
     89 	set_icc		0xe 0
     90 	teq 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
     91 	fail
     92 oke:
     93 	set_psr_et	1
     94 	set_spr_addr	okf,lr
     95 	set_icc		0xf 0
     96 	teq 		icc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
     97 	fail
     98 okf:
     99 	pass
    100 bad:
    101 	fail
    102