1 # v850 divh_3 2 # mach: v850e 3 # as(v850e): -mv850e 4 5 .include "testutils.inc" 6 7 # Regular divhision - check signs 8 # The S flag is based on the quotient, not the remainder 9 10 seti 6, r1 11 seti 45, r2 12 divh r1, r2, r3 13 14 flags 0 15 reg r1, 6 16 reg r2, 7 17 reg r3, 3 18 19 seti -6, r1 20 seti 45, r2 21 divh r1, r2, r3 22 23 flags s 24 reg r1, -6 25 reg r2, -7 26 reg r3, 3 27 28 seti 6, r1 29 seti -45, r2 30 divh r1, r2, r3 31 32 flags s 33 reg r1, 6 34 reg r2, -7 35 reg r3, -3 36 37 seti -6, r1 38 seti -45, r2 39 divh r1, r2, r3 40 41 flags 0 42 reg r1, -6 43 reg r2, 7 44 reg r3, -3 45 46 # Only the lower half of the dividend is used 47 48 seti 0x0000fffa, r1 49 seti -45, r2 50 divh r1, r2, r3 51 52 flags 0 53 reg r1, 0x0000fffa 54 reg r2, 7 55 reg r3, -3 56 57 58 # If the data is divhided by zero, OV=1 and the quotient is undefined. 59 # According to NEC, the S and Z flags, and the output registers, are 60 # unchanged. 61 62 noflags 63 seti 0, r1 64 seti 45, r2 65 seti 67, r3 66 divh r1, r2, r3 67 68 flags v 69 reg r2, 45 70 reg r3, 67 71 72 allflags 73 seti 0, r1 74 seti 45, r2 75 seti 67, r3 76 divh r1, r2, r3 77 78 flags sat + c + v + s + z 79 reg r2, 45 80 reg r3, 67 81 82 # Zero / (N!=0) => normal 83 84 noflags 85 seti 45, r1 86 seti 0, r2 87 seti 67, r3 88 divh r1, r2, r3 89 90 flags z 91 reg r1, 45 92 reg r2, 0 93 reg r3, 0 94 95 # Test for regular overflow 96 97 noflags 98 seti -1, r1 99 seti 0x80000000, r2 100 seti 67, r3 101 divh r1, r2, r3 102 103 flags v + s 104 reg r1, -1 105 reg r2, 0x80000000 106 reg r3, 0 107 108 # The Z flag is based on the quotient, not the remainder 109 110 noflags 111 seti 45, r1 112 seti 16, r2 113 divh r1, r2, r3 114 115 flags z 116 reg r2, 0 117 reg r3, 16 118 119 # If the quot and rem registers are the same, the remainder is stored. 120 121 seti 6, r1 122 seti 45, r2 123 divh r1, r2, r2 124 125 flags 0 126 reg r1, 6 127 reg r2, 3 128 129 130 pass 131
Indexes created Tue May 05 00:25:04 UTC 2026