1 ; Renesas M32C CPU description. -*- Scheme -*- 2 ; 3 ; Copyright 2005, 2006, 2007, 2009 Free Software Foundation, Inc. 4 ; 5 ; Contributed by Red Hat Inc; developed under contract from Renesas. 6 ; 7 ; This file is part of the GNU Binutils. 8 ; 9 ; This program is free software; you can redistribute it and/or modify 10 ; it under the terms of the GNU General Public License as published by 11 ; the Free Software Foundation; either version 3 of the License, or 12 ; (at your option) any later version. 13 ; 14 ; This program is distributed in the hope that it will be useful, 15 ; but WITHOUT ANY WARRANTY; without even the implied warranty of 16 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 ; GNU General Public License for more details. 18 ; 19 ; You should have received a copy of the GNU General Public License 20 ; along with this program; if not, write to the Free Software 21 ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 22 ; MA 02110-1301, USA. 23 24 (include "simplify.inc") 25 26 (define-arch 27 (name m32c) 28 (comment "Renesas M32C") 29 (default-alignment forced) 30 (insn-lsb0? #f) 31 (machs m16c m32c) 32 (isas m16c m32c) 33 ) 34 35 (define-isa 36 (name m16c) 37 38 (default-insn-bitsize 32) 39 40 ; Number of bytes of insn we can initially fetch. 41 (base-insn-bitsize 32) 42 43 ; Used in computing bit numbers. 44 (default-insn-word-bitsize 32) 45 46 (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by. 47 48 ; fetches 1 insn at a time. 49 (liw-insns 1) 50 51 ; executes 1 insn at a time. 52 (parallel-insns 1) 53 ) 54 55 (define-isa 56 (name m32c) 57 58 (default-insn-bitsize 32) 59 60 ; Number of bytes of insn we can initially fetch. 61 (base-insn-bitsize 32) 62 63 ; Used in computing bit numbers. 64 (default-insn-word-bitsize 32) 65 66 (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by. 67 68 ; fetches 1 insn at a time. 69 (liw-insns 1) 70 71 ; executes 1 insn at a time. 72 (parallel-insns 1) 73 ) 74 75 (define-cpu 76 ; cpu names must be distinct from the architecture name and machine names. 77 ; The "b" suffix stands for "base" and is the convention. 78 ; The "f" suffix stands for "family" and is the convention. 79 (name m16cbf) 80 (comment "Renesas M16C base family") 81 (insn-endian big) 82 (data-endian little) 83 (word-bitsize 16) 84 ) 85 86 (define-cpu 87 ; cpu names must be distinct from the architecture name and machine names. 88 ; The "b" suffix stands for "base" and is the convention. 89 ; The "f" suffix stands for "family" and is the convention. 90 (name m32cbf) 91 (comment "Renesas M32C base family") 92 (insn-endian big) 93 (data-endian little) 94 (word-bitsize 16) 95 ) 96 97 (define-mach 98 (name m16c) 99 (comment "Generic M16C cpu") 100 (cpu m32cbf) 101 ) 102 103 (define-mach 104 (name m32c) 105 (comment "Generic M32C cpu") 106 (cpu m32cbf) 107 ) 108 109 ; Model descriptions. 110 111 (define-model 112 (name m16c) 113 (comment "m16c") (attrs) 114 (mach m16c) 115 116 ; `state' is a list of variables for recording model state 117 ; (state) 118 (unit u-exec "Execution Unit" () 119 1 1 ; issue done 120 () ; state 121 () ; inputs 122 () ; outputs 123 () ; profile action (default) 124 ) 125 ) 126 127 (define-model 128 (name m32c) 129 (comment "m32c") (attrs) 130 (mach m32c) 131 132 ; `state' is a list of variables for recording model state 133 ; (state) 134 (unit u-exec "Execution Unit" () 135 1 1 ; issue done 136 () ; state 137 () ; inputs 138 () ; outputs 139 () ; profile action (default) 140 ) 141 ) 142 143 (define-attr 144 (type enum) 145 (name RL_TYPE) 146 (values NONE JUMP 1ADDR 2ADDR) 147 (default NONE) 148 ) 149 150 ; Macros to simplify MACH attribute specification. 151 152 (define-pmacro all-isas () (ISA m16c,m32c)) 153 (define-pmacro m16c-isa () (ISA m16c)) 154 (define-pmacro m32c-isa () (ISA m32c)) 155 156 (define-pmacro MACH16 (MACH m16c)) 157 (define-pmacro MACH32 (MACH m32c)) 158 159 (define-pmacro (machine size) 160 (MACH (.sym m size c)) (ISA (.sym m size c))) 161 162 (define-pmacro RL_JUMP (RL_TYPE JUMP)) 163 (define-pmacro RL_1ADDR (RL_TYPE 1ADDR)) 164 (define-pmacro RL_2ADDR (RL_TYPE 2ADDR)) 165 166 168 ;============================================================= 169 ; Fields 170 ;------------------------------------------------------------- 171 ; Main opcodes 172 ; 173 (dnf f-0-1 "opcode" (all-isas) 0 1) 174 (dnf f-0-2 "opcode" (all-isas) 0 2) 175 (dnf f-0-3 "opcode" (all-isas) 0 3) 176 (dnf f-0-4 "opcode" (all-isas) 0 4) 177 (dnf f-1-3 "opcode" (all-isas) 1 3) 178 (dnf f-2-2 "opcode" (all-isas) 2 2) 179 (dnf f-3-4 "opcode" (all-isas) 3 4) 180 (dnf f-3-1 "opcode" (all-isas) 3 1) 181 (dnf f-4-1 "opcode" (all-isas) 4 1) 182 (dnf f-4-3 "opcode" (all-isas) 4 3) 183 (dnf f-4-4 "opcode" (all-isas) 4 4) 184 (dnf f-4-6 "opcode" (all-isas) 4 6) 185 (dnf f-5-1 "opcode" (all-isas) 5 1) 186 (dnf f-5-3 "opcode" (all-isas) 5 3) 187 (dnf f-6-2 "opcode" (all-isas) 6 2) 188 (dnf f-7-1 "opcode" (all-isas) 7 1) 189 (dnf f-8-1 "opcode" (all-isas) 8 1) 190 (dnf f-8-2 "opcode" (all-isas) 8 2) 191 (dnf f-8-3 "opcode" (all-isas) 8 3) 192 (dnf f-8-4 "opcode" (all-isas) 8 4) 193 (dnf f-8-8 "opcode" (all-isas) 8 8) 194 (dnf f-9-3 "opcode" (all-isas) 9 3) 195 (dnf f-9-1 "opcode" (all-isas) 9 1) 196 (dnf f-10-1 "opcode" (all-isas) 10 1) 197 (dnf f-10-2 "opcode" (all-isas) 10 2) 198 (dnf f-10-3 "opcode" (all-isas) 10 3) 199 (dnf f-11-1 "opcode" (all-isas) 11 1) 200 (dnf f-12-1 "opcode" (all-isas) 12 1) 201 (dnf f-12-2 "opcode" (all-isas) 12 2) 202 (dnf f-12-3 "opcode" (all-isas) 12 3) 203 (dnf f-12-4 "opcode" (all-isas) 12 4) 204 (dnf f-12-6 "opcode" (all-isas) 12 6) 205 (dnf f-13-3 "opcode" (all-isas) 13 3) 206 (dnf f-14-1 "opcode" (all-isas) 14 1) 207 (dnf f-14-2 "opcode" (all-isas) 14 2) 208 (dnf f-15-1 "opcode" (all-isas) 15 1) 209 (dnf f-16-1 "opcode" (all-isas) 16 1) 210 (dnf f-16-2 "opcode" (all-isas) 16 2) 211 (dnf f-16-4 "opcode" (all-isas) 16 4) 212 (dnf f-16-8 "opcode" (all-isas) 16 8) 213 (dnf f-18-1 "opcode" (all-isas) 18 1) 214 (dnf f-18-2 "opcode" (all-isas) 18 2) 215 (dnf f-18-3 "opcode" (all-isas) 18 3) 216 (dnf f-20-1 "opcode" (all-isas) 20 1) 217 (dnf f-20-3 "opcode" (all-isas) 20 3) 218 (dnf f-20-2 "opcode" (all-isas) 20 2) 219 (dnf f-20-4 "opcode" (all-isas) 20 4) 220 (dnf f-21-3 "opcode" (all-isas) 21 3) 221 (dnf f-24-2 "opcode" (all-isas) 24 2) 222 (dnf f-24-8 "opcode" (all-isas) 24 8) 223 (dnf f-32-16 "opcode" (all-isas) 32 16) 224 225 ;------------------------------------------------------------- 226 ; Registers 227 ;------------------------------------------------------------- 228 229 (dnf f-src16-rn "source Rn for m16c" (MACH16 m16c-isa) 10 2) 230 (dnf f-src16-an "source An for m16c" (MACH16 m16c-isa) 11 1) 231 232 (dnf f-src32-an-unprefixed "destination An for m32c" (MACH32 m32c-isa) 11 1) 233 (dnf f-src32-an-prefixed "destination An for m32c" (MACH32 m32c-isa) 19 1) 234 235 ; QI mode gr encoding for m32c is different than for m16c. The hardware 236 ; is indexed using the m16c encoding, so perform the transformation here. 237 ; register m16c m32c 238 ; ---------------------- 239 ; r0l 00'b 10'b 240 ; r0h 01'b 00'b 241 ; r1l 10'b 11'b 242 ; r1h 11'b 01'b 243 (df f-src32-rn-unprefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 10 2 UINT 244 ((value pc) (or USI (and (inv (sll value 1)) 2) (and (srl value 1) 1))) ; insert 245 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract 246 ) 247 ; QI mode gr encoding for m32c is different than for m16c. The hardware 248 ; is indexed using the m16c encoding, so perform the transformation here. 249 ; register m16c m32c 250 ; ---------------------- 251 ; r0l 00'b 10'b 252 ; r0h 01'b 00'b 253 ; r1l 10'b 11'b 254 ; r1h 11'b 01'b 255 (df f-src32-rn-prefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 18 2 UINT 256 ((value pc) (or USI (and (inv (sll value 1)) 2) (and (srl value 1) 1))) ; insert 257 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract 258 ) 259 ; HI mode gr encoding for m32c is different than for m16c. The hardware 260 ; is indexed using the m16c encoding, so perform the transformation here. 261 ; register m16c m32c 262 ; ---------------------- 263 ; r0 00'b 10'b 264 ; r1 01'b 11'b 265 ; r2 10'b 00'b 266 ; r3 11'b 01'b 267 (df f-src32-rn-unprefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 10 2 UINT 268 ((value pc) (mod USI (add value 2) 4)) ; insert 269 ((value pc) (mod USI (add value 2) 4)) ; extract 270 ) 271 272 ; HI mode gr encoding for m32c is different than for m16c. The hardware 273 ; is indexed using the m16c encoding, so perform the transformation here. 274 ; register m16c m32c 275 ; ---------------------- 276 ; r0 00'b 10'b 277 ; r1 01'b 11'b 278 ; r2 10'b 00'b 279 ; r3 11'b 01'b 280 (df f-src32-rn-prefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 18 2 UINT 281 ((value pc) (mod USI (add value 2) 4)) ; insert 282 ((value pc) (mod USI (add value 2) 4)) ; extract 283 ) 284 285 ; SI mode gr encoding for m32c is as follows: 286 ; register encoding index 287 ; ------------------------- 288 ; r2r0 10'b 0 289 ; r3r1 11'b 1 290 (df f-src32-rn-unprefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 10 2 UINT 291 ((value pc) (add USI value 2)) ; insert 292 ((value pc) (sub USI value 2)) ; extract 293 ) 294 (df f-src32-rn-prefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 18 2 UINT 295 ((value pc) (add USI value 2)) ; insert 296 ((value pc) (sub USI value 2)) ; extract 297 ) 298 299 (dnf f-dst32-rn-ext-unprefixed "destination Rn for m32c" (MACH32 m32c-isa) 9 1) 300 301 (dnf f-dst16-rn "destination Rn for m16c" (MACH16 m16c-isa) 14 2) 302 (dnf f-dst16-rn-ext "destination Rn for m16c" (MACH16 m16c-isa) 14 1) 303 (dnf f-dst16-rn-QI-s "destination Rn for m16c" (MACH16 m16c-isa) 5 1) 304 305 (dnf f-dst16-an "destination An for m16c" (MACH16 m16c-isa) 15 1) 306 (dnf f-dst16-an-s "destination An for m16c" (MACH16 m16c-isa) 4 1) 307 308 (dnf f-dst32-an-unprefixed "destination An for m32c" (MACH32 m32c-isa) 9 1) 309 (dnf f-dst32-an-prefixed "destination An for m32c" (MACH32 m32c-isa) 17 1) 310 311 ; QI mode gr encoding for m32c is different than for m16c. The hardware 312 ; is indexed using the m16c encoding, so perform the transformation here. 313 ; register m16c m32c 314 ; ---------------------- 315 ; r0l 00'b 10'b 316 ; r0h 01'b 00'b 317 ; r1l 10'b 11'b 318 ; r1h 11'b 01'b 319 (df f-dst32-rn-unprefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 8 2 UINT 320 ((value pc) (or USI (and (inv (sll value 1)) 2) (and (srl value 1) 1))) ; insert 321 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract 322 ) 323 (df f-dst32-rn-prefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 16 2 UINT 324 ((value pc) (or USI (and (inv (sll value 1)) 2) (and (srl value 1) 1))) ; insert 325 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract 326 ) 327 ; HI mode gr encoding for m32c is different than for m16c. The hardware 328 ; is indexed using the m16c encoding, so perform the transformation here. 329 ; register m16c m32c 330 ; ---------------------- 331 ; r0 00'b 10'b 332 ; r1 01'b 11'b 333 ; r2 10'b 00'b 334 ; r3 11'b 01'b 335 (df f-dst32-rn-unprefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 8 2 UINT 336 ((value pc) (mod USI (add value 2) 4)) ; insert 337 ((value pc) (mod USI (add value 2) 4)) ; extract 338 ) 339 (df f-dst32-rn-prefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 16 2 UINT 340 ((value pc) (mod USI (add value 2) 4)) ; insert 341 ((value pc) (mod USI (add value 2) 4)) ; extract 342 ) 343 ; SI mode gr encoding for m32c is as follows: 344 ; register encoding index 345 ; ------------------------- 346 ; r2r0 10'b 0 347 ; r3r1 11'b 1 348 (df f-dst32-rn-unprefixed-SI "destination Rn SI for m32c" (MACH32 m32c-isa) 8 2 UINT 349 ((value pc) (add USI value 2)) ; insert 350 ((value pc) (sub USI value 2)) ; extract 351 ) 352 (df f-dst32-rn-prefixed-SI "destination Rn SI for m32c" (MACH32 m32c-isa) 16 2 UINT 353 ((value pc) (add USI value 2)) ; insert 354 ((value pc) (sub USI value 2)) ; extract 355 ) 356 357 (dnf f-dst16-1-S "destination R0[hl] for m16c" (MACH16 m16c-isa) 5 1) 358 359 ;------------------------------------------------------------- 360 ; Immediates embedded in the base insn 361 ;------------------------------------------------------------- 362 363 (df f-imm-8-s4 "4 bit signed" (all-isas) 8 4 INT #f #f) 364 (df f-imm-12-s4 "4 bit signed" (all-isas) 12 4 INT #f #f) 365 (df f-imm-13-u3 "3 bit unsigned" (all-isas) 13 3 UINT #f #f) 366 (df f-imm-20-s4 "4 bit signed" (all-isas) 20 4 INT #f #f) 367 368 (df f-imm1-S "1 bit immediate for short format binary insns" (MACH32 m32c-isa) 2 1 UINT 369 ((value pc) (sub USI value 1)) ; insert 370 ((value pc) (add USI value 1)) ; extract 371 ) 372 373 (dnmf f-imm3-S "3 bit unsigned for short format insns" (all-isas) UINT 374 (f-2-2 f-7-1) 375 (sequence () ; insert 376 (set (ifield f-7-1) (and (sub (ifield f-imm3-S) 1) 1)) 377 (set (ifield f-2-2) (and (srl (sub (ifield f-imm3-S) 1) 1) #x3)) 378 ) 379 (sequence () ; extract 380 (set (ifield f-imm3-S) (add (or (sll (ifield f-2-2) 1) 381 (ifield f-7-1)) 382 1)) 383 ) 384 ) 385 386 ;------------------------------------------------------------- 387 ; Immediates and displacements beyond the base insn 388 ;------------------------------------------------------------- 389 390 (df f-dsp-8-u6 "6 bit unsigned" (all-isas) 8 6 UINT #f #f) 391 (df f-dsp-8-u8 "8 bit unsigned" (all-isas) 8 8 UINT #f #f) 392 (df f-dsp-8-s8 "8 bit signed" (all-isas) 8 8 INT #f #f) 393 (df f-dsp-10-u6 "6 bit unsigned" (all-isas) 10 6 UINT #f #f) 394 (df f-dsp-16-u8 "8 bit unsigned" (all-isas) 16 8 UINT #f #f) 395 (df f-dsp-16-s8 "8 bit signed" (all-isas) 16 8 INT #f #f) 396 (df f-dsp-24-u8 "8 bit unsigned" (all-isas) 24 8 UINT #f #f) 397 (df f-dsp-24-s8 "8 bit signed" (all-isas) 24 8 INT #f #f) 398 (df f-dsp-32-u8 "8 bit unsigned" (all-isas) 32 8 UINT #f #f) 399 (df f-dsp-32-s8 "8 bit signed" (all-isas) 32 8 INT #f #f) 400 (df f-dsp-40-u8 "8 bit unsigned" (all-isas) 40 8 UINT #f #f) 401 (df f-dsp-40-s8 "8 bit signed" (all-isas) 40 8 INT #f #f) 402 (df f-dsp-48-u8 "8 bit unsigned" (all-isas) 48 8 UINT #f #f) 403 (df f-dsp-48-s8 "8 bit signed" (all-isas) 48 8 INT #f #f) 404 (df f-dsp-56-u8 "8 bit unsigned" (all-isas) 56 8 UINT #f #f) 405 (df f-dsp-56-s8 "8 bit signed" (all-isas) 56 8 INT #f #f) 406 (df f-dsp-64-u8 "8 bit unsigned" (all-isas) 64 8 UINT #f #f) 407 (df f-dsp-64-s8 "8 bit signed" (all-isas) 64 8 INT #f #f) 408 409 ; Insn opcode endianness is big, but the immediate fields are stored 410 ; in little endian. Handle this here at the field level for all immediate 411 ; fields longer that 1 byte. 412 ; 413 ; CGEN can't handle a field which spans a 32 bit word boundary, so 414 ; handle those as multi ifields. 415 ; 416 ; Take care in expressions using 'srl' or 'sll' as part of some larger 417 ; expression meant to yield sign-extended values. CGEN translates 418 ; uses of those operators into C expressions whose type is 'unsigned 419 ; int', which tends to make the whole expression 'unsigned int'. 420 ; Expressions like (set (ifield foo) X), however, just take X and 421 ; store it in some member of 'struct cgen_fields', all of whose 422 ; members are 'long'. On machines where 'long' is larger than 423 ; 'unsigned int', assigning a "sign-extended" unsigned int to a long 424 ; just produces a very large positive value. insert_normal will 425 ; range-check the field's value and produce odd error messages like 426 ; this: 427 ; 428 ; Error: operand out of range (4160684031 not between -2147483648 and 2147483647) `add.l #-265,-270[fb]' 429 ; 430 ; Annoyingly, the code will work fine on machines where 'long' and 431 ; 'unsigned int' are the same size: the assignment will produce a 432 ; negative number. 433 ; 434 ; Just tell yourself over and over: overflow detection is expensive, 435 ; and you're glad C doesn't do it, because it never happens in real 436 ; life. 437 438 (df f-dsp-8-u16 "16 bit unsigned" (all-isas) 8 16 UINT 439 ((value pc) (or UHI 440 (and (srl value 8) #xff) 441 (sll (and value #xff) 8))) ; insert 442 ((value pc) (or UHI 443 (and UHI (srl UHI value 8) #xff) 444 (sll UHI (and UHI value #xff) 8))) ; extract 445 ) 446 447 (df f-dsp-8-s16 "8 bit signed" (all-isas) 8 16 INT 448 ((value pc) (ext INT 449 (trunc HI 450 (or (and (srl value 8) #xff) 451 (sll (and value #xff) 8))))) ; insert 452 ((value pc) (ext INT 453 (trunc HI 454 (or (and (srl value 8) #xff) 455 (sll (and value #xff) 8))))) ; extract 456 ) 457 458 (df f-dsp-16-u16 "16 bit unsigned" (all-isas) 16 16 UINT 459 ((value pc) (or UHI 460 (and (srl value 8) #xff) 461 (sll (and value #xff) 8))) ; insert 462 ((value pc) (or UHI 463 (and UHI (srl UHI value 8) #xff) 464 (sll UHI (and UHI value #xff) 8))) ; extract 465 ) 466 467 (df f-dsp-16-s16 "16 bit signed" (all-isas) 16 16 INT 468 ((value pc) (ext INT 469 (trunc HI 470 (or (and (srl value 8) #xff) 471 (sll (and value #xff) 8))))) ; insert 472 ((value pc) (ext INT 473 (trunc HI 474 (or (and (srl value 8) #xff) 475 (sll (and value #xff) 8))))) ; extract 476 ) 477 478 (dnmf f-dsp-24-u16 "16 bit unsigned" (all-isas) UINT 479 (f-dsp-24-u8 f-dsp-32-u8) 480 (sequence () ; insert 481 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-u16) #xff)) 482 (set (ifield f-dsp-32-u8) (and (srl (ifield f-dsp-24-u16) 8) #xff)) 483 ) 484 (sequence () ; extract 485 (set (ifield f-dsp-24-u16) (or (sll (ifield f-dsp-32-u8) 8) 486 (ifield f-dsp-24-u8))) 487 ) 488 ) 489 490 (dnmf f-dsp-24-s16 "16 bit signed" (all-isas) INT 491 (f-dsp-24-u8 f-dsp-32-u8) 492 (sequence () ; insert 493 (set (ifield f-dsp-24-u8) 494 (and (ifield f-dsp-24-s16) #xff)) 495 (set (ifield f-dsp-32-u8) 496 (and (srl (ifield f-dsp-24-s16) 8) #xff)) 497 ) 498 (sequence () ; extract 499 (set (ifield f-dsp-24-s16) 500 (ext INT 501 (trunc HI (or (sll (ifield f-dsp-32-u8) 8) 502 (ifield f-dsp-24-u8))))) 503 ) 504 ) 505 506 (df f-dsp-32-u16 "16 bit unsigned" (all-isas) 32 16 UINT 507 ((value pc) (or UHI 508 (and (srl value 8) #xff) 509 (sll (and value #xff) 8))) ; insert 510 ((value pc) (or UHI 511 (and UHI (srl UHI value 8) #xff) 512 (sll UHI (and UHI value #xff) 8))) ; extract 513 ) 514 515 (df f-dsp-32-s16 "16 bit signed" (all-isas) 32 16 INT 516 ((value pc) (ext INT 517 (trunc HI 518 (or (and (srl value 8) #xff) 519 (sll (and value #xff) 8))))) ; insert 520 ((value pc) (ext INT 521 (trunc HI 522 (or (and (srl value 8) #xff) 523 (sll (and value #xff) 8))))) ; extract 524 ) 525 526 (df f-dsp-40-u16 "16 bit unsigned" (all-isas) 40 16 UINT 527 ((value pc) (or UHI 528 (and (srl value 8) #xff) 529 (sll (and value #xff) 8))) ; insert 530 ((value pc) (or UHI 531 (and UHI (srl UHI value 8) #xff) 532 (sll UHI (and UHI value #xff) 8))) ; extract 533 ) 534 535 (df f-dsp-40-s16 "16 bit signed" (all-isas) 40 16 INT 536 ((value pc) (ext INT 537 (trunc HI 538 (or (and (srl value 8) #xff) 539 (sll (and value #xff) 8))))) ; insert 540 ((value pc) (ext INT 541 (trunc HI 542 (or (and (srl value 8) #xff) 543 (sll (and value #xff) 8))))) ; extract 544 ) 545 546 (df f-dsp-48-u16 "16 bit unsigned" (all-isas) 48 16 UINT 547 ((value pc) (or UHI 548 (and (srl value 8) #xff) 549 (sll (and value #xff) 8))) ; insert 550 ((value pc) (or UHI 551 (and UHI (srl UHI value 8) #xff) 552 (sll UHI (and UHI value #xff) 8))) ; extract 553 ) 554 555 (df f-dsp-48-s16 "16 bit signed" (all-isas) 48 16 INT 556 ((value pc) (ext INT 557 (trunc HI 558 (or (and (srl value 8) #xff) 559 (sll (and value #xff) 8))))) ; insert 560 ((value pc) (ext INT 561 (trunc HI 562 (or (and (srl value 8) #xff) 563 (sll (and value #xff) 8))))) ; extract 564 ) 565 566 (df f-dsp-64-u16 "16 bit unsigned" (all-isas) 64 16 UINT 567 ((value pc) (or UHI 568 (and (srl value 8) #xff) 569 (sll (and value #xff) 8))) ; insert 570 ((value pc) (or UHI 571 (and UHI (srl UHI value 8) #xff) 572 (sll UHI (and UHI value #xff) 8))) ; extract 573 ) 574 (df f-dsp-8-s24 "24 bit signed" (all-isas) 8 24 INT 575 ((value pc) (sub SI (xor (or SI (or (and (srl value 16) #xff) 576 (and value #xff00)) 577 (sll (and value #xff) 16)) 578 #x800000) #x800000)) 579 ((value pc) (sub SI (xor (or SI 580 (or (and (srl value 16) #xff) 581 (and value #xff00)) 582 (sll (and value #xff) 16)) 583 #x800000) #x800000)) 584 ) 585 586 (df f-dsp-8-u24 "24 bit unsigned" (all-isas) 8 24 UINT 587 ((value pc) (or SI 588 (or (srl value 16) (and value #xff00)) 589 (sll (and value #xff) 16))) 590 ((value pc) (or SI 591 (or (srl value 16) (and value #xff00)) 592 (sll (and value #xff) 16))) 593 ) 594 595 (dnmf f-dsp-16-u24 "24 bit unsigned" (all-isas) UINT 596 (f-dsp-16-u16 f-dsp-32-u8) 597 (sequence () ; insert 598 (set (ifield f-dsp-16-u16) (and (ifield f-dsp-16-u24) #xffff)) 599 (set (ifield f-dsp-32-u8) (and (srl (ifield f-dsp-16-u24) 16) #xff)) 600 ) 601 (sequence () ; extract 602 (set (ifield f-dsp-16-u24) (or (sll (ifield f-dsp-32-u8) 16) 603 (ifield f-dsp-16-u16))) 604 ) 605 ) 606 607 (dnmf f-dsp-24-u24 "24 bit unsigned" (all-isas) UINT 608 (f-dsp-24-u8 f-dsp-32-u16) 609 (sequence () ; insert 610 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-u24) #xff)) 611 (set (ifield f-dsp-32-u16) (and (srl (ifield f-dsp-24-u24) 8) #xffff)) 612 ) 613 (sequence () ; extract 614 (set (ifield f-dsp-24-u24) (or (sll (ifield f-dsp-32-u16) 8) 615 (ifield f-dsp-24-u8))) 616 ) 617 ) 618 619 (df f-dsp-32-u24 "24 bit unsigned" (all-isas) 32 24 UINT 620 ((value pc) (or USI 621 (or USI 622 (and (srl value 16) #x0000ff) 623 (and value #x00ff00)) 624 (and (sll value 16) #xff0000))) ; insert 625 ((value pc) (or USI 626 (or USI 627 (and USI (srl value 16) #x0000ff) 628 (and USI value #x00ff00)) 629 (and USI (sll value 16) #xff0000))) ; extract 630 ) 631 632 (df f-dsp-40-u20 "20 bit unsigned" (all-isas) 40 20 UINT 633 ((value pc) (or USI 634 (or USI 635 (and (srl value 16) #x0000ff) 636 (and value #x00ff00)) 637 (and (sll value 16) #x0f0000))) ; insert 638 ((value pc) (or USI 639 (or USI 640 (and USI (srl value 16) #x0000ff) 641 (and USI value #x00ff00)) 642 (and USI (sll value 16) #x0f0000))) ; extract 643 ) 644 645 (df f-dsp-40-u24 "24 bit unsigned" (all-isas) 40 24 UINT 646 ((value pc) (or USI 647 (or USI 648 (and (srl value 16) #x0000ff) 649 (and value #x00ff00)) 650 (and (sll value 16) #xff0000))) ; insert 651 ((value pc) (or USI 652 (or USI 653 (and USI (srl value 16) #x0000ff) 654 (and USI value #x00ff00)) 655 (and USI (sll value 16) #xff0000))) ; extract 656 ) 657 658 (dnmf f-dsp-40-s32 "32 bit signed" (all-isas) INT 659 (f-dsp-40-u24 f-dsp-64-u8) 660 (sequence () ; insert 661 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-40-s32) 24) #xff)) 662 (set (ifield f-dsp-40-u24) (and (ifield f-dsp-40-s32) #xffffff)) 663 ) 664 (sequence () ; extract 665 (set (ifield f-dsp-40-s32) (or (and (ifield f-dsp-40-u24) #xffffff) 666 (and (sll (ifield f-dsp-64-u8) 24) #xff000000))) 667 ) 668 ) 669 670 (dnmf f-dsp-48-u20 "20 bit unsigned" (all-isas) UINT 671 (f-dsp-48-u16 f-dsp-64-u8) 672 (sequence () ; insert 673 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-48-u20) 16) #x0f)) 674 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u20) #xffff)) 675 ) 676 (sequence () ; extract 677 (set (ifield f-dsp-48-u20) (or (and (ifield f-dsp-48-u16) #xffff) 678 (and (sll (ifield f-dsp-64-u8) 16) #x0f0000))) 679 ) 680 ) 681 (dnmf f-dsp-48-u24 "24 bit unsigned" (all-isas) UINT 682 (f-dsp-48-u16 f-dsp-64-u8) 683 (sequence () ; insert 684 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-48-u24) 16) #xff)) 685 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u24) #xffff)) 686 ) 687 (sequence () ; extract 688 (set (ifield f-dsp-48-u24) (or (and (ifield f-dsp-48-u16) #xffff) 689 (and (sll (ifield f-dsp-64-u8) 16) #xff0000))) 690 ) 691 ) 692 693 (dnmf f-dsp-16-s32 "32 bit signed" (all-isas) INT 694 (f-dsp-16-u16 f-dsp-32-u16) 695 (sequence () ; insert 696 (set (ifield f-dsp-32-u16) (and (srl (ifield f-dsp-16-s32) 16) #xffff)) 697 (set (ifield f-dsp-16-u16) (and (ifield f-dsp-16-s32) #xffff)) 698 ) 699 (sequence () ; extract 700 (set (ifield f-dsp-16-s32) (or (and (ifield f-dsp-16-u16) #xffff) 701 (and (sll (ifield f-dsp-32-u16) 16) #xffff0000))) 702 ) 703 ) 704 705 (dnmf f-dsp-24-s32 "32 bit signed" (all-isas) INT 706 (f-dsp-24-u8 f-dsp-32-u24) 707 (sequence () ; insert 708 (set (ifield f-dsp-32-u24) (and (srl (ifield f-dsp-24-s32) 8) #xffffff)) 709 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-s32) #xff)) 710 ) 711 (sequence () ; extract 712 (set (ifield f-dsp-24-s32) (or (and (ifield f-dsp-24-u8) #xff) 713 (and (sll (ifield f-dsp-32-u24) 8) #xffffff00))) 714 ) 715 ) 716 717 (df f-dsp-32-s32 "32 bit signed" (all-isas) 32 32 INT 718 ((value pc) 719 720 ;; insert 721 (ext INT 722 (or SI 723 (or SI 724 (and (srl value 24) #x00ff) 725 (and (srl value 8) #xff00)) 726 (or SI 727 (sll (and value #xff00) 8) 728 (sll (and value #x00ff) 24))))) 729 730 ;; extract 731 ((value pc) 732 (ext INT 733 (or SI 734 (or SI 735 (and (srl value 24) #x00ff) 736 (and (srl value 8) #xff00)) 737 (or SI 738 (sll (and value #xff00) 8) 739 (sll (and value #x00ff) 24))))) 740 ) 741 742 (dnmf f-dsp-48-u32 "32 bit unsigned" (all-isas) UINT 743 (f-dsp-48-u16 f-dsp-64-u16) 744 (sequence () ; insert 745 (set (ifield f-dsp-64-u16) (and (srl (ifield f-dsp-48-u32) 16) #xffff)) 746 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u32) #xffff)) 747 ) 748 (sequence () ; extract 749 (set (ifield f-dsp-48-u32) (or (and (ifield f-dsp-48-u16) #xffff) 750 (sll (and (ifield f-dsp-64-u16) #xffff) 16))) 751 ) 752 ) 753 754 (dnmf f-dsp-48-s32 "32 bit signed" (all-isas) INT 755 (f-dsp-48-u16 f-dsp-64-u16) 756 (sequence () ; insert 757 (set (ifield f-dsp-64-u16) (and (srl (ifield f-dsp-48-s32) 16) #xffff)) 758 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-s32) #xffff)) 759 ) 760 (sequence () ; extract 761 (set (ifield f-dsp-48-s32) (or (and (ifield f-dsp-48-u16) #xffff) 762 (sll (and (ifield f-dsp-64-u16) #xffff) 16))) 763 ) 764 ) 765 766 (dnmf f-dsp-56-s16 "16 bit signed" (all-isas) INT 767 (f-dsp-56-u8 f-dsp-64-u8) 768 (sequence () ; insert 769 (set (ifield f-dsp-56-u8) 770 (and (ifield f-dsp-56-s16) #xff)) 771 (set (ifield f-dsp-64-u8) 772 (and (srl (ifield f-dsp-56-s16) 8) #xff)) 773 ) 774 (sequence () ; extract 775 (set (ifield f-dsp-56-s16) 776 (ext INT 777 (trunc HI (or (sll (ifield f-dsp-64-u8) 8) 778 (ifield f-dsp-56-u8))))) 779 ) 780 ) 781 782 (df f-dsp-64-s16 " 16 bit signed" (all-isas) 64 16 INT 783 ((value pc) (ext INT 784 (trunc HI 785 (or (and (srl value 8) #xff) 786 (sll (and value #xff) 8))))) ; insert 787 ((value pc) (ext INT 788 (trunc HI 789 (or (and (srl value 8) #xff) 790 (sll (and value #xff) 8))))) ; extract 791 ) 792 793 ;------------------------------------------------------------- 794 ; Bit indices 795 ;------------------------------------------------------------- 796 797 (dnf f-bitno16-S "bit index for m16c" (all-isas) 5 3) 798 (dnf f-bitno32-prefixed "bit index for m32c" (all-isas) 21 3) 799 (dnf f-bitno32-unprefixed "bit index for m32c" (all-isas) 13 3) 800 801 (dnmf f-bitbase16-u11-S "unsigned bit,base:11" (all-isas) UINT 802 (f-bitno16-S f-dsp-8-u8) 803 (sequence () ; insert 804 (set (ifield f-bitno16-S) (and f-bitbase16-u11-S #x7)) 805 (set (ifield f-dsp-8-u8) (and (srl (ifield f-bitbase16-u11-S) 3) #xff)) 806 ) 807 (sequence () ; extract 808 (set (ifield f-bitbase16-u11-S) (or (sll (ifield f-dsp-8-u8) 3) 809 (ifield f-bitno16-S))) 810 ) 811 ) 812 813 (dnmf f-bitbase32-16-u11-unprefixed "unsigned bit,base:11" (all-isas) UINT 814 (f-bitno32-unprefixed f-dsp-16-u8) 815 (sequence () ; insert 816 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u11-unprefixed #x7)) 817 (set (ifield f-dsp-16-u8) (and (srl (ifield f-bitbase32-16-u11-unprefixed) 3) #xff)) 818 ) 819 (sequence () ; extract 820 (set (ifield f-bitbase32-16-u11-unprefixed) (or (sll (ifield f-dsp-16-u8) 3) 821 (ifield f-bitno32-unprefixed))) 822 ) 823 ) 824 (dnmf f-bitbase32-16-s11-unprefixed "signed bit,base:11" (all-isas) INT 825 (f-bitno32-unprefixed f-dsp-16-s8) 826 (sequence () ; insert 827 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-s11-unprefixed #x7)) 828 (set (ifield f-dsp-16-s8) (sra INT (ifield f-bitbase32-16-s11-unprefixed) 3)) 829 ) 830 (sequence () ; extract 831 (set (ifield f-bitbase32-16-s11-unprefixed) (or (mul (ifield f-dsp-16-s8) 8) 832 (ifield f-bitno32-unprefixed))) 833 ) 834 ) 835 (dnmf f-bitbase32-16-u19-unprefixed "unsigned bit,base:19" (all-isas) UINT 836 (f-bitno32-unprefixed f-dsp-16-u16) 837 (sequence () ; insert 838 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u19-unprefixed #x7)) 839 (set (ifield f-dsp-16-u16) (and (srl (ifield f-bitbase32-16-u19-unprefixed) 3) #xffff)) 840 ) 841 (sequence () ; extract 842 (set (ifield f-bitbase32-16-u19-unprefixed) (or (sll (ifield f-dsp-16-u16) 3) 843 (ifield f-bitno32-unprefixed))) 844 ) 845 ) 846 (dnmf f-bitbase32-16-s19-unprefixed "signed bit,base:11" (all-isas) INT 847 (f-bitno32-unprefixed f-dsp-16-s16) 848 (sequence () ; insert 849 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-s19-unprefixed #x7)) 850 (set (ifield f-dsp-16-s16) (sra INT (ifield f-bitbase32-16-s19-unprefixed) 3)) 851 ) 852 (sequence () ; extract 853 (set (ifield f-bitbase32-16-s19-unprefixed) (or (mul (ifield f-dsp-16-s16) 8) 854 (ifield f-bitno32-unprefixed))) 855 ) 856 ) 857 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-( 858 (dnmf f-bitbase32-16-u27-unprefixed "unsigned bit,base:27" (all-isas) UINT 859 (f-bitno32-unprefixed f-dsp-16-u16 f-dsp-32-u8) 860 (sequence () ; insert 861 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u27-unprefixed #x7)) 862 (set (ifield f-dsp-16-u16) (and (srl (ifield f-bitbase32-16-u27-unprefixed) 3) #xffff)) 863 (set (ifield f-dsp-32-u8) (and (srl (ifield f-bitbase32-16-u27-unprefixed) 19) #xff)) 864 ) 865 (sequence () ; extract 866 (set (ifield f-bitbase32-16-u27-unprefixed) (or (sll (ifield f-dsp-16-u16) 3) 867 (or (sll (ifield f-dsp-32-u8) 19) 868 (ifield f-bitno32-unprefixed)))) 869 ) 870 ) 871 (dnmf f-bitbase32-24-u11-prefixed "unsigned bit,base:11" (all-isas) UINT 872 (f-bitno32-prefixed f-dsp-24-u8) 873 (sequence () ; insert 874 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u11-prefixed #x7)) 875 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u11-prefixed) 3) #xff)) 876 ) 877 (sequence () ; extract 878 (set (ifield f-bitbase32-24-u11-prefixed) (or (sll (ifield f-dsp-24-u8) 3) 879 (ifield f-bitno32-prefixed))) 880 ) 881 ) 882 (dnmf f-bitbase32-24-s11-prefixed "signed bit,base:11" (all-isas) INT 883 (f-bitno32-prefixed f-dsp-24-s8) 884 (sequence () ; insert 885 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-s11-prefixed #x7)) 886 (set (ifield f-dsp-24-s8) (sra INT (ifield f-bitbase32-24-s11-prefixed) 3)) 887 ) 888 (sequence () ; extract 889 (set (ifield f-bitbase32-24-s11-prefixed) (or (mul (ifield f-dsp-24-s8) 8) 890 (ifield f-bitno32-prefixed))) 891 ) 892 ) 893 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-( 894 (dnmf f-bitbase32-24-u19-prefixed "unsigned bit,base:19" (all-isas) UINT 895 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-u8) 896 (sequence () ; insert 897 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u19-prefixed #x7)) 898 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u19-prefixed) 3) #xff)) 899 (set (ifield f-dsp-32-u8) (and (srl (ifield f-bitbase32-24-u19-prefixed) 11) #xff)) 900 ) 901 (sequence () ; extract 902 (set (ifield f-bitbase32-24-u19-prefixed) (or (sll (ifield f-dsp-24-u8) 3) 903 (or (sll (ifield f-dsp-32-u8) 11) 904 (ifield f-bitno32-prefixed)))) 905 ) 906 ) 907 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-( 908 (dnmf f-bitbase32-24-s19-prefixed "signed bit,base:11" (all-isas) INT 909 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-s8) 910 (sequence () ; insert 911 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-s19-prefixed #x7)) 912 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-s19-prefixed) 3) #xff)) 913 (set (ifield f-dsp-32-s8) (sra INT (ifield f-bitbase32-24-s19-prefixed) 11)) 914 ) 915 (sequence () ; extract 916 (set (ifield f-bitbase32-24-s19-prefixed) (or (sll (ifield f-dsp-24-u8) 3) 917 (or (mul (ifield f-dsp-32-s8) 2048) 918 (ifield f-bitno32-prefixed)))) 919 ) 920 ) 921 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-( 922 (dnmf f-bitbase32-24-u27-prefixed "unsigned bit,base:27" (all-isas) UINT 923 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-u16) 924 (sequence () ; insert 925 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u27-prefixed #x7)) 926 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u27-prefixed) 3) #xff)) 927 (set (ifield f-dsp-32-u16) (and (srl (ifield f-bitbase32-24-u27-prefixed) 11) #xffff)) 928 ) 929 (sequence () ; extract 930 (set (ifield f-bitbase32-24-u27-prefixed) (or (sll (ifield f-dsp-24-u8) 3) 931 (or (sll (ifield f-dsp-32-u16) 11) 932 (ifield f-bitno32-prefixed)))) 933 ) 934 ) 935 936 ;------------------------------------------------------------- 937 ; Labels 938 ;------------------------------------------------------------- 939 940 (df f-lab-5-3 "3 bit pc relative unsigned offset" (PCREL-ADDR all-isas) 5 3 UINT 941 ((value pc) (sub SI value (add SI pc 2))) ; insert 942 ((value pc) (add SI value (add SI pc 2))) ; extract 943 ) 944 (dnmf f-lab32-jmp-s "unsigned 3 bit pc relative offset" (PCREL-ADDR all-isas) UINT 945 (f-2-2 f-7-1) 946 (sequence ((SI val)) ; insert 947 (set val (sub (sub (ifield f-lab32-jmp-s) pc) 2)) 948 (set (ifield f-7-1) (and val #x1)) 949 (set (ifield f-2-2) (srl val 1)) 950 ) 951 (sequence () ; extract 952 (set (ifield f-lab32-jmp-s) (add pc (add (or (sll (ifield f-2-2) 1) 953 (ifield f-7-1)) 954 2))) 955 ) 956 ) 957 (df f-lab-8-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 8 8 INT 958 ((value pc) (sub SI value (add SI pc 1))) ; insert 959 ((value pc) (add SI value (add SI pc 1))) ; extract 960 ) 961 (df f-lab-8-16 "16 bit pc relative signed offset" (PCREL-ADDR SIGN-OPT all-isas) 8 16 UINT 962 ((value pc) (or SI (sll (and (sub value (add pc 1)) #xff) 8) 963 (srl (and (sub value (add pc 1)) #xff00) 8))) 964 ((value pc) (add SI (sub (xor (or (srl (and value #xff00) 8) 965 (sll (and value #xff) 8)) 966 #x8000) 967 #x8000) 968 (add pc 1))) 969 ) 970 (df f-lab-8-24 "24 bit absolute" (all-isas ABS-ADDR) 8 24 UINT 971 ((value pc) (or SI 972 (or (srl value 16) (and value #xff00)) 973 (sll (and value #xff) 16))) 974 ((value pc) (or SI 975 (or (srl value 16) (and value #xff00)) 976 (sll (and value #xff) 16))) 977 ) 978 (df f-lab-16-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 16 8 INT 979 ((value pc) (sub SI value (add SI pc 2))) ; insert 980 ((value pc) (add SI value (add SI pc 2))) ; extract 981 ) 982 (df f-lab-24-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 24 8 INT 983 ((value pc) (sub SI value (add SI pc 2))) ; insert 984 ((value pc) (add SI value (add SI pc 2))) ; extract 985 ) 986 (df f-lab-32-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 32 8 INT 987 ((value pc) (sub SI value (add SI pc 2))) ; insert 988 ((value pc) (add SI value (add SI pc 2))) ; extract 989 ) 990 (df f-lab-40-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 40 8 INT 991 ((value pc) (sub SI value (add SI pc 2))) ; insert 992 ((value pc) (add SI value (add SI pc 2))) ; extract 993 ) 994 995 ;------------------------------------------------------------- 996 ; Condition codes 997 ;------------------------------------------------------------- 998 999 (dnf f-cond16 "condition code" (all-isas) 12 4) 1000 (dnf f-cond16j-5 "condition code" (all-isas) 5 3) 1001 1002 (dnmf f-cond32 "condition code" (all-isas) UINT 1003 (f-9-1 f-13-3) 1004 (sequence () ; insert 1005 (set (ifield f-9-1) (and (srl (ifield f-cond32) 3) 1)) 1006 (set (ifield f-13-3) (and (ifield f-cond32) #x7)) 1007 ) 1008 (sequence () ; extract 1009 (set (ifield f-cond32) (or (sll (ifield f-9-1) 3) 1010 (ifield f-13-3))) 1011 ) 1012 ) 1013 1014 (dnmf f-cond32j "condition code" (all-isas) UINT 1015 (f-1-3 f-7-1) 1016 (sequence () ; insert 1017 (set (ifield f-1-3) (and (srl (ifield f-cond32j) 1) #x7)) 1018 (set (ifield f-7-1) (and (ifield f-cond32j) #x1)) 1019 ) 1020 (sequence () ; extract 1021 (set (ifield f-cond32j) (or (sll (ifield f-1-3) 1) 1022 (ifield f-7-1))) 1023 ) 1024 ) 1025 1027 ;============================================================= 1028 ; Hardware 1029 ; 1030 (dnh h-pc "program counter" (PC all-isas) (pc USI) () () ()) 1031 1032 ;------------------------------------------------------------- 1033 ; General registers 1034 ; The actual registers are 16 bits 1035 ;------------------------------------------------------------- 1036 1037 (define-hardware 1038 (name h-gr) 1039 (comment "general 16 bit registers") 1040 (attrs all-isas CACHE-ADDR) 1041 (type register HI (4)) 1042 (indices keyword "" (("r0" 0) ("r1" 1) ("r2" 2) ("r3" 3)))) 1043 1044 ; Define different views of the grs as VIRTUAL with getter/setter specs 1045 ; 1046 (define-hardware 1047 (name h-gr-QI) 1048 (comment "general 8 bit registers") 1049 (attrs all-isas VIRTUAL) 1050 (type register QI (4)) 1051 (indices keyword "" (("r0l" 0) ("r0h" 1) ("r1l" 2) ("r1h" 3))) 1052 (get (index) (and (if SI (mod index 2) 1053 (srl (reg h-gr (div index 2)) 8) 1054 (reg h-gr (div index 2))) 1055 #xff)) 1056 (set (index newval) (set (reg h-gr (div index 2)) 1057 (if SI (mod index 2) 1058 (or (and (reg h-gr (div index 2)) #xff) 1059 (sll (and newval #xff) 8)) 1060 (or (and (reg h-gr (div index 2)) #xff00) 1061 (and newval #xff)))))) 1062 1063 (define-hardware 1064 (name h-gr-HI) 1065 (comment "general 16 bit registers") 1066 (attrs all-isas VIRTUAL) 1067 (type register HI (4)) 1068 (indices keyword "" (("r0" 0) ("r1" 1) ("r2" 2) ("r3" 3))) 1069 (get (index) (reg h-gr index)) 1070 (set (index newval) (set (reg h-gr index) newval))) 1071 1072 (define-hardware 1073 (name h-gr-SI) 1074 (comment "general 32 bit registers") 1075 (attrs all-isas VIRTUAL) 1076 (type register SI (2)) 1077 (indices keyword "" (("r2r0" 0) ("r3r1" 1))) 1078 (get (index) (or SI 1079 (and (reg h-gr index) #xffff) 1080 (sll (and (reg h-gr (add index 2)) #xffff) 16))) 1081 (set (index newval) (sequence () 1082 (set (reg h-gr index) (and newval #xffff)) 1083 (set (reg h-gr (add index 2)) (srl newval 16))))) 1084 1085 (define-hardware 1086 (name h-gr-ext-QI) 1087 (comment "general 16 bit registers") 1088 (attrs all-isas VIRTUAL) 1089 (type register HI (2)) 1090 (indices keyword "" (("r0l" 0) ("r1l" 1))) 1091 (get (index) (reg h-gr-QI (mul index 2))) 1092 (set (index newval) (set (reg h-gr (mul index 2)) newval))) 1093 1094 (define-hardware 1095 (name h-gr-ext-HI) 1096 (comment "general 16 bit registers") 1097 (attrs all-isas VIRTUAL) 1098 (type register SI (2)) 1099 (indices keyword "" (("r0" 0) ("r1" 1))) 1100 (get (index) (reg h-gr (mul index 2))) 1101 (set (index newval) (set (reg h-gr-SI index) newval))) 1102 1103 (define-hardware 1104 (name h-r0l) 1105 (comment "r0l register") 1106 (attrs all-isas VIRTUAL) 1107 (type register QI) 1108 (indices keyword "" (("r0l" 0))) 1109 (get () (reg h-gr-QI 0)) 1110 (set (newval) (set (reg h-gr-QI 0) newval))) 1111 1112 (define-hardware 1113 (name h-r0h) 1114 (comment "r0h register") 1115 (attrs all-isas VIRTUAL) 1116 (type register QI) 1117 (indices keyword "" (("r0h" 0))) 1118 (get () (reg h-gr-QI 1)) 1119 (set (newval) (set (reg h-gr-QI 1) newval))) 1120 1121 (define-hardware 1122 (name h-r1l) 1123 (comment "r1l register") 1124 (attrs all-isas VIRTUAL) 1125 (type register QI) 1126 (indices keyword "" (("r1l" 0))) 1127 (get () (reg h-gr-QI 2)) 1128 (set (newval) (set (reg h-gr-QI 2) newval))) 1129 1130 (define-hardware 1131 (name h-r1h) 1132 (comment "r1h register") 1133 (attrs all-isas VIRTUAL) 1134 (type register QI) 1135 (indices keyword "" (("r1h" 0))) 1136 (get () (reg h-gr-QI 3)) 1137 (set (newval) (set (reg h-gr-QI 3) newval))) 1138 1139 (define-hardware 1140 (name h-r0) 1141 (comment "r0 register") 1142 (attrs all-isas VIRTUAL) 1143 (type register HI) 1144 (indices keyword "" (("r0" 0))) 1145 (get () (reg h-gr 0)) 1146 (set (newval) (set (reg h-gr 0) newval))) 1147 1148 (define-hardware 1149 (name h-r1) 1150 (comment "r1 register") 1151 (attrs all-isas VIRTUAL) 1152 (type register HI) 1153 (indices keyword "" (("r1" 0))) 1154 (get () (reg h-gr 1)) 1155 (set (newval) (set (reg h-gr 1) newval))) 1156 1157 (define-hardware 1158 (name h-r2) 1159 (comment "r2 register") 1160 (attrs all-isas VIRTUAL) 1161 (type register HI) 1162 (indices keyword "" (("r2" 0))) 1163 (get () (reg h-gr 2)) 1164 (set (newval) (set (reg h-gr 2) newval))) 1165 1166 (define-hardware 1167 (name h-r3) 1168 (comment "r3 register") 1169 (attrs all-isas VIRTUAL) 1170 (type register HI) 1171 (indices keyword "" (("r3" 0))) 1172 (get () (reg h-gr 3)) 1173 (set (newval) (set (reg h-gr 3) newval))) 1174 1175 (define-hardware 1176 (name h-r0l-r0h) 1177 (comment "r0l or r0h") 1178 (attrs all-isas VIRTUAL) 1179 (type register QI (2)) 1180 (indices keyword "" (("r0l" 0) ("r0h" 1))) 1181 (get (index) (reg h-gr-QI index)) 1182 (set (index newval) (set (reg h-gr-QI index) newval))) 1183 1184 (define-hardware 1185 (name h-r2r0) 1186 (comment "r2r0 register") 1187 (attrs all-isas VIRTUAL) 1188 (type register SI) 1189 (indices keyword "" (("r2r0" 0))) 1190 (get () (or (sll (reg h-gr 2) 16) (reg h-gr 0))) 1191 (set (newval) 1192 (sequence () 1193 (set (reg h-gr 0) newval) 1194 (set (reg h-gr 2) (sra newval 16))))) 1195 1196 (define-hardware 1197 (name h-r3r1) 1198 (comment "r3r1 register") 1199 (attrs all-isas VIRTUAL) 1200 (type register SI) 1201 (indices keyword "" (("r3r1" 0))) 1202 (get () (or (sll (reg h-gr 3) 16) (reg h-gr 1))) 1203 (set (newval) 1204 (sequence () 1205 (set (reg h-gr 1) newval) 1206 (set (reg h-gr 3) (sra newval 16))))) 1207 1208 (define-hardware 1209 (name h-r1r2r0) 1210 (comment "r1r2r0 register") 1211 (attrs all-isas VIRTUAL) 1212 (type register DI) 1213 (indices keyword "" (("r1r2r0" 0))) 1214 (get () (or DI (sll DI (reg h-gr 1) 32) (or (sll (reg h-gr 2) 16) (reg h-gr 0)))) 1215 (set (newval) 1216 (sequence () 1217 (set (reg h-gr 0) newval) 1218 (set (reg h-gr 2) (sra newval 16)) 1219 (set (reg h-gr 1) (sra newval 32))))) 1220 1221 ;------------------------------------------------------------- 1222 ; Address registers 1223 ;------------------------------------------------------------- 1224 1225 (define-hardware 1226 (name h-ar) 1227 (comment "address registers") 1228 (attrs all-isas) 1229 (type register USI (2)) 1230 (indices keyword "" (("a0" 0) ("a1" 1))) 1231 (get (index) (c-call USI "h_ar_get_handler" index)) 1232 (set (index newval) (c-call VOID "h_ar_set_handler" index newval))) 1233 1234 ; Define different views of the ars as VIRTUAL with getter/setter specs 1235 (define-hardware 1236 (name h-ar-QI) 1237 (comment "8 bit view of address register") 1238 (attrs all-isas VIRTUAL) 1239 (type register QI (2)) 1240 (indices keyword "" (("a0" 0) ("a1" 1))) 1241 (get (index) (reg h-ar index)) 1242 (set (index newval) (set (reg h-ar index) newval))) 1243 1244 (define-hardware 1245 (name h-ar-HI) 1246 (comment "16 bit view of address register") 1247 (attrs all-isas VIRTUAL) 1248 (type register HI (2)) 1249 (indices keyword "" (("a0" 0) ("a1" 1))) 1250 (get (index) (reg h-ar index)) 1251 (set (index newval) (set (reg h-ar index) newval))) 1252 1253 (define-hardware 1254 (name h-ar-SI) 1255 (comment "32 bit view of address register") 1256 (attrs all-isas VIRTUAL) 1257 (type register SI) 1258 (indices keyword "" (("a1a0" 0))) 1259 (get () (or SI (sll SI (ext SI (reg h-ar 1)) 16) (ext SI (reg h-ar 0)))) 1260 (set (newval) (sequence () 1261 (set (reg h-ar 0) (and newval #xffff)) 1262 (set (reg h-ar 1) (and (srl newval 16) #xffff))))) 1263 1264 (define-hardware 1265 (name h-a0) 1266 (comment "16 bit view of address register") 1267 (attrs all-isas VIRTUAL) 1268 (type register HI) 1269 (indices keyword "" (("a0" 0))) 1270 (get () (reg h-ar 0)) 1271 (set (newval) (set (reg h-ar 0) newval))) 1272 1273 (define-hardware 1274 (name h-a1) 1275 (comment "16 bit view of address register") 1276 (attrs all-isas VIRTUAL) 1277 (type register HI) 1278 (indices keyword "" (("a1" 1))) 1279 (get () (reg h-ar 1)) 1280 (set (newval) (set (reg h-ar 1) newval))) 1281 1282 ; SB Register 1283 (define-hardware 1284 (name h-sb) 1285 (comment "SB register") 1286 (attrs all-isas) 1287 (type register USI) 1288 (get () (c-call USI "h_sb_get_handler")) 1289 (set (newval) (c-call VOID "h_sb_set_handler" newval)) 1290 ) 1291 1292 ; FB Register 1293 (define-hardware 1294 (name h-fb) 1295 (comment "FB register") 1296 (attrs all-isas) 1297 (type register USI) 1298 (get () (c-call USI "h_fb_get_handler")) 1299 (set (newval) (c-call VOID "h_fb_set_handler" newval)) 1300 ) 1301 1302 ; SP Register 1303 (define-hardware 1304 (name h-sp) 1305 (comment "SP register") 1306 (attrs all-isas) 1307 (type register USI) 1308 (get () (c-call USI "h_sp_get_handler")) 1309 (set (newval) (c-call VOID "h_sp_set_handler" newval)) 1310 ) 1311 1312 ;------------------------------------------------------------- 1313 ; condition-code bits 1314 ;------------------------------------------------------------- 1315 1316 (define-hardware 1317 (name h-sbit) 1318 (comment "sign bit") 1319 (attrs all-isas) 1320 (type register BI) 1321 ) 1322 1323 (define-hardware 1324 (name h-zbit) 1325 (comment "zero bit") 1326 (attrs all-isas) 1327 (type register BI) 1328 ) 1329 1330 (define-hardware 1331 (name h-obit) 1332 (comment "overflow bit") 1333 (attrs all-isas) 1334 (type register BI) 1335 ) 1336 1337 (define-hardware 1338 (name h-cbit) 1339 (comment "carry bit") 1340 (attrs all-isas) 1341 (type register BI) 1342 ) 1343 1344 (define-hardware 1345 (name h-ubit) 1346 (comment "stack pointer select bit") 1347 (attrs all-isas) 1348 (type register BI) 1349 ) 1350 1351 (define-hardware 1352 (name h-ibit) 1353 (comment "interrupt enable bit") 1354 (attrs all-isas) 1355 (type register BI) 1356 ) 1357 1358 (define-hardware 1359 (name h-bbit) 1360 (comment "register bank select bit") 1361 (attrs all-isas) 1362 (type register BI) 1363 ) 1364 1365 (define-hardware 1366 (name h-dbit) 1367 (comment "debug bit") 1368 (attrs all-isas) 1369 (type register BI) 1370 ) 1371 1372 (define-hardware 1373 (name h-dct0) 1374 (comment "dma transfer count 000") 1375 (attrs all-isas) 1376 (type register UHI) 1377 ) 1378 (define-hardware 1379 (name h-dct1) 1380 (comment "dma transfer count 001") 1381 (attrs all-isas) 1382 (type register UHI) 1383 ) 1384 (define-hardware 1385 (name h-svf) 1386 (comment "save flag 011") 1387 (attrs all-isas) 1388 (type register UHI) 1389 ) 1390 (define-hardware 1391 (name h-drc0) 1392 (comment "dma transfer count reload 100") 1393 (attrs all-isas) 1394 (type register UHI) 1395 ) 1396 (define-hardware 1397 (name h-drc1) 1398 (comment "dma transfer count reload 101") 1399 (attrs all-isas) 1400 (type register UHI) 1401 ) 1402 (define-hardware 1403 (name h-dmd0) 1404 (comment "dma mode 110") 1405 (attrs all-isas) 1406 (type register UQI) 1407 ) 1408 (define-hardware 1409 (name h-dmd1) 1410 (comment "dma mode 111") 1411 (attrs all-isas) 1412 (type register UQI) 1413 ) 1414 (define-hardware 1415 (name h-intb) 1416 (comment "interrupt table 000") 1417 (attrs all-isas) 1418 (type register USI) 1419 ) 1420 (define-hardware 1421 (name h-svp) 1422 (comment "save pc 100") 1423 (attrs all-isas) 1424 (type register UHI) 1425 ) 1426 (define-hardware 1427 (name h-vct) 1428 (comment "vector 101") 1429 (attrs all-isas) 1430 (type register USI) 1431 ) 1432 (define-hardware 1433 (name h-isp) 1434 (comment "interrupt stack ptr 111") 1435 (attrs all-isas) 1436 (type register USI) 1437 ) 1438 (define-hardware 1439 (name h-dma0) 1440 (comment "dma mem addr 010") 1441 (attrs all-isas) 1442 (type register USI) 1443 ) 1444 (define-hardware 1445 (name h-dma1) 1446 (comment "dma mem addr 011") 1447 (attrs all-isas) 1448 (type register USI) 1449 ) 1450 (define-hardware 1451 (name h-dra0) 1452 (comment "dma mem addr reload 100") 1453 (attrs all-isas) 1454 (type register USI) 1455 ) 1456 (define-hardware 1457 (name h-dra1) 1458 (comment "dma mem addr reload 101") 1459 (attrs all-isas) 1460 (type register USI) 1461 ) 1462 (define-hardware 1463 (name h-dsa0) 1464 (comment "dma sfr addr 110") 1465 (attrs all-isas) 1466 (type register USI) 1467 ) 1468 (define-hardware 1469 (name h-dsa1) 1470 (comment "dma sfr addr 111") 1471 (attrs all-isas) 1472 (type register USI) 1473 ) 1474 1475 ;------------------------------------------------------------- 1476 ; Condition code operand hardware 1477 ;------------------------------------------------------------- 1478 1479 (define-hardware 1480 (name h-cond16) 1481 (comment "condition code hardware for m16c") 1482 (attrs m16c-isa MACH16) 1483 (type immediate UQI) 1484 (values keyword "" 1485 (("geu" #x00) ("c" #x00) 1486 ("gtu" #x01) 1487 ("eq" #x02) ("z" #x02) 1488 ("n" #x03) 1489 ("le" #x04) 1490 ("o" #x05) 1491 ("ge" #x06) 1492 ("ltu" #xf8) ("nc" #xf8) 1493 ("leu" #xf9) 1494 ("ne" #xfa) ("nz" #xfa) 1495 ("pz" #xfb) 1496 ("gt" #xfc) 1497 ("no" #xfd) 1498 ("lt" #xfe) 1499 ) 1500 ) 1501 ) 1502 (define-hardware 1503 (name h-cond16c) 1504 (comment "condition code hardware for m16c") 1505 (attrs m16c-isa MACH16) 1506 (type immediate UQI) 1507 (values keyword "" 1508 (("geu" #x00) ("c" #x00) 1509 ("gtu" #x01) 1510 ("eq" #x02) ("z" #x02) 1511 ("n" #x03) 1512 ("ltu" #x04) ("nc" #x04) 1513 ("leu" #x05) 1514 ("ne" #x06) ("nz" #x06) 1515 ("pz" #x07) 1516 ("le" #x08) 1517 ("o" #x09) 1518 ("ge" #x0a) 1519 ("gt" #x0c) 1520 ("no" #x0d) 1521 ("lt" #x0e) 1522 ) 1523 ) 1524 ) 1525 (define-hardware 1526 (name h-cond16j) 1527 (comment "condition code hardware for m16c") 1528 (attrs m16c-isa MACH16) 1529 (type immediate UQI) 1530 (values keyword "" 1531 (("le" #x08) 1532 ("o" #x09) 1533 ("ge" #x0a) 1534 ("gt" #x0c) 1535 ("no" #x0d) 1536 ("lt" #x0e) 1537 ) 1538 ) 1539 ) 1540 (define-hardware 1541 (name h-cond16j-5) 1542 (comment "condition code hardware for m16c") 1543 (attrs m16c-isa MACH16) 1544 (type immediate UQI) 1545 (values keyword "" 1546 (("geu" #x00) ("c" #x00) 1547 ("gtu" #x01) 1548 ("eq" #x02) ("z" #x02) 1549 ("n" #x03) 1550 ("ltu" #x04) ("nc" #x04) 1551 ("leu" #x05) 1552 ("ne" #x06) ("nz" #x06) 1553 ("pz" #x07) 1554 ) 1555 ) 1556 ) 1557 1558 (define-hardware 1559 (name h-cond32) 1560 (comment "condition code hardware for m32c") 1561 (attrs m32c-isa MACH32) 1562 (type immediate UQI) 1563 (values keyword "" 1564 (("ltu" #x00) ("nc" #x00) 1565 ("leu" #x01) 1566 ("ne" #x02) ("nz" #x02) 1567 ("pz" #x03) 1568 ("no" #x04) 1569 ("gt" #x05) 1570 ("ge" #x06) 1571 ("geu" #x08) ("c" #x08) 1572 ("gtu" #x09) 1573 ("eq" #x0a) ("z" #x0a) 1574 ("n" #x0b) 1575 ("o" #x0c) 1576 ("le" #x0d) 1577 ("lt" #x0e) 1578 ) 1579 ) 1580 ) 1581 1582 (define-hardware 1583 (name h-cr1-32) 1584 (comment "control registers") 1585 (attrs m32c-isa MACH32) 1586 (type immediate UQI) 1587 (values keyword "" (("dct0" 0) ("dct1" 1) ("flg" 2) ("svf" 3) ("drc0" 4) 1588 ("drc1" 5) ("dmd0" 6) ("dmd1" 7)))) 1589 (define-hardware 1590 (name h-cr2-32) 1591 (comment "control registers") 1592 (attrs m32c-isa MACH32) 1593 (type immediate UQI) 1594 (values keyword "" (("intb" 0) ("sp" 1) ("sb" 2) ("fb" 3) ("svp" 4) 1595 ("vct" 5) ("isp" 7)))) 1596 1597 (define-hardware 1598 (name h-cr3-32) 1599 (comment "control registers") 1600 (attrs m32c-isa MACH32) 1601 (type immediate UQI) 1602 (values keyword "" (("dma0" 2) ("dma1" 3) ("dra0" 4) 1603 ("dra1" 5) ("dsa0" 6) ("dsa1" 7)))) 1604 (define-hardware 1605 (name h-cr-16) 1606 (comment "control registers") 1607 (attrs m16c-isa MACH16) 1608 (type immediate UQI) 1609 (values keyword "" (("intbl" 1) ("intbh" 2) ("flg" 3) ("isp" 4) 1610 ("sp" 5) ("sb" 6) ("fb" 7)))) 1611 1612 (define-hardware 1613 (name h-flags) 1614 (comment "flag hardware for m32c") 1615 (attrs all-isas) 1616 (type immediate UQI) 1617 (values keyword "" 1618 (("c" #x0) 1619 ("d" #x1) 1620 ("z" #x2) 1621 ("s" #x3) 1622 ("b" #x4) 1623 ("o" #x5) 1624 ("i" #x6) 1625 ("u" #x7) 1626 ) 1627 ) 1628 ) 1629 1630 ;------------------------------------------------------------- 1631 ; Misc helper hardware 1632 ;------------------------------------------------------------- 1633 1634 (define-hardware 1635 (name h-shimm) 1636 (comment "shift immediate") 1637 (attrs all-isas) 1638 (type immediate (INT 4)) 1639 (values keyword "" (("1" 0) ("2" 1) ("3" 2) ("4" 3) ("5" 4) ("6" 5) ("7" 6) 1640 ("8" 7) ("-1" -8) ("-2" -7) ("-3" -6) ("-4" -5) ("-5" -4) 1641 ("-6" -3) ("-7" -2) ("-8" -1) 1642 ))) 1643 (define-hardware 1644 (name h-bit-index) 1645 (comment "bit index for the next insn") 1646 (attrs m32c-isa MACH32) 1647 (type register UHI) 1648 ) 1649 (define-hardware 1650 (name h-src-index) 1651 (comment "source index for the next insn") 1652 (attrs m32c-isa MACH32) 1653 (type register UHI) 1654 ) 1655 (define-hardware 1656 (name h-dst-index) 1657 (comment "destination index for the next insn") 1658 (attrs m32c-isa MACH32) 1659 (type register UHI) 1660 ) 1661 (define-hardware 1662 (name h-src-indirect) 1663 (comment "indirect src for the next insn") 1664 (attrs all-isas) 1665 (type register UHI) 1666 ) 1667 (define-hardware 1668 (name h-dst-indirect) 1669 (comment "indirect dst for the next insn") 1670 (attrs all-isas) 1671 (type register UHI) 1672 ) 1673 (define-hardware 1674 (name h-none) 1675 (comment "for storing unused values") 1676 (attrs m32c-isa MACH32) 1677 (type register SI) 1678 ) 1679 1681 ;============================================================= 1682 ; Operands 1683 ;------------------------------------------------------------- 1684 ; Source Registers 1685 ;------------------------------------------------------------- 1686 1687 (dnop Src16RnQI "general register QI view" (MACH16 m16c-isa) h-gr-QI f-src16-rn) 1688 (dnop Src16RnHI "general register QH view" (MACH16 m16c-isa) h-gr-HI f-src16-rn) 1689 1690 (dnop Src32RnUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-src32-rn-unprefixed-QI) 1691 (dnop Src32RnUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-src32-rn-unprefixed-HI) 1692 (dnop Src32RnUnprefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-src32-rn-unprefixed-SI) 1693 1694 (dnop Src32RnPrefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-src32-rn-prefixed-QI) 1695 (dnop Src32RnPrefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-src32-rn-prefixed-HI) 1696 (dnop Src32RnPrefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-src32-rn-prefixed-SI) 1697 1698 (dnop Src16An "address register" (MACH16 m16c-isa) h-ar f-src16-an) 1699 (dnop Src16AnQI "address register QI view" (MACH16 m16c-isa) h-ar-QI f-src16-an) 1700 (dnop Src16AnHI "address register HI view" (MACH16 m16c-isa) h-ar-HI f-src16-an) 1701 1702 (dnop Src32AnUnprefixed "address register" (MACH32 m32c-isa) h-ar f-src32-an-unprefixed) 1703 (dnop Src32AnUnprefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-src32-an-unprefixed) 1704 (dnop Src32AnUnprefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-src32-an-unprefixed) 1705 (dnop Src32AnUnprefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-src32-an-unprefixed) 1706 1707 (dnop Src32AnPrefixed "address register" (MACH32 m32c-isa) h-ar f-src32-an-prefixed) 1708 (dnop Src32AnPrefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-src32-an-prefixed) 1709 (dnop Src32AnPrefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-src32-an-prefixed) 1710 (dnop Src32AnPrefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-src32-an-prefixed) 1711 1712 ; Destination Registers 1713 ; 1714 (dnop Dst16RnQI "general register QI view" (MACH16 m16c-isa) h-gr-QI f-dst16-rn) 1715 (dnop Dst16RnHI "general register HI view" (MACH16 m16c-isa) h-gr-HI f-dst16-rn) 1716 (dnop Dst16RnSI "general register SI view" (MACH16 m16c-isa) h-gr-SI f-dst16-rn) 1717 (dnop Dst16RnExtQI "general register QI/HI view for 'ext' insns" (MACH16 m16c-isa) h-gr-ext-QI f-dst16-rn-ext) 1718 1719 (dnop Dst32R0QI-S "general register QI view" (MACH32 m32c-isa) h-r0l f-nil) 1720 (dnop Dst32R0HI-S "general register HI view" (MACH32 m32c-isa) h-r0 f-nil) 1721 1722 (dnop Dst32RnUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-unprefixed-QI) 1723 (dnop Dst32RnUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-dst32-rn-unprefixed-HI) 1724 (dnop Dst32RnUnprefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-dst32-rn-unprefixed-SI) 1725 (dnop Dst32RnExtUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-ext-QI f-dst32-rn-ext-unprefixed) 1726 (dnop Dst32RnExtUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-ext-HI f-dst32-rn-ext-unprefixed) 1727 1728 (dnop Dst32RnPrefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-prefixed-QI) 1729 (dnop Dst32RnPrefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-dst32-rn-prefixed-HI) 1730 (dnop Dst32RnPrefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-dst32-rn-prefixed-SI) 1731 1732 (dnop Dst16RnQI-S "general register QI view" (MACH16 m16c-isa) h-r0l-r0h f-dst16-rn-QI-s) 1733 1734 (dnop Dst16AnQI-S "address register QI view" (MACH16 m16c-isa) h-ar-QI f-dst16-rn-QI-s) 1735 1736 (dnop Bit16Rn "general register bit view" (MACH16 m16c-isa) h-gr-HI f-dst16-rn) 1737 1738 (dnop Bit32RnPrefixed "general register bit view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-prefixed-QI) 1739 (dnop Bit32RnUnprefixed "general register bit view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-unprefixed-QI) 1740 1741 (dnop R0 "r0" (all-isas) h-r0 f-nil) 1742 (dnop R1 "r1" (all-isas) h-r1 f-nil) 1743 (dnop R2 "r2" (all-isas) h-r2 f-nil) 1744 (dnop R3 "r3" (all-isas) h-r3 f-nil) 1745 (dnop R0l "r0l" (all-isas) h-r0l f-nil) 1746 (dnop R0h "r0h" (all-isas) h-r0h f-nil) 1747 (dnop R2R0 "r2r0" (all-isas) h-r2r0 f-nil) 1748 (dnop R3R1 "r3r1" (all-isas) h-r3r1 f-nil) 1749 (dnop R1R2R0 "r1r2r0" (all-isas) h-r1r2r0 f-nil) 1750 1751 (dnop Dst16An "address register" (MACH16 m16c-isa) h-ar f-dst16-an) 1752 (dnop Dst16AnQI "address register QI view" (MACH16 m16c-isa) h-ar-QI f-dst16-an) 1753 (dnop Dst16AnHI "address register HI view" (MACH16 m16c-isa) h-ar-HI f-dst16-an) 1754 (dnop Dst16AnSI "address register SI view" (MACH16 m16c-isa) h-ar-SI f-dst16-an) 1755 (dnop Dst16An-S "address register HI view" (MACH16 m16c-isa) h-ar-HI f-dst16-an-s) 1756 1757 (dnop Dst32AnUnprefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed) 1758 (dnop Dst32AnUnprefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-dst32-an-unprefixed) 1759 (dnop Dst32AnUnprefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-dst32-an-unprefixed) 1760 (dnop Dst32AnUnprefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed) 1761 1762 (dnop Dst32AnExtUnprefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed) 1763 1764 (dnop Dst32AnPrefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed) 1765 (dnop Dst32AnPrefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-dst32-an-prefixed) 1766 (dnop Dst32AnPrefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-dst32-an-prefixed) 1767 (dnop Dst32AnPrefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed) 1768 1769 (dnop Bit16An "address register bit view" (MACH16 m16c-isa) h-ar f-dst16-an) 1770 1771 (dnop Bit32AnPrefixed "address register bit" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed) 1772 (dnop Bit32AnUnprefixed "address register bit" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed) 1773 1774 (dnop A0 "a0" (all-isas) h-a0 f-nil) 1775 (dnop A1 "a1" (all-isas) h-a1 f-nil) 1776 1777 (dnop sb "SB register" (all-isas SEM-ONLY) h-sb f-nil) 1778 (dnop fb "FB register" (all-isas SEM-ONLY) h-fb f-nil) 1779 (dnop sp "SP register" (all-isas SEM-ONLY) h-sp f-nil) 1780 1781 (define-full-operand SrcDst16-r0l-r0h-S-normal "r0l/r0h pair" (MACH16 m16c-isa) 1782 h-sint DFLT f-5-1 1783 ((parse "r0l_r0h") (print "r0l_r0h")) () () 1784 ) 1785 1786 (define-full-operand Regsetpop "popm regset" (all-isas) h-uint 1787 DFLT f-8-8 ((parse "pop_regset") (print "pop_regset")) () ()) 1788 (define-full-operand Regsetpush "pushm regset" (all-isas) h-uint 1789 DFLT f-8-8 ((parse "push_regset") (print "push_regset")) () ()) 1790 1791 (dnop Rn16-push-S "r0[lh]" (MACH16 m16c-isa) h-gr-QI f-4-1) 1792 (dnop An16-push-S "a[01]" (MACH16 m16c-isa) h-ar-HI f-4-1) 1793 1794 ;------------------------------------------------------------- 1795 ; Offsets and absolutes 1796 ;------------------------------------------------------------- 1797 1798 (define-full-operand Dsp-8-u6 "unsigned 6 bit displacement at offset 8 bits" (all-isas) 1799 h-uint DFLT f-dsp-8-u6 1800 ((parse "unsigned6")) () () 1801 ) 1802 (define-full-operand Dsp-8-u8 "unsigned 8 bit displacement at offset 8 bits" (all-isas) 1803 h-uint DFLT f-dsp-8-u8 1804 ((parse "unsigned8")) () () 1805 ) 1806 (define-full-operand Dsp-8-u16 "unsigned 16 bit displacement at offset 8 bits" (all-isas) 1807 h-uint DFLT f-dsp-8-u16 1808 ((parse "unsigned16")) () () 1809 ) 1810 (define-full-operand Dsp-8-s8 "signed 8 bit displacement at offset 8 bits" (all-isas) 1811 h-sint DFLT f-dsp-8-s8 1812 ((parse "signed8")) () () 1813 ) 1814 (define-full-operand Dsp-8-s24 "signed 24 bit displacement at offset 8 bits" (all-isas) 1815 h-sint DFLT f-dsp-8-s24 1816 ((parse "signed24")) () () 1817 ) 1818 (define-full-operand Dsp-8-u24 "unsigned 24 bit displacement at offset 8 bits" (all-isas) 1819 h-uint DFLT f-dsp-8-u24 1820 ((parse "unsigned24")) () () 1821 ) 1822 (define-full-operand Dsp-10-u6 "unsigned 6 bit displacement at offset 10 bits" (all-isas) 1823 h-uint DFLT f-dsp-10-u6 1824 ((parse "unsigned6")) () () 1825 ) 1826 (define-full-operand Dsp-16-u8 "unsigned 8 bit displacement at offset 16 bits" (all-isas) 1827 h-uint DFLT f-dsp-16-u8 1828 ((parse "unsigned8")) () () 1829 ) 1830 (define-full-operand Dsp-16-u16 "unsigned 16 bit displacement at offset 16 bits" (all-isas) 1831 h-uint DFLT f-dsp-16-u16 1832 ((parse "unsigned16")) () () 1833 ) 1834 (define-full-operand Dsp-16-u20 "unsigned 20 bit displacement at offset 16 bits" (all-isas) 1835 h-uint DFLT f-dsp-16-u24 1836 ((parse "unsigned20")) () () 1837 ) 1838 (define-full-operand Dsp-16-u24 "unsigned 24 bit displacement at offset 16 bits" (all-isas) 1839 h-uint DFLT f-dsp-16-u24 1840 ((parse "unsigned24")) () () 1841 ) 1842 (define-full-operand Dsp-16-s8 "signed 8 bit displacement at offset 16 bits" (all-isas) 1843 h-sint DFLT f-dsp-16-s8 1844 ((parse "signed8")) () () 1845 ) 1846 (define-full-operand Dsp-16-s16 "signed 16 bit displacement at offset 16 bits" (all-isas) 1847 h-sint DFLT f-dsp-16-s16 1848 ((parse "signed16")) () () 1849 ) 1850 (define-full-operand Dsp-24-u8 "unsigned 8 bit displacement at offset 24 bits" (all-isas) 1851 h-uint DFLT f-dsp-24-u8 1852 ((parse "unsigned8")) () () 1853 ) 1854 (define-full-operand Dsp-24-u16 "unsigned 16 bit displacement at offset 24 bits" (all-isas) 1855 h-uint DFLT f-dsp-24-u16 1856 ((parse "unsigned16")) () () 1857 ) 1858 (define-full-operand Dsp-24-u20 "unsigned 20 bit displacement at offset 24 bits" (all-isas) 1859 h-uint DFLT f-dsp-24-u24 1860 ((parse "unsigned20")) () () 1861 ) 1862 (define-full-operand Dsp-24-u24 "unsigned 24 bit displacement at offset 24 bits" (all-isas) 1863 h-uint DFLT f-dsp-24-u24 1864 ((parse "unsigned24")) () () 1865 ) 1866 (define-full-operand Dsp-24-s8 "signed 8 bit displacement at offset 24 bits" (all-isas) 1867 h-sint DFLT f-dsp-24-s8 1868 ((parse "signed8")) () () 1869 ) 1870 (define-full-operand Dsp-24-s16 "signed 16 bit displacement at offset 24 bits" (all-isas) 1871 h-sint DFLT f-dsp-24-s16 1872 ((parse "signed16")) () () 1873 ) 1874 (define-full-operand Dsp-32-u8 "unsigned 8 bit displacement at offset 32 bits" (all-isas) 1875 h-uint DFLT f-dsp-32-u8 1876 ((parse "unsigned8")) () () 1877 ) 1878 (define-full-operand Dsp-32-u16 "unsigned 16 bit displacement at offset 32 bits" (all-isas) 1879 h-uint DFLT f-dsp-32-u16 1880 ((parse "unsigned16")) () () 1881 ) 1882 (define-full-operand Dsp-32-u24 "unsigned 24 bit displacement at offset 32 bits" (all-isas) 1883 h-uint DFLT f-dsp-32-u24 1884 ((parse "unsigned24")) () () 1885 ) 1886 (define-full-operand Dsp-32-u20 "unsigned 20 bit displacement at offset 32 bits" (all-isas) 1887 h-uint DFLT f-dsp-32-u24 1888 ((parse "unsigned20")) () () 1889 ) 1890 (define-full-operand Dsp-32-s8 "signed 8 bit displacement at offset 32 bits" (all-isas) 1891 h-sint DFLT f-dsp-32-s8 1892 ((parse "signed8")) () () 1893 ) 1894 (define-full-operand Dsp-32-s16 "signed 16 bit displacement at offset 32 bits" (all-isas) 1895 h-sint DFLT f-dsp-32-s16 1896 ((parse "signed16")) () () 1897 ) 1898 (define-full-operand Dsp-40-u8 "unsigned 8 bit displacement at offset 40 bits" (all-isas) 1899 h-uint DFLT f-dsp-40-u8 1900 ((parse "unsigned8")) () () 1901 ) 1902 (define-full-operand Dsp-40-s8 "signed 8 bit displacement at offset 40 bits" (all-isas) 1903 h-sint DFLT f-dsp-40-s8 1904 ((parse "signed8")) () () 1905 ) 1906 (define-full-operand Dsp-40-u16 "unsigned 16 bit displacement at offset 40 bits" (all-isas) 1907 h-uint DFLT f-dsp-40-u16 1908 ((parse "unsigned16")) () () 1909 ) 1910 (define-full-operand Dsp-40-s16 "signed 16 bit displacement at offset 40 bits" (all-isas) 1911 h-sint DFLT f-dsp-40-s16 1912 ((parse "signed16")) () () 1913 ) 1914 (define-full-operand Dsp-40-u20 "unsigned 20 bit displacement at offset 40 bits" (all-isas) 1915 h-uint DFLT f-dsp-40-u20 1916 ((parse "unsigned20")) () () 1917 ) 1918 (define-full-operand Dsp-40-u24 "unsigned 24 bit displacement at offset 40 bits" (all-isas) 1919 h-uint DFLT f-dsp-40-u24 1920 ((parse "unsigned24")) () () 1921 ) 1922 (define-full-operand Dsp-48-u8 "unsigned 8 bit displacement at offset 48 bits" (all-isas) 1923 h-uint DFLT f-dsp-48-u8 1924 ((parse "unsigned8")) () () 1925 ) 1926 (define-full-operand Dsp-48-s8 "signed 8 bit displacement at offset 48 bits" (all-isas) 1927 h-sint DFLT f-dsp-48-s8 1928 ((parse "signed8")) () () 1929 ) 1930 (define-full-operand Dsp-48-u16 "unsigned 16 bit displacement at offset 48 bits" (all-isas) 1931 h-uint DFLT f-dsp-48-u16 1932 ((parse "unsigned16")) () () 1933 ) 1934 (define-full-operand Dsp-48-s16 "signed 16 bit displacement at offset 48 bits" (all-isas) 1935 h-sint DFLT f-dsp-48-s16 1936 ((parse "signed16")) () () 1937 ) 1938 (define-full-operand Dsp-48-u20 "unsigned 24 bit displacement at offset 40 bits" (all-isas) 1939 h-uint DFLT f-dsp-48-u20 1940 ((parse "unsigned24")) () () 1941 ) 1942 (define-full-operand Dsp-48-u24 "unsigned 24 bit displacement at offset 48 bits" (all-isas) 1943 h-uint DFLT f-dsp-48-u24 1944 ((parse "unsigned24")) () () 1945 ) 1946 1947 (define-full-operand Imm-8-s4 "signed 4 bit immediate at offset 8 bits" (all-isas) 1948 h-sint DFLT f-imm-8-s4 1949 ((parse "signed4")) () () 1950 ) 1951 (define-full-operand Imm-8-s4n "negated 4 bit immediate at offset 8 bits" (all-isas) 1952 h-sint DFLT f-imm-8-s4 1953 ((parse "signed4n") (print "signed4n")) () () 1954 ) 1955 (define-full-operand Imm-sh-8-s4 "signed 4 bit shift immediate at offset 8 bits" (all-isas) 1956 h-shimm DFLT f-imm-8-s4 1957 () () () 1958 ) 1959 (define-full-operand Imm-8-QI "signed 8 bit immediate at offset 8 bits" (all-isas) 1960 h-sint DFLT f-dsp-8-s8 1961 ((parse "signed8")) () () 1962 ) 1963 (define-full-operand Imm-8-HI "signed 16 bit immediate at offset 8 bits" (all-isas) 1964 h-sint DFLT f-dsp-8-s16 1965 ((parse "signed16")) () () 1966 ) 1967 (define-full-operand Imm-12-s4 "signed 4 bit immediate at offset 12 bits" (all-isas) 1968 h-sint DFLT f-imm-12-s4 1969 ((parse "signed4")) () () 1970 ) 1971 (define-full-operand Imm-12-s4n "negated 4 bit immediate at offset 12 bits" (all-isas) 1972 h-sint DFLT f-imm-12-s4 1973 ((parse "signed4n") (print "signed4n")) () () 1974 ) 1975 (define-full-operand Imm-sh-12-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas) 1976 h-shimm DFLT f-imm-12-s4 1977 () () () 1978 ) 1979 (define-full-operand Imm-13-u3 "signed 3 bit immediate at offset 13 bits" (all-isas) 1980 h-sint DFLT f-imm-13-u3 1981 ((parse "signed4")) () () 1982 ) 1983 (define-full-operand Imm-20-s4 "signed 4 bit immediate at offset 20 bits" (all-isas) 1984 h-sint DFLT f-imm-20-s4 1985 ((parse "signed4")) () () 1986 ) 1987 (define-full-operand Imm-sh-20-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas) 1988 h-shimm DFLT f-imm-20-s4 1989 () () () 1990 ) 1991 (define-full-operand Imm-16-QI "signed 8 bit immediate at offset 16 bits" (all-isas) 1992 h-sint DFLT f-dsp-16-s8 1993 ((parse "signed8")) () () 1994 ) 1995 (define-full-operand Imm-16-HI "signed 16 bit immediate at offset 16 bits" (all-isas) 1996 h-sint DFLT f-dsp-16-s16 1997 ((parse "signed16")) () () 1998 ) 1999 (define-full-operand Imm-16-SI "signed 32 bit immediate at offset 16 bits" (all-isas) 2000 h-sint DFLT f-dsp-16-s32 2001 ((parse "signed32")) () () 2002 ) 2003 (define-full-operand Imm-24-QI "signed 8 bit immediate at offset 24 bits" (all-isas) 2004 h-sint DFLT f-dsp-24-s8 2005 ((parse "signed8")) () () 2006 ) 2007 (define-full-operand Imm-24-HI "signed 16 bit immediate at offset 24 bits" (all-isas) 2008 h-sint DFLT f-dsp-24-s16 2009 ((parse "signed16")) () () 2010 ) 2011 (define-full-operand Imm-24-SI "signed 32 bit immediate at offset 24 bits" (all-isas) 2012 h-sint DFLT f-dsp-24-s32 2013 ((parse "signed32")) () () 2014 ) 2015 (define-full-operand Imm-32-QI "signed 8 bit immediate at offset 32 bits" (all-isas) 2016 h-sint DFLT f-dsp-32-s8 2017 ((parse "signed8")) () () 2018 ) 2019 (define-full-operand Imm-32-SI "signed 32 bit immediate at offset 32 bits" (all-isas) 2020 h-sint DFLT f-dsp-32-s32 2021 ((parse "signed32")) () () 2022 ) 2023 (define-full-operand Imm-32-HI "signed 16 bit immediate at offset 32 bits" (all-isas) 2024 h-sint DFLT f-dsp-32-s16 2025 ((parse "signed16")) () () 2026 ) 2027 (define-full-operand Imm-40-QI "signed 8 bit immediate at offset 40 bits" (all-isas) 2028 h-sint DFLT f-dsp-40-s8 2029 ((parse "signed8")) () () 2030 ) 2031 (define-full-operand Imm-40-HI "signed 16 bit immediate at offset 40 bits" (all-isas) 2032 h-sint DFLT f-dsp-40-s16 2033 ((parse "signed16")) () () 2034 ) 2035 (define-full-operand Imm-40-SI "signed 32 bit immediate at offset 40 bits" (all-isas) 2036 h-sint DFLT f-dsp-40-s32 2037 ((parse "signed32")) () () 2038 ) 2039 (define-full-operand Imm-48-QI "signed 8 bit immediate at offset 48 bits" (all-isas) 2040 h-sint DFLT f-dsp-48-s8 2041 ((parse "signed8")) () () 2042 ) 2043 (define-full-operand Imm-48-HI "signed 16 bit immediate at offset 48 bits" (all-isas) 2044 h-sint DFLT f-dsp-48-s16 2045 ((parse "signed16")) () () 2046 ) 2047 (define-full-operand Imm-48-SI "signed 32 bit immediate at offset 48 bits" (all-isas) 2048 h-sint DFLT f-dsp-48-s32 2049 ((parse "signed32")) () () 2050 ) 2051 (define-full-operand Imm-56-QI "signed 8 bit immediate at offset 56 bits" (all-isas) 2052 h-sint DFLT f-dsp-56-s8 2053 ((parse "signed8")) () () 2054 ) 2055 (define-full-operand Imm-56-HI "signed 16 bit immediate at offset 56 bits" (all-isas) 2056 h-sint DFLT f-dsp-56-s16 2057 ((parse "signed16")) () () 2058 ) 2059 (define-full-operand Imm-64-HI "signed 16 bit immediate at offset 64 bits" (all-isas) 2060 h-sint DFLT f-dsp-64-s16 2061 ((parse "signed16")) () () 2062 ) 2063 (define-full-operand Imm1-S "signed 1 bit immediate for short format binary insns" (m32c-isa) 2064 h-sint DFLT f-imm1-S 2065 ((parse "imm1_S")) () () 2066 ) 2067 (define-full-operand Imm3-S "signed 3 bit immediate for short format binary insns" (m32c-isa) 2068 h-sint DFLT f-imm3-S 2069 ((parse "imm3_S")) () () 2070 ) 2071 (define-full-operand Bit3-S "3 bit bit number" (m32c-isa) 2072 h-sint DFLT f-imm3-S 2073 ((parse "bit3_S")) () () 2074 ) 2075 2076 ;------------------------------------------------------------- 2077 ; Bit numbers 2078 ;------------------------------------------------------------- 2079 2080 (define-full-operand Bitno16R "bit number for indexing registers" (m16c-isa) 2081 h-uint DFLT f-dsp-16-u8 2082 ((parse "Bitno16R")) () () 2083 ) 2084 (dnop Bitno32Prefixed "bit number for indexing objects" (m32c-isa) h-uint f-bitno32-prefixed) 2085 (dnop Bitno32Unprefixed "bit number for indexing objects" (m32c-isa) h-uint f-bitno32-unprefixed) 2086 2087 (define-full-operand BitBase16-16-u8 "unsigned bit,base:8 at offset 16for m16c" (m16c-isa) 2088 h-uint DFLT f-dsp-16-u8 2089 ((parse "unsigned_bitbase8") (print "unsigned_bitbase")) () () 2090 ) 2091 (define-full-operand BitBase16-16-s8 "signed bit,base:8 at offset 16for m16c" (m16c-isa) 2092 h-sint DFLT f-dsp-16-s8 2093 ((parse "signed_bitbase8") (print "signed_bitbase")) () () 2094 ) 2095 (define-full-operand BitBase16-16-u16 "unsigned bit,base:16 at offset 16 for m16c" (m16c-isa) 2096 h-uint DFLT f-dsp-16-u16 2097 ((parse "unsigned_bitbase16") (print "unsigned_bitbase")) () () 2098 ) 2099 (define-full-operand BitBase16-8-u11-S "signed bit,base:11 at offset 16 for m16c" (m16c-isa) 2100 h-uint DFLT f-bitbase16-u11-S 2101 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () () 2102 ) 2103 2104 (define-full-operand BitBase32-16-u11-Unprefixed "unsigned bit,base:11 at offset 16 for m32c" (m32c-isa) 2105 h-uint DFLT f-bitbase32-16-u11-unprefixed 2106 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () () 2107 ) 2108 (define-full-operand BitBase32-16-s11-Unprefixed "signed bit,base:11 at offset 16 for m32c" (m32c-isa) 2109 h-sint DFLT f-bitbase32-16-s11-unprefixed 2110 ((parse "signed_bitbase11") (print "signed_bitbase")) () () 2111 ) 2112 (define-full-operand BitBase32-16-u19-Unprefixed "unsigned bit,base:19 at offset 16 for m32c" (m32c-isa) 2113 h-uint DFLT f-bitbase32-16-u19-unprefixed 2114 ((parse "unsigned_bitbase19") (print "unsigned_bitbase")) () () 2115 ) 2116 (define-full-operand BitBase32-16-s19-Unprefixed "signed bit,base:19 at offset 16 for m32c" (m32c-isa) 2117 h-sint DFLT f-bitbase32-16-s19-unprefixed 2118 ((parse "signed_bitbase19") (print "signed_bitbase")) () () 2119 ) 2120 (define-full-operand BitBase32-16-u27-Unprefixed "unsigned bit,base:27 at offset 16 for m32c" (m32c-isa) 2121 h-uint DFLT f-bitbase32-16-u27-unprefixed 2122 ((parse "unsigned_bitbase27") (print "unsigned_bitbase")) () () 2123 ) 2124 (define-full-operand BitBase32-24-u11-Prefixed "unsigned bit,base:11 at offset 24 for m32c" (m32c-isa) 2125 h-uint DFLT f-bitbase32-24-u11-prefixed 2126 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () () 2127 ) 2128 (define-full-operand BitBase32-24-s11-Prefixed "signed bit,base:11 at offset 24 for m32c" (m32c-isa) 2129 h-sint DFLT f-bitbase32-24-s11-prefixed 2130 ((parse "signed_bitbase11") (print "signed_bitbase")) () () 2131 ) 2132 (define-full-operand BitBase32-24-u19-Prefixed "unsigned bit,base:19 at offset 24 for m32c" (m32c-isa) 2133 h-uint DFLT f-bitbase32-24-u19-prefixed 2134 ((parse "unsigned_bitbase19") (print "unsigned_bitbase")) () () 2135 ) 2136 (define-full-operand BitBase32-24-s19-Prefixed "signed bit,base:19 at offset 24 for m32c" (m32c-isa) 2137 h-sint DFLT f-bitbase32-24-s19-prefixed 2138 ((parse "signed_bitbase19") (print "signed_bitbase")) () () 2139 ) 2140 (define-full-operand BitBase32-24-u27-Prefixed "unsigned bit,base:27 at offset 24 for m32c" (m32c-isa) 2141 h-uint DFLT f-bitbase32-24-u27-prefixed 2142 ((parse "unsigned_bitbase27") (print "unsigned_bitbase")) () () 2143 ) 2144 ;------------------------------------------------------------- 2145 ; Labels 2146 ;------------------------------------------------------------- 2147 2148 (define-full-operand Lab-5-3 "3 bit label" (all-isas RELAX) 2149 h-iaddr DFLT f-lab-5-3 2150 ((parse "lab_5_3")) () () ) 2151 2152 (define-full-operand Lab32-jmp-s "3 bit label" (all-isas RELAX) 2153 h-iaddr DFLT f-lab32-jmp-s 2154 ((parse "lab_5_3")) () () ) 2155 2156 (dnop Lab-8-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-8-8) 2157 (dnop Lab-8-16 "16 bit label" (all-isas RELAX) h-iaddr f-lab-8-16) 2158 (dnop Lab-8-24 "24 bit label" (all-isas RELAX) h-iaddr f-lab-8-24) 2159 (dnop Lab-16-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-16-8) 2160 (dnop Lab-24-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-24-8) 2161 (dnop Lab-32-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-32-8) 2162 (dnop Lab-40-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-40-8) 2163 2164 ;------------------------------------------------------------- 2165 ; Condition code bits 2166 ;------------------------------------------------------------- 2167 2168 (dnop sbit "negative bit" (SEM-ONLY all-isas) h-sbit f-nil) 2169 (dnop obit "overflow bit" (SEM-ONLY all-isas) h-obit f-nil) 2170 (dnop zbit "zero bit" (SEM-ONLY all-isas) h-zbit f-nil) 2171 (dnop cbit "carry bit" (SEM-ONLY all-isas) h-cbit f-nil) 2172 (dnop ubit "stack ptr select bit" (SEM-ONLY all-isas) h-ubit f-nil) 2173 (dnop ibit "interrupt enable bit" (SEM-ONLY all-isas) h-ibit f-nil) 2174 (dnop bbit "reg bank select bit" (SEM-ONLY all-isas) h-bbit f-nil) 2175 (dnop dbit "debug bit" (SEM-ONLY all-isas) h-dbit f-nil) 2176 2177 ;------------------------------------------------------------- 2178 ; Condition operands 2179 ;------------------------------------------------------------- 2180 2181 (define-pmacro (cond-operand mach offset) 2182 (dnop (.sym cond mach - offset) "condition" ((.sym m mach c-isa)) (.sym h-cond mach) (.sym f-dsp- offset -u8)) 2183 ) 2184 2185 (cond-operand 16 16) 2186 (cond-operand 16 24) 2187 (cond-operand 16 32) 2188 (cond-operand 32 16) 2189 (cond-operand 32 24) 2190 (cond-operand 32 32) 2191 (cond-operand 32 40) 2192 2193 (dnop cond16c "condition" (m16c-isa) h-cond16c f-cond16) 2194 (dnop cond16j "condition" (m16c-isa) h-cond16j f-cond16) 2195 (dnop cond16j5 "condition" (m16c-isa) h-cond16j-5 f-cond16j-5) 2196 (dnop cond32 "condition" (m32c-isa) h-cond32 f-cond32) 2197 (dnop cond32j "condition" (m32c-isa) h-cond32 f-cond32j) 2198 (dnop sccond32 "scCND condition" (m32c-isa) h-cond32 f-cond16) 2199 (dnop flags16 "flags" (m16c-isa) h-flags f-9-3) 2200 (dnop flags32 "flags" (m32c-isa) h-flags f-13-3) 2201 (dnop cr16 "control" (m16c-isa) h-cr-16 f-9-3) 2202 (dnop cr1-Unprefixed-32 "control" (m32c-isa) h-cr1-32 f-13-3) 2203 (dnop cr1-Prefixed-32 "control" (m32c-isa) h-cr1-32 f-21-3) 2204 (dnop cr2-32 "control" (m32c-isa) h-cr2-32 f-13-3) 2205 (dnop cr3-Unprefixed-32 "control" (m32c-isa) h-cr3-32 f-13-3) 2206 (dnop cr3-Prefixed-32 "control" (m32c-isa) h-cr3-32 f-21-3) 2207 2208 ;------------------------------------------------------------- 2209 ; Suffixes 2210 ;------------------------------------------------------------- 2211 2212 (define-full-operand Z "Suffix for zero format insns" (all-isas) 2213 h-sint DFLT f-nil 2214 ((parse "Z") (print "Z")) () () 2215 ) 2216 (define-full-operand S "Suffix for short format insns" (all-isas) 2217 h-sint DFLT f-nil 2218 ((parse "S") (print "S")) () () 2219 ) 2220 (define-full-operand Q "Suffix for quick format insns" (all-isas) 2221 h-sint DFLT f-nil 2222 ((parse "Q") (print "Q")) () () 2223 ) 2224 (define-full-operand G "Suffix for general format insns" (all-isas) 2225 h-sint DFLT f-nil 2226 ((parse "G") (print "G")) () () 2227 ) 2228 (define-full-operand X "Empty suffix" (all-isas) 2229 h-sint DFLT f-nil 2230 ((parse "X") (print "X")) () () 2231 ) 2232 (define-full-operand size "any size specifier" (all-isas) 2233 h-sint DFLT f-nil 2234 ((parse "size") (print "size")) () () 2235 ) 2236 ;------------------------------------------------------------- 2237 ; Misc 2238 ;------------------------------------------------------------- 2239 2240 (dnop BitIndex "Bit Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-bit-index f-nil) 2241 (dnop SrcIndex "Source Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-src-index f-nil) 2242 (dnop DstIndex "Destination Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-dst-index f-nil) 2243 (dnop NoRemainder "Place holder for when the remainder is not kept" (SEM-ONLY MACH32 m32c-isa) h-none f-nil) 2244 2246 ;============================================================= 2247 ; Derived Operands 2248 2249 ; Memory reference macros that clip addresses appropriately. Refer to 2250 ; memory at ADDRESS in MODE, clipped appropriately for either the m16c 2251 ; or m32c. 2252 (define-pmacro (mem16 mode address) 2253 (mem mode (and #xffff address))) 2254 2255 (define-pmacro (mem20 mode address) 2256 (mem mode (and #xfffff address))) 2257 2258 (define-pmacro (mem32 mode address) 2259 (mem mode (and #xffffff address))) 2260 2261 ; Like mem16 and mem32, but takes MACH as a parameter. MACH must be 2262 ; either 16 or 32. 2263 (define-pmacro (mem-mach mach mode address) 2264 ((.sym mem mach) mode address)) 2265 2266 ;------------------------------------------------------------- 2267 ; Source 2268 ;------------------------------------------------------------- 2269 ; Rn direct 2270 ;------------------------------------------------------------- 2271 2272 (define-pmacro (src16-Rn-direct-operand xmode) 2273 (begin 2274 (define-derived-operand 2275 (name (.sym src16-Rn-direct- xmode)) 2276 (comment (.str "m16c Rn direct source " xmode)) 2277 (attrs (machine 16)) 2278 (mode xmode) 2279 (args ((.sym Src16Rn xmode))) 2280 (syntax (.str "$Src16Rn" xmode)) 2281 (base-ifield f-8-4) 2282 (encoding (+ (f-8-2 0) (.sym Src16Rn xmode))) 2283 (ifield-assertion (eq f-8-2 0)) 2284 (getter (trunc xmode (.sym Src16Rn xmode))) 2285 (setter (set (.sym Src16Rn xmode) newval)) 2286 ) 2287 ) 2288 ) 2289 (src16-Rn-direct-operand QI) 2290 (src16-Rn-direct-operand HI) 2291 2292 (define-pmacro (src32-Rn-direct-operand group base xmode) 2293 (begin 2294 (define-derived-operand 2295 (name (.sym src32-Rn-direct- group - xmode)) 2296 (comment (.str "m32c Rn direct source " xmode)) 2297 (attrs (machine 32)) 2298 (mode xmode) 2299 (args ((.sym Src32Rn group xmode))) 2300 (syntax (.str "$Src32Rn" group xmode)) 2301 (base-ifield (.sym f- base -11)) 2302 (encoding (+ ((.sym f- base -3) 4) (.sym Src32Rn group xmode))) 2303 (ifield-assertion (eq (.sym f- base -3) 4)) 2304 (getter (trunc xmode (.sym Src32Rn group xmode))) 2305 (setter (set (.sym Src32Rn group xmode) newval)) 2306 ) 2307 ) 2308 ) 2309 2310 (src32-Rn-direct-operand Unprefixed 1 QI) 2311 (src32-Rn-direct-operand Prefixed 9 QI) 2312 (src32-Rn-direct-operand Unprefixed 1 HI) 2313 (src32-Rn-direct-operand Prefixed 9 HI) 2314 (src32-Rn-direct-operand Unprefixed 1 SI) 2315 (src32-Rn-direct-operand Prefixed 9 SI) 2316 2317 ;------------------------------------------------------------- 2318 ; An direct 2319 ;------------------------------------------------------------- 2320 2321 (define-pmacro (src16-An-direct-operand xmode) 2322 (begin 2323 (define-derived-operand 2324 (name (.sym src16-An-direct- xmode)) 2325 (comment (.str "m16c An direct destination " xmode)) 2326 (attrs (machine 16)) 2327 (mode xmode) 2328 (args ((.sym Src16An xmode))) 2329 (syntax (.str "$Src16An" xmode)) 2330 (base-ifield f-8-4) 2331 (encoding (+ (f-8-2 1) (f-10-1 0) (.sym Src16An xmode))) 2332 (ifield-assertion (andif (eq f-8-2 1) (eq f-10-1 0))) 2333 (getter (trunc xmode (.sym Src16An xmode))) 2334 (setter (set (.sym Src16An xmode) newval)) 2335 ) 2336 ) 2337 ) 2338 (src16-An-direct-operand QI) 2339 (src16-An-direct-operand HI) 2340 2341 (define-pmacro (src32-An-direct-operand group base1 base2 xmode) 2342 (begin 2343 (define-derived-operand 2344 (name (.sym src32-An-direct- group - xmode)) 2345 (comment (.str "m32c An direct destination " xmode)) 2346 (attrs (machine 32)) 2347 (mode xmode) 2348 (args ((.sym Src32An group xmode))) 2349 (syntax (.str "$Src32An" group xmode)) 2350 (base-ifield (.sym f- base1 -11)) 2351 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Src32An group xmode))) 2352 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1))) 2353 (getter (trunc xmode (.sym Src32An group xmode))) 2354 (setter (set (.sym Src32An group xmode) newval)) 2355 ) 2356 ) 2357 ) 2358 2359 (src32-An-direct-operand Unprefixed 1 10 QI) 2360 (src32-An-direct-operand Unprefixed 1 10 HI) 2361 (src32-An-direct-operand Unprefixed 1 10 SI) 2362 (src32-An-direct-operand Prefixed 9 18 QI) 2363 (src32-An-direct-operand Prefixed 9 18 HI) 2364 (src32-An-direct-operand Prefixed 9 18 SI) 2365 2366 ;------------------------------------------------------------- 2367 ; An indirect 2368 ;------------------------------------------------------------- 2369 2370 (define-pmacro (src16-An-indirect-operand xmode) 2371 (begin 2372 (define-derived-operand 2373 (name (.sym src16-An-indirect- xmode)) 2374 (comment (.str "m16c An indirect destination " xmode)) 2375 (attrs (machine 16)) 2376 (mode xmode) 2377 (args (Src16An)) 2378 (syntax "[$Src16An]") 2379 (base-ifield f-8-4) 2380 (encoding (+ (f-8-2 1) (f-10-1 1) Src16An)) 2381 (ifield-assertion (andif (eq f-8-2 1) (eq f-10-1 1))) 2382 (getter (mem16 xmode Src16An)) 2383 (setter (set (mem16 xmode Src16An) newval)) 2384 ) 2385 ) 2386 ) 2387 (src16-An-indirect-operand QI) 2388 (src16-An-indirect-operand HI) 2389 2390 (define-pmacro (src32-An-indirect-operand group base1 base2 xmode) 2391 (begin 2392 (define-derived-operand 2393 (name (.sym src32-An-indirect- group - xmode)) 2394 (comment (.str "m32c An indirect destination " xmode)) 2395 (attrs (machine 32)) 2396 (mode xmode) 2397 (args ((.sym Src32An group))) 2398 (syntax (.str "[$Src32An" group "]")) 2399 (base-ifield (.sym f- base1 -11)) 2400 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Src32An group))) 2401 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0))) 2402 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) 2403 (const 0))) 2404 (setter (c-call DFLT (.str "operand_setter_" xmode) newval 2405 (.sym Src32An group) (const 0))) 2406 ; (getter (mem32 xmode (.sym Src32An group))) 2407 ; (setter (set (mem32 xmode (.sym Src32An group)) newval)) 2408 ) 2409 ) 2410 ) 2411 2412 (src32-An-indirect-operand Unprefixed 1 10 QI) 2413 (src32-An-indirect-operand Unprefixed 1 10 HI) 2414 (src32-An-indirect-operand Unprefixed 1 10 SI) 2415 (src32-An-indirect-operand Prefixed 9 18 QI) 2416 (src32-An-indirect-operand Prefixed 9 18 HI) 2417 (src32-An-indirect-operand Prefixed 9 18 SI) 2418 2419 ;------------------------------------------------------------- 2420 ; dsp:d[r] relative 2421 ;------------------------------------------------------------- 2422 2423 (define-pmacro (src16-relative-operand xmode) 2424 (begin 2425 (define-derived-operand 2426 (name (.sym src16-16-8-SB-relative- xmode)) 2427 (comment (.str "m16c dsp:8[sb] relative destination " xmode)) 2428 (attrs (machine 16)) 2429 (mode xmode) 2430 (args (Dsp-16-u8)) 2431 (syntax "${Dsp-16-u8}[sb]") 2432 (base-ifield f-8-4) 2433 (encoding (+ (f-8-4 #xA) Dsp-16-u8)) 2434 (ifield-assertion (eq f-8-4 #xA)) 2435 (getter (mem16 xmode (add Dsp-16-u8 (reg h-sb)))) 2436 (setter (set (mem16 xmode (add Dsp-16-u8 (reg h-sb))) newval)) 2437 ) 2438 (define-derived-operand 2439 (name (.sym src16-16-16-SB-relative- xmode)) 2440 (comment (.str "m16c dsp:16[sb] relative destination " xmode)) 2441 (attrs (machine 16)) 2442 (mode xmode) 2443 (args (Dsp-16-u16)) 2444 (syntax "${Dsp-16-u16}[sb]") 2445 (base-ifield f-8-4) 2446 (encoding (+ (f-8-4 #xE) Dsp-16-u16)) 2447 (ifield-assertion (eq f-8-4 #xE)) 2448 (getter (mem16 xmode (add Dsp-16-u16 (reg h-sb)))) 2449 (setter (set (mem16 xmode (add Dsp-16-u16 (reg h-sb))) newval)) 2450 ) 2451 (define-derived-operand 2452 (name (.sym src16-16-8-FB-relative- xmode)) 2453 (comment (.str "m16c dsp:8[fb] relative destination " xmode)) 2454 (attrs (machine 16)) 2455 (mode xmode) 2456 (args (Dsp-16-s8)) 2457 (syntax "${Dsp-16-s8}[fb]") 2458 (base-ifield f-8-4) 2459 (encoding (+ (f-8-4 #xB) Dsp-16-s8)) 2460 (ifield-assertion (eq f-8-4 #xB)) 2461 (getter (mem16 xmode (add Dsp-16-s8 (reg h-fb)))) 2462 (setter (set (mem16 xmode (add Dsp-16-s8 (reg h-fb))) newval)) 2463 ) 2464 (define-derived-operand 2465 (name (.sym src16-16-8-An-relative- xmode)) 2466 (comment (.str "m16c dsp:8[An] relative destination " xmode)) 2467 (attrs (machine 16)) 2468 (mode xmode) 2469 (args (Src16An Dsp-16-u8)) 2470 (syntax "${Dsp-16-u8}[$Src16An]") 2471 (base-ifield f-8-4) 2472 (encoding (+ (f-8-2 2) (f-10-1 0) Dsp-16-u8 Src16An)) 2473 (ifield-assertion (andif (eq f-8-2 2) (eq f-10-1 0))) 2474 (getter (mem16 xmode (add Dsp-16-u8 Src16An))) 2475 (setter (set (mem16 xmode (add Dsp-16-u8 Src16An)) newval)) 2476 ) 2477 (define-derived-operand 2478 (name (.sym src16-16-16-An-relative- xmode)) 2479 (comment (.str "m16c dsp:16[An] relative destination " xmode)) 2480 (attrs (machine 16)) 2481 (mode xmode) 2482 (args (Src16An Dsp-16-u16)) 2483 (syntax "${Dsp-16-u16}[$Src16An]") 2484 (base-ifield f-8-4) 2485 (encoding (+ (f-8-2 3) (f-10-1 0) Dsp-16-u16 Src16An)) 2486 (ifield-assertion (andif (eq f-8-2 3) (eq f-10-1 0))) 2487 (getter (mem16 xmode (add Dsp-16-u16 Src16An))) 2488 (setter (set (mem16 xmode (add Dsp-16-u16 Src16An)) newval)) 2489 ) 2490 (define-derived-operand 2491 (name (.sym src16-16-20-An-relative- xmode)) 2492 (comment (.str "m16c dsp:20[An] relative destination " xmode)) 2493 (attrs (machine 16)) 2494 (mode xmode) 2495 (args (Src16An Dsp-16-u20)) 2496 (syntax "${Dsp-16-u20}[$Src16An]") 2497 (base-ifield f-8-4) 2498 (encoding (+ (f-8-2 3) (f-10-1 0) Dsp-16-u20 Src16An)) 2499 (ifield-assertion (andif (eq f-8-2 3) (eq f-10-1 0))) 2500 (getter (mem20 xmode (add Dsp-16-u20 Src16An))) 2501 (setter (set (mem20 xmode (add Dsp-16-u20 Src16An)) newval)) 2502 ) 2503 ) 2504 ) 2505 2506 (src16-relative-operand QI) 2507 (src16-relative-operand HI) 2508 2509 (define-pmacro (src32-relative-operand offset group base1 base2 xmode) 2510 (begin 2511 (define-derived-operand 2512 (name (.sym src32- offset -8-SB-relative- group - xmode)) 2513 (comment (.str "m32c dsp:8[sb] relative destination " xmode)) 2514 (attrs (machine 32)) 2515 (mode xmode) 2516 (args ((.sym Dsp- offset -u8))) 2517 (syntax (.str "${Dsp-" offset "-u8}[sb]")) 2518 (base-ifield (.sym f- base1 -11)) 2519 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u8))) 2520 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2))) 2521 (getter (c-call xmode (.str "operand_getter_" xmode) sb (.sym Dsp- offset -u8))) 2522 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb (.sym Dsp- offset -u8))) 2523 ; (getter (mem32 xmode (add (.sym Dsp- offset -u8) (reg h-sb)))) 2524 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval)) 2525 ) 2526 (define-derived-operand 2527 (name (.sym src32- offset -16-SB-relative- group - xmode)) 2528 (comment (.str "m32c dsp:16[sb] relative destination " xmode)) 2529 (attrs (machine 32)) 2530 (mode xmode) 2531 (args ((.sym Dsp- offset -u16))) 2532 (syntax (.str "${Dsp-" offset "-u16}[sb]")) 2533 (base-ifield (.sym f- base1 -11)) 2534 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u16))) 2535 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2))) 2536 (getter (c-call xmode (.str "operand_getter_" xmode) sb (.sym Dsp- offset -u16))) 2537 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb (.sym Dsp- offset -u16))) 2538 ; (getter (mem32 xmode (add (.sym Dsp- offset -u16) (reg h-sb)))) 2539 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval)) 2540 ) 2541 (define-derived-operand 2542 (name (.sym src32- offset -8-FB-relative- group - xmode)) 2543 (comment (.str "m32c dsp:8[fb] relative destination " xmode)) 2544 (attrs (machine 32)) 2545 (mode xmode) 2546 (args ((.sym Dsp- offset -s8))) 2547 (syntax (.str "${Dsp-" offset "-s8}[fb]")) 2548 (base-ifield (.sym f- base1 -11)) 2549 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s8))) 2550 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3))) 2551 (getter (c-call xmode (.str "operand_getter_" xmode) fb (.sym Dsp- offset -s8))) 2552 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb (.sym Dsp- offset -s8))) 2553 ; (getter (mem32 xmode (add (.sym Dsp- offset -s8) (reg h-fb)))) 2554 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval)) 2555 ) 2556 (define-derived-operand 2557 (name (.sym src32- offset -16-FB-relative- group - xmode)) 2558 (comment (.str "m32c dsp:16[fb] relative destination " xmode)) 2559 (attrs (machine 32)) 2560 (mode xmode) 2561 (args ((.sym Dsp- offset -s16))) 2562 (syntax (.str "${Dsp-" offset "-s16}[fb]")) 2563 (base-ifield (.sym f- base1 -11)) 2564 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s16))) 2565 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3))) 2566 (getter (c-call xmode (.str "operand_getter_" xmode) fb (.sym Dsp- offset -s16))) 2567 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb (.sym Dsp- offset -s16))) 2568 ; (getter (mem32 xmode (add (.sym Dsp- offset -s16) (reg h-fb)))) 2569 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -s16) (reg h-fb))) newval)) 2570 ) 2571 (define-derived-operand 2572 (name (.sym src32- offset -8-An-relative- group - xmode)) 2573 (comment (.str "m32c dsp:8[An] relative destination " xmode)) 2574 (attrs (machine 32)) 2575 (mode xmode) 2576 (args ((.sym Src32An group) (.sym Dsp- offset -u8))) 2577 (syntax (.str "${Dsp-" offset "-u8}[$Src32An" group "]")) 2578 (base-ifield (.sym f- base1 -11)) 2579 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u8) (.sym Src32An group))) 2580 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0))) 2581 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u8))) 2582 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u8))) 2583 ; (getter (mem32 xmode (add (.sym Dsp- offset -u8) (.sym Src32An group)))) 2584 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u8) (.sym Src32An group))) newval)) 2585 ) 2586 (define-derived-operand 2587 (name (.sym src32- offset -16-An-relative- group - xmode)) 2588 (comment (.str "m32c dsp:16[An] relative destination " xmode)) 2589 (attrs (machine 32)) 2590 (mode xmode) 2591 (args ((.sym Src32An group) (.sym Dsp- offset -u16))) 2592 (syntax (.str "${Dsp-" offset "-u16}[$Src32An" group "]")) 2593 (base-ifield (.sym f- base1 -11)) 2594 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u16) (.sym Src32An group))) 2595 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0))) 2596 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u16))) 2597 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u16))) 2598 ; (getter (mem32 xmode (add (.sym Dsp- offset -u16) (.sym Src32An group)))) 2599 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u16) (.sym Src32An group))) newval)) 2600 ) 2601 (define-derived-operand 2602 (name (.sym src32- offset -24-An-relative- group - xmode)) 2603 (comment (.str "m32c dsp:16[An] relative destination " xmode)) 2604 (attrs (machine 32)) 2605 (mode xmode) 2606 (args ((.sym Src32An group) (.sym Dsp- offset -u24))) 2607 (syntax (.str "${Dsp-" offset "-u24}[$Src32An" group "]")) 2608 (base-ifield (.sym f- base1 -11)) 2609 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u24) (.sym Src32An group))) 2610 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0))) 2611 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u24) )) 2612 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u24))) 2613 ; (getter (mem32 xmode (add (.sym Dsp- offset -u24) (.sym Src32An group)))) 2614 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u24) (.sym Src32An group))) newval)) 2615 ) 2616 ) 2617 ) 2618 2619 (src32-relative-operand 16 Unprefixed 1 10 QI) 2620 (src32-relative-operand 16 Unprefixed 1 10 HI) 2621 (src32-relative-operand 16 Unprefixed 1 10 SI) 2622 (src32-relative-operand 24 Prefixed 9 18 QI) 2623 (src32-relative-operand 24 Prefixed 9 18 HI) 2624 (src32-relative-operand 24 Prefixed 9 18 SI) 2625 2626 ;------------------------------------------------------------- 2627 ; Absolute address 2628 ;------------------------------------------------------------- 2629 2630 (define-pmacro (src16-absolute xmode) 2631 (begin 2632 (define-derived-operand 2633 (name (.sym src16-16-16-absolute- xmode)) 2634 (comment (.str "m16c absolute address " xmode)) 2635 (attrs (machine 16)) 2636 (mode xmode) 2637 (args (Dsp-16-u16)) 2638 (syntax (.str "${Dsp-16-u16}")) 2639 (base-ifield f-8-4) 2640 (encoding (+ (f-8-4 #xF) Dsp-16-u16)) 2641 (ifield-assertion (eq f-8-4 #xF)) 2642 (getter (mem16 xmode Dsp-16-u16)) 2643 (setter (set (mem16 xmode Dsp-16-u16) newval)) 2644 ) 2645 ) 2646 ) 2647 2648 (src16-absolute QI) 2649 (src16-absolute HI) 2650 2651 (define-pmacro (src32-absolute offset group base1 base2 xmode) 2652 (begin 2653 (define-derived-operand 2654 (name (.sym src32- offset -16-absolute- group - xmode)) 2655 (comment (.str "m32c absolute address " xmode)) 2656 (attrs (machine 32)) 2657 (mode xmode) 2658 (args ((.sym Dsp- offset -u16))) 2659 (syntax (.str "${Dsp-" offset "-u16}")) 2660 (base-ifield (.sym f- base1 -11)) 2661 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16))) 2662 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3))) 2663 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) (.sym Dsp- offset -u16))) 2664 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) (.sym Dsp- offset -u16))) 2665 ; (getter (mem32 xmode (.sym Dsp- offset -u16))) 2666 ; (setter (set (mem32 xmode (.sym Dsp- offset -u16)) newval)) 2667 ) 2668 (define-derived-operand 2669 (name (.sym src32- offset -24-absolute- group - xmode)) 2670 (comment (.str "m32c absolute address " xmode)) 2671 (attrs (machine 32)) 2672 (mode xmode) 2673 (args ((.sym Dsp- offset -u24))) 2674 (syntax (.str "${Dsp-" offset "-u24}")) 2675 (base-ifield (.sym f- base1 -11)) 2676 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24))) 2677 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2))) 2678 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) (.sym Dsp- offset -u24))) 2679 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) (.sym Dsp- offset -u24))) 2680 ; (getter (mem32 xmode (.sym Dsp- offset -u24))) 2681 ; (setter (set (mem32 xmode (.sym Dsp- offset -u24)) newval)) 2682 ) 2683 ) 2684 ) 2685 2686 (src32-absolute 16 Unprefixed 1 10 QI) 2687 (src32-absolute 16 Unprefixed 1 10 HI) 2688 (src32-absolute 16 Unprefixed 1 10 SI) 2689 (src32-absolute 24 Prefixed 9 18 QI) 2690 (src32-absolute 24 Prefixed 9 18 HI) 2691 (src32-absolute 24 Prefixed 9 18 SI) 2692 2693 ;------------------------------------------------------------- 2694 ; An indirect indirect 2695 ; 2696 ; Double indirect addressing uses the lower 3 bytes of the value stored 2697 ; at the address referenced by 'op' as the effective address. 2698 ;------------------------------------------------------------- 2699 2700 (define-pmacro (indirect-addr op) (and USI (mem32 USI op) #x00ffffff)) 2701 2702 ; (define-pmacro (src-An-indirect-indirect-operand xmode) 2703 ; (define-derived-operand 2704 ; (name (.sym src32-An-indirect-indirect- xmode)) 2705 ; (comment (.str "m32c An indirect indirect destination " xmode)) 2706 ; (attrs (machine 32)) 2707 ; (mode xmode) 2708 ; (args (Src32AnPrefixed)) 2709 ; (syntax (.str "[[$Src32AnPrefixed]]")) 2710 ; (base-ifield f-9-11) 2711 ; (encoding (+ (f-9-3 0) (f-18-1 0) Src32AnPrefixed)) 2712 ; (ifield-assertion (andif (eq f-9-3 0) (eq f-18-1 0))) 2713 ; (getter (mem32 xmode (indirect-addr Src32AnPrefixed))) 2714 ; (setter (set (mem32 xmode (indirect-addr Src32AnPrefixed)) newval)) 2715 ; ) 2716 ; ) 2717 2718 ; (src-An-indirect-indirect-operand QI) 2719 ; (src-An-indirect-indirect-operand HI) 2720 ; (src-An-indirect-indirect-operand SI) 2721 2722 ;------------------------------------------------------------- 2723 ; Relative indirect 2724 ;------------------------------------------------------------- 2725 2726 (define-pmacro (src-relative-indirect-operand xmode) 2727 (begin 2728 ; (define-derived-operand 2729 ; (name (.sym src32-24-8-SB-relative-indirect- xmode)) 2730 ; (comment (.str "m32c dsp:8[sb] relative source " xmode)) 2731 ; (attrs (machine 32)) 2732 ; (mode xmode) 2733 ; (args (Dsp-24-u8)) 2734 ; (syntax "[${Dsp-24-u8}[sb]]") 2735 ; (base-ifield f-9-11) 2736 ; (encoding (+ (f-9-3 1) (f-18-2 2) Dsp-24-u8)) 2737 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-2 2))) 2738 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u8 (reg h-sb))))) 2739 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u8 (reg h-sb)))) newval)) 2740 ; ) 2741 ; (define-derived-operand 2742 ; (name (.sym src32-24-16-SB-relative-indirect- xmode)) 2743 ; (comment (.str "m32c dsp:16[sb] relative source " xmode)) 2744 ; (attrs (machine 32)) 2745 ; (mode xmode) 2746 ; (args (Dsp-24-u16)) 2747 ; (syntax "[${Dsp-24-u16}[sb]]") 2748 ; (base-ifield f-9-11) 2749 ; (encoding (+ (f-9-3 2) (f-18-2 2) Dsp-24-u16)) 2750 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-2 2))) 2751 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u16 (reg h-sb))))) 2752 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u16 (reg h-sb)))) newval)) 2753 ; ) 2754 ; (define-derived-operand 2755 ; (name (.sym src32-24-8-FB-relative-indirect- xmode)) 2756 ; (comment (.str "m32c dsp:8[fb] relative source " xmode)) 2757 ; (attrs (machine 32)) 2758 ; (mode xmode) 2759 ; (args (Dsp-24-s8)) 2760 ; (syntax "[${Dsp-24-s8}[fb]]") 2761 ; (base-ifield f-9-11) 2762 ; (encoding (+ (f-9-3 1) (f-18-2 3) Dsp-24-s8)) 2763 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-2 3))) 2764 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-s8 (reg h-fb))))) 2765 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-s8 (reg h-fb)))) newval)) 2766 ; ) 2767 ; (define-derived-operand 2768 ; (name (.sym src32-24-16-FB-relative-indirect- xmode)) 2769 ; (comment (.str "m32c dsp:16[fb] relative source " xmode)) 2770 ; (attrs (machine 32)) 2771 ; (mode xmode) 2772 ; (args (Dsp-24-s16)) 2773 ; (syntax "[${Dsp-24-s16}[fb]]") 2774 ; (base-ifield f-9-11) 2775 ; (encoding (+ (f-9-3 2) (f-18-2 3) Dsp-24-s16)) 2776 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-2 3))) 2777 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-s16 (reg h-fb))))) 2778 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-s16 (reg h-fb)))) newval)) 2779 ; ) 2780 ; (define-derived-operand 2781 ; (name (.sym src32-24-8-An-relative-indirect- xmode)) 2782 ; (comment (.str "m32c dsp:8[An] relative indirect source " xmode)) 2783 ; (attrs (machine 32)) 2784 ; (mode xmode) 2785 ; (args (Src32AnPrefixed Dsp-24-u8)) 2786 ; (syntax "[${Dsp-24-u8}[$Src32AnPrefixed]]") 2787 ; (base-ifield f-9-11) 2788 ; (encoding (+ (f-9-3 1) (f-18-1 0) Dsp-24-u8 Src32AnPrefixed)) 2789 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-1 0))) 2790 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u8 Src32AnPrefixed)))) 2791 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u8 Src32AnPrefixed))) newval)) 2792 ; ) 2793 ; (define-derived-operand 2794 ; (name (.sym src32-24-16-An-relative-indirect- xmode)) 2795 ; (comment (.str "m32c dsp:16[An] relative source " xmode)) 2796 ; (attrs (machine 32)) 2797 ; (mode xmode) 2798 ; (args (Src32AnPrefixed Dsp-24-u16)) 2799 ; (syntax "[${Dsp-24-u16}[$Src32AnPrefixed]]") 2800 ; (base-ifield f-9-11) 2801 ; (encoding (+ (f-9-3 2) (f-18-1 0) Dsp-24-u16 Src32AnPrefixed)) 2802 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-1 0))) 2803 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u16 Src32AnPrefixed)))) 2804 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u16 Src32AnPrefixed))) newval)) 2805 ; ) 2806 ; (define-derived-operand 2807 ; (name (.sym src32-24-24-An-relative-indirect- xmode)) 2808 ; (comment (.str "m32c dsp:24[An] relative source " xmode)) 2809 ; (attrs (machine 32)) 2810 ; (mode xmode) 2811 ; (args (Src32AnPrefixed Dsp-24-u24)) 2812 ; (syntax "[${Dsp-24-u24}[$Src32AnPrefixed]]") 2813 ; (base-ifield f-9-11) 2814 ; (encoding (+ (f-9-3 3) (f-18-1 0) Dsp-24-u24 Src32AnPrefixed)) 2815 ; (ifield-assertion (andif (eq f-9-3 3) (eq f-18-1 0))) 2816 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u24 Src32AnPrefixed)))) 2817 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u24 Src32AnPrefixed))) newval)) 2818 ; ) 2819 ) 2820 ) 2821 2822 ; (src-relative-indirect-operand QI) 2823 ; (src-relative-indirect-operand HI) 2824 ; (src-relative-indirect-operand SI) 2825 2826 ;------------------------------------------------------------- 2827 ; Absolute Indirect address 2828 ;------------------------------------------------------------- 2829 2830 (define-pmacro (src32-absolute-indirect offset base1 base2 xmode) 2831 (begin 2832 ; (define-derived-operand 2833 ; (name (.sym src32- offset -16-absolute-indirect-derived- xmode)) 2834 ; (comment (.str "m32c absolute indirect address " xmode)) 2835 ; (attrs (machine 32)) 2836 ; (mode xmode) 2837 ; (args ((.sym Dsp- offset -u16))) 2838 ; (syntax (.str "[${Dsp-" offset "-u16}]")) 2839 ; (base-ifield (.sym f- base1 -11)) 2840 ; (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16))) 2841 ; (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3))) 2842 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u16)))) 2843 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))) newval)) 2844 ; ) 2845 ; (define-derived-operand 2846 ; (name (.sym src32- offset -24-absolute-indirect-derived- xmode)) 2847 ; (comment (.str "m32c absolute indirect address " xmode)) 2848 ; (attrs (machine 32)) 2849 ; (mode xmode) 2850 ; (args ((.sym Dsp- offset -u24))) 2851 ; (syntax (.str "[${Dsp-" offset "-u24}]")) 2852 ; (base-ifield (.sym f- base1 -11)) 2853 ; (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24))) 2854 ; (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2))) 2855 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u24)))) 2856 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))) newval)) 2857 ; ) 2858 ) 2859 ) 2860 2861 (src32-absolute-indirect 24 9 18 QI) 2862 (src32-absolute-indirect 24 9 18 HI) 2863 (src32-absolute-indirect 24 9 18 SI) 2864 2865 ;------------------------------------------------------------- 2866 ; Register relative source operands for short format insns 2867 ;------------------------------------------------------------- 2868 2869 (define-pmacro (src-2-S-operands mach xmode base opc1 opc2 opc3) 2870 (begin 2871 (define-derived-operand 2872 (name (.sym src mach -2-S-8-SB-relative- xmode)) 2873 (comment (.str "m" mach "c SB relative address")) 2874 (attrs (machine mach)) 2875 (mode xmode) 2876 (args (Dsp-8-u8)) 2877 (syntax "${Dsp-8-u8}[sb]") 2878 (base-ifield (.sym f- base -2)) 2879 (encoding (+ ((.sym f- base -2) opc1) Dsp-8-u8)) 2880 (ifield-assertion (eq (.sym f- base -2) opc1)) 2881 (getter (c-call xmode (.str "operand_getter_" xmode) sb Dsp-8-u8)) 2882 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb Dsp-8-u8)) 2883 ; (getter (mem-mach mach xmode (indirect-addr (add (reg h-sb) Dsp-8-u8)))) 2884 ; (setter (set (mem-mach mach xmode (indirect-addr (add (reg h-sb) Dsp-8-u8))) newval)) 2885 ) 2886 (define-derived-operand 2887 (name (.sym src mach -2-S-8-FB-relative- xmode)) 2888 (comment (.str "m" mach "c FB relative address")) 2889 (attrs (machine mach)) 2890 (mode xmode) 2891 (args (Dsp-8-s8)) 2892 (syntax "${Dsp-8-s8}[fb]") 2893 (base-ifield (.sym f- base -2)) 2894 (encoding (+ ((.sym f- base -2) opc2) Dsp-8-s8)) 2895 (ifield-assertion (eq (.sym f- base -2) opc2)) 2896 (getter (c-call xmode (.str "operand_getter_" xmode) fb Dsp-8-s8)) 2897 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb Dsp-8-s8)) 2898 ; (getter (mem-mach mach xmode (indirect-addr (add (reg h-fb) Dsp-8-s8)))) 2899 ; (setter (set (mem-mach mach xmode (indirect-addr (add (reg h-fb) Dsp-8-s8))) newval)) 2900 ) 2901 (define-derived-operand 2902 (name (.sym src mach -2-S-16-absolute- xmode)) 2903 (comment (.str "m" mach "c absolute address")) 2904 (attrs (machine mach)) 2905 (mode xmode) 2906 (args (Dsp-8-u16)) 2907 (syntax "${Dsp-8-u16}") 2908 (base-ifield (.sym f- base -2)) 2909 (encoding (+ ((.sym f- base -2) opc3) Dsp-8-u16)) 2910 (ifield-assertion (eq (.sym f- base -2) opc3)) 2911 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) Dsp-8-u16)) 2912 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) Dsp-8-u16)) 2913 ; (getter (mem-mach mach xmode Dsp-8-u16)) 2914 ; (setter (set (mem-mach mach xmode Dsp-8-u16) newval)) 2915 ) 2916 ) 2917 ) 2918 2919 (src-2-S-operands 16 QI 6 1 2 3) 2920 (src-2-S-operands 32 QI 2 2 3 1) 2921 (src-2-S-operands 32 HI 2 2 3 1) 2922 2923 ;============================================================= 2924 ; Derived Operands 2925 ;------------------------------------------------------------- 2926 ; Destination 2927 ;------------------------------------------------------------- 2928 ; Rn direct 2929 ;------------------------------------------------------------- 2930 2931 (define-pmacro (dst16-Rn-direct-operand xmode) 2932 (begin 2933 (define-derived-operand 2934 (name (.sym dst16-Rn-direct- xmode)) 2935 (comment (.str "m16c Rn direct destination " xmode)) 2936 (attrs (machine 16)) 2937 (mode xmode) 2938 (args ((.sym Dst16Rn xmode))) 2939 (syntax (.str "$Dst16Rn" xmode)) 2940 (base-ifield f-12-4) 2941 (encoding (+ (f-12-2 0) (.sym Dst16Rn xmode))) 2942 (ifield-assertion (eq f-12-2 0)) 2943 (getter (trunc xmode (.sym Dst16Rn xmode))) 2944 (setter (set (.sym Dst16Rn xmode) newval)) 2945 ) 2946 ) 2947 ) 2948 2949 (dst16-Rn-direct-operand QI) 2950 (dst16-Rn-direct-operand HI) 2951 (dst16-Rn-direct-operand SI) 2952 2953 (define-derived-operand 2954 (name dst16-Rn-direct-Ext-QI) 2955 (comment "m16c Rn direct destination QI") 2956 (attrs (machine 16)) 2957 (mode HI) 2958 (args (Dst16RnExtQI)) 2959 (syntax "$Dst16RnExtQI") 2960 (base-ifield f-12-4) 2961 (encoding (+ (f-12-2 0) Dst16RnExtQI (f-15-1 0))) 2962 (ifield-assertion (andif (eq f-12-2 0) (eq f-15-1 0))) 2963 (getter (trunc QI (.sym Dst16RnExtQI))) 2964 (setter (set Dst16RnExtQI newval)) 2965 ) 2966 2967 (define-pmacro (dst32-Rn-direct-operand group base xmode) 2968 (begin 2969 (define-derived-operand 2970 (name (.sym dst32-Rn-direct- group - xmode)) 2971 (comment (.str "m32c Rn direct destination " xmode)) 2972 (attrs (machine 32)) 2973 (mode xmode) 2974 (args ((.sym Dst32Rn group xmode))) 2975 (syntax (.str "$Dst32Rn" group xmode)) 2976 (base-ifield (.sym f- base -6)) 2977 (encoding (+ ((.sym f- base -3) 4) (.sym Dst32Rn group xmode))) 2978 (ifield-assertion (eq (.sym f- base -3) 4)) 2979 (getter (trunc xmode (.sym Dst32Rn group xmode))) 2980 (setter (set (.sym Dst32Rn group xmode) newval)) 2981 ) 2982 ) 2983 ) 2984 2985 (dst32-Rn-direct-operand Unprefixed 4 QI) 2986 (dst32-Rn-direct-operand Prefixed 12 QI) 2987 (dst32-Rn-direct-operand Unprefixed 4 HI) 2988 (dst32-Rn-direct-operand Prefixed 12 HI) 2989 (dst32-Rn-direct-operand Unprefixed 4 SI) 2990 (dst32-Rn-direct-operand Prefixed 12 SI) 2991 2992 (define-pmacro (dst32-Rn-direct-Ext-operand group base1 base2 smode dmode) 2993 (begin 2994 (define-derived-operand 2995 (name (.sym dst32-Rn-direct- group - smode)) 2996 (comment (.str "m32c Rn direct destination " smode)) 2997 (attrs (machine 32)) 2998 (mode dmode) 2999 (args ((.sym Dst32Rn group smode))) 3000 (syntax (.str "$Dst32Rn" group smode)) 3001 (base-ifield (.sym f- base1 -6)) 3002 (encoding (+ ((.sym f- base1 -3) 4) ((.sym f- base2 -1) 1) (.sym Dst32Rn group smode))) 3003 (ifield-assertion (andif (eq (.sym f- base1 -3) 4) (eq (.sym f- base2 -1) 1))) 3004 (getter (trunc smode (.sym Dst32Rn group smode))) 3005 (setter (set (.sym Dst32Rn group smode) newval)) 3006 ) 3007 ) 3008 ) 3009 3010 (dst32-Rn-direct-Ext-operand ExtUnprefixed 4 8 QI HI) 3011 (dst32-Rn-direct-Ext-operand ExtUnprefixed 4 8 HI SI) 3012 3013 (define-derived-operand 3014 (name dst32-R3-direct-Unprefixed-HI) 3015 (comment "m32c R3 direct HI") 3016 (attrs (machine 32)) 3017 (mode HI) 3018 (args (R3)) 3019 (syntax "$R3") 3020 (base-ifield f-4-6) 3021 (encoding (+ (f-4-3 4) (f-8-2 #x1))) 3022 (ifield-assertion (andif (eq f-4-3 4) (eq f-8-2 #x1))) 3023 (getter (trunc HI R3)) 3024 (setter (set R3 newval)) 3025 ) 3026 ;------------------------------------------------------------- 3027 ; An direct 3028 ;------------------------------------------------------------- 3029 3030 (define-pmacro (dst16-An-direct-operand xmode) 3031 (begin 3032 (define-derived-operand 3033 (name (.sym dst16-An-direct- xmode)) 3034 (comment (.str "m16c An direct destination " xmode)) 3035 (attrs (machine 16)) 3036 (mode xmode) 3037 (args ((.sym Dst16An xmode))) 3038 (syntax (.str "$Dst16An" xmode)) 3039 (base-ifield f-12-4) 3040 (encoding (+ (f-12-2 1) (f-14-1 0) (.sym Dst16An xmode))) 3041 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 0))) 3042 (getter (trunc xmode (.sym Dst16An xmode))) 3043 (setter (set (.sym Dst16An xmode) newval)) 3044 ) 3045 ) 3046 ) 3047 3048 (dst16-An-direct-operand QI) 3049 (dst16-An-direct-operand HI) 3050 (dst16-An-direct-operand SI) 3051 3052 (define-pmacro (dst32-An-direct-operand group base1 base2 xmode) 3053 (begin 3054 (define-derived-operand 3055 (name (.sym dst32-An-direct- group - xmode)) 3056 (comment (.str "m32c An direct destination " xmode)) 3057 (attrs (machine 32)) 3058 (mode xmode) 3059 (args ((.sym Dst32An group xmode))) 3060 (syntax (.str "$Dst32An" group xmode)) 3061 (base-ifield (.sym f- base1 -6)) 3062 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Dst32An group xmode))) 3063 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1))) 3064 (getter (trunc xmode (.sym Dst32An group xmode))) 3065 (setter (set (.sym Dst32An group xmode) newval)) 3066 ) 3067 ) 3068 ) 3069 3070 (dst32-An-direct-operand Unprefixed 4 8 QI) 3071 (dst32-An-direct-operand Prefixed 12 16 QI) 3072 (dst32-An-direct-operand Unprefixed 4 8 HI) 3073 (dst32-An-direct-operand Prefixed 12 16 HI) 3074 (dst32-An-direct-operand Unprefixed 4 8 SI) 3075 (dst32-An-direct-operand Prefixed 12 16 SI) 3076 3077 ;------------------------------------------------------------- 3078 ; An indirect 3079 ;------------------------------------------------------------- 3080 3081 (define-pmacro (dst16-An-indirect-operand xmode) 3082 (begin 3083 (define-derived-operand 3084 (name (.sym dst16-An-indirect- xmode)) 3085 (comment (.str "m16c An indirect destination " xmode)) 3086 (attrs (machine 16)) 3087 (mode xmode) 3088 (args (Dst16An)) 3089 (syntax "[$Dst16An]") 3090 (base-ifield f-12-4) 3091 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An)) 3092 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1))) 3093 (getter (mem16 xmode Dst16An)) 3094 (setter (set (mem16 xmode Dst16An) newval)) 3095 ) 3096 ) 3097 ) 3098 3099 (dst16-An-indirect-operand QI) 3100 (dst16-An-indirect-operand HI) 3101 (dst16-An-indirect-operand SI) 3102 3103 (define-derived-operand 3104 (name dst16-An-indirect-Ext-QI) 3105 (comment "m16c An indirect destination QI") 3106 (attrs (machine 16)) 3107 (mode HI) 3108 (args (Dst16An)) 3109 (syntax "[$Dst16An]") 3110 (base-ifield f-12-4) 3111 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An)) 3112 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1))) 3113 (getter (mem16 QI Dst16An)) 3114 (setter (set (mem16 HI Dst16An) newval)) 3115 ) 3116 3117 (define-pmacro (dst32-An-indirect-operand group base1 base2 smode dmode) 3118 (begin 3119 (define-derived-operand 3120 (name (.sym dst32-An-indirect- group - smode)) 3121 (comment (.str "m32c An indirect destination " smode)) 3122 (attrs (machine 32)) 3123 (mode dmode) 3124 (args ((.sym Dst32An group))) 3125 (syntax (.str "[$Dst32An" group "]")) 3126 (base-ifield (.sym f- base1 -6)) 3127 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Dst32An group))) 3128 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0))) 3129 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) 3130 (const 0))) 3131 (setter (c-call DFLT (.str "operand_setter_" dmode) newval 3132 (.sym Dst32An group) (const 0))) 3133 ; (getter (mem32 smode (.sym Dst32An group))) 3134 ; (setter (set (mem32 dmode (.sym Dst32An group)) newval)) 3135 ) 3136 ) 3137 ) 3138 3139 (dst32-An-indirect-operand Unprefixed 4 8 QI QI) 3140 (dst32-An-indirect-operand Prefixed 12 16 QI QI) 3141 (dst32-An-indirect-operand Unprefixed 4 8 HI HI) 3142 (dst32-An-indirect-operand Prefixed 12 16 HI HI) 3143 (dst32-An-indirect-operand Unprefixed 4 8 SI SI) 3144 (dst32-An-indirect-operand Prefixed 12 16 SI SI) 3145 (dst32-An-indirect-operand ExtUnprefixed 4 8 QI HI) 3146 (dst32-An-indirect-operand ExtUnprefixed 4 8 HI SI) 3147 3148 ;------------------------------------------------------------- 3149 ; dsp:d[r] relative 3150 ;------------------------------------------------------------- 3151 3152 (define-pmacro (dst16-relative-operand offset xmode) 3153 (begin 3154 (define-derived-operand 3155 (name (.sym dst16- offset -8-SB-relative- xmode)) 3156 (comment (.str "m16c dsp:8[sb] relative destination " xmode)) 3157 (attrs (machine 16)) 3158 (mode xmode) 3159 (args ((.sym Dsp- offset -u8))) 3160 (syntax (.str "${Dsp-" offset "-u8}[sb]")) 3161 (base-ifield f-12-4) 3162 (encoding (+ (f-12-4 #xA) (.sym Dsp- offset -u8))) 3163 (ifield-assertion (eq f-12-4 #xA)) 3164 (getter (mem16 xmode (add (.sym Dsp- offset -u8) (reg h-sb)))) 3165 (setter (set (mem16 xmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval)) 3166 ) 3167 (define-derived-operand 3168 (name (.sym dst16- offset -16-SB-relative- xmode)) 3169 (comment (.str "m16c dsp:16[sb] relative destination " xmode)) 3170 (attrs (machine 16)) 3171 (mode xmode) 3172 (args ((.sym Dsp- offset -u16))) 3173 (syntax (.str "${Dsp-" offset "-u16}[sb]")) 3174 (base-ifield f-12-4) 3175 (encoding (+ (f-12-4 #xE) (.sym Dsp- offset -u16))) 3176 (ifield-assertion (eq f-12-4 #xE)) 3177 (getter (mem16 xmode (add (.sym Dsp- offset -u16) (reg h-sb)))) 3178 (setter (set (mem16 xmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval)) 3179 ) 3180 (define-derived-operand 3181 (name (.sym dst16- offset -8-FB-relative- xmode)) 3182 (comment (.str "m16c dsp:8[fb] relative destination " xmode)) 3183 (attrs (machine 16)) 3184 (mode xmode) 3185 (args ((.sym Dsp- offset -s8))) 3186 (syntax (.str "${Dsp-" offset "-s8}[fb]")) 3187 (base-ifield f-12-4) 3188 (encoding (+ (f-12-4 #xB) (.sym Dsp- offset -s8))) 3189 (ifield-assertion (eq f-12-4 #xB)) 3190 (getter (mem16 xmode (add (.sym Dsp- offset -s8) (reg h-fb)))) 3191 (setter (set (mem16 xmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval)) 3192 ) 3193 (define-derived-operand 3194 (name (.sym dst16- offset -8-An-relative- xmode)) 3195 (comment (.str "m16c dsp:8[An] relative destination " xmode)) 3196 (attrs (machine 16)) 3197 (mode xmode) 3198 (args (Dst16An (.sym Dsp- offset -u8))) 3199 (syntax (.str "${Dsp-" offset "-u8}[$Dst16An]")) 3200 (base-ifield f-12-4) 3201 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Dst16An)) 3202 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0))) 3203 (getter (mem16 xmode (add (.sym Dsp- offset -u8) Dst16An))) 3204 (setter (set (mem16 xmode (add (.sym Dsp- offset -u8) Dst16An)) newval)) 3205 ) 3206 (define-derived-operand 3207 (name (.sym dst16- offset -16-An-relative- xmode)) 3208 (comment (.str "m16c dsp:16[An] relative destination " xmode)) 3209 (attrs (machine 16)) 3210 (mode xmode) 3211 (args (Dst16An (.sym Dsp- offset -u16))) 3212 (syntax (.str "${Dsp-" offset "-u16}[$Dst16An]")) 3213 (base-ifield f-12-4) 3214 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Dst16An)) 3215 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0))) 3216 (getter (mem16 xmode (add (.sym Dsp- offset -u16) Dst16An))) 3217 (setter (set (mem16 xmode (add (.sym Dsp- offset -u16) Dst16An)) newval)) 3218 ) 3219 (define-derived-operand 3220 (name (.sym dst16- offset -20-An-relative- xmode)) 3221 (comment (.str "m16c dsp:20[An] relative destination " xmode)) 3222 (attrs (machine 16)) 3223 (mode xmode) 3224 (args (Dst16An (.sym Dsp- offset -u20))) 3225 (syntax (.str "${Dsp-" offset "-u20}[$Dst16An]")) 3226 (base-ifield f-12-4) 3227 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u20) Dst16An)) 3228 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0))) 3229 (getter (mem16 xmode (add (.sym Dsp- offset -u20) Dst16An))) 3230 (setter (set (mem16 xmode (add (.sym Dsp- offset -u20) Dst16An)) newval)) 3231 ) 3232 ) 3233 ) 3234 3235 (dst16-relative-operand 16 QI) 3236 (dst16-relative-operand 24 QI) 3237 (dst16-relative-operand 32 QI) 3238 (dst16-relative-operand 40 QI) 3239 (dst16-relative-operand 48 QI) 3240 (dst16-relative-operand 16 HI) 3241 (dst16-relative-operand 24 HI) 3242 (dst16-relative-operand 32 HI) 3243 (dst16-relative-operand 40 HI) 3244 (dst16-relative-operand 48 HI) 3245 (dst16-relative-operand 16 SI) 3246 (dst16-relative-operand 24 SI) 3247 (dst16-relative-operand 32 SI) 3248 (dst16-relative-operand 40 SI) 3249 (dst16-relative-operand 48 SI) 3250 3251 (define-pmacro (dst16-relative-Ext-operand offset smode dmode) 3252 (begin 3253 (define-derived-operand 3254 (name (.sym dst16- offset -8-SB-relative-Ext- smode)) 3255 (comment (.str "m16c dsp:8[sb] relative destination " smode)) 3256 (attrs (machine 16)) 3257 (mode dmode) 3258 (args ((.sym Dsp- offset -u8))) 3259 (syntax (.str "${Dsp-" offset "-u8}[sb]")) 3260 (base-ifield f-12-4) 3261 (encoding (+ (f-12-4 #xA) (.sym Dsp- offset -u8))) 3262 (ifield-assertion (eq f-12-4 #xA)) 3263 (getter (mem16 smode (add (.sym Dsp- offset -u8) (reg h-sb)))) 3264 (setter (set (mem16 dmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval)) 3265 ) 3266 (define-derived-operand 3267 (name (.sym dst16- offset -16-SB-relative-Ext- smode)) 3268 (comment (.str "m16c dsp:16[sb] relative destination " smode)) 3269 (attrs (machine 16)) 3270 (mode dmode) 3271 (args ((.sym Dsp- offset -u16))) 3272 (syntax (.str "${Dsp-" offset "-u16}[sb]")) 3273 (base-ifield f-12-4) 3274 (encoding (+ (f-12-4 #xE) (.sym Dsp- offset -u16))) 3275 (ifield-assertion (eq f-12-4 #xE)) 3276 (getter (mem16 smode (add (.sym Dsp- offset -u16) (reg h-sb)))) 3277 (setter (set (mem16 dmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval)) 3278 ) 3279 (define-derived-operand 3280 (name (.sym dst16- offset -8-FB-relative-Ext- smode)) 3281 (comment (.str "m16c dsp:8[fb] relative destination " smode)) 3282 (attrs (machine 16)) 3283 (mode dmode) 3284 (args ((.sym Dsp- offset -s8))) 3285 (syntax (.str "${Dsp-" offset "-s8}[fb]")) 3286 (base-ifield f-12-4) 3287 (encoding (+ (f-12-4 #xB) (.sym Dsp- offset -s8))) 3288 (ifield-assertion (eq f-12-4 #xB)) 3289 (getter (mem16 smode (add (.sym Dsp- offset -s8) (reg h-fb)))) 3290 (setter (set (mem16 dmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval)) 3291 ) 3292 (define-derived-operand 3293 (name (.sym dst16- offset -8-An-relative-Ext- smode)) 3294 (comment (.str "m16c dsp:8[An] relative destination " smode)) 3295 (attrs (machine 16)) 3296 (mode dmode) 3297 (args (Dst16An (.sym Dsp- offset -u8))) 3298 (syntax (.str "${Dsp-" offset "-u8}[$Dst16An]")) 3299 (base-ifield f-12-4) 3300 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Dst16An)) 3301 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0))) 3302 (getter (mem16 smode (add (.sym Dsp- offset -u8) Dst16An))) 3303 (setter (set (mem16 dmode (add (.sym Dsp- offset -u8) Dst16An)) newval)) 3304 ) 3305 (define-derived-operand 3306 (name (.sym dst16- offset -16-An-relative-Ext- smode)) 3307 (comment (.str "m16c dsp:16[An] relative destination " smode)) 3308 (attrs (machine 16)) 3309 (mode dmode) 3310 (args (Dst16An (.sym Dsp- offset -u16))) 3311 (syntax (.str "${Dsp-" offset "-u16}[$Dst16An]")) 3312 (base-ifield f-12-4) 3313 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Dst16An)) 3314 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0))) 3315 (getter (mem16 smode (add (.sym Dsp- offset -u16) Dst16An))) 3316 (setter (set (mem16 dmode (add (.sym Dsp- offset -u16) Dst16An)) newval)) 3317 ) 3318 ) 3319 ) 3320 3321 (dst16-relative-Ext-operand 16 QI HI) 3322 3323 (define-pmacro (dst32-relative-operand offset group base1 base2 smode dmode) 3324 (begin 3325 (define-derived-operand 3326 (name (.sym dst32- offset -8-SB-relative- group - smode)) 3327 (comment (.str "m32c dsp:8[sb] relative destination " smode)) 3328 (attrs (machine 32)) 3329 (mode dmode) 3330 (args ((.sym Dsp- offset -u8))) 3331 (syntax (.str "${Dsp-" offset "-u8}[sb]")) 3332 (base-ifield (.sym f- base1 -6)) 3333 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u8))) 3334 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2))) 3335 (getter (c-call dmode (.str "operand_getter_" dmode) sb (.sym Dsp- offset -u8))) 3336 (setter (c-call DFLT (.str "operand_setter_" dmode) newval sb (.sym Dsp- offset -u8))) 3337 ; (getter (mem32 smode (add (.sym Dsp- offset -u8) (reg h-sb)))) 3338 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval)) 3339 ) 3340 (define-derived-operand 3341 (name (.sym dst32- offset -16-SB-relative- group - smode)) 3342 (comment (.str "m32c dsp:16[sb] relative destination " smode)) 3343 (attrs (machine 32)) 3344 (mode dmode) 3345 (args ((.sym Dsp- offset -u16))) 3346 (syntax (.str "${Dsp-" offset "-u16}[sb]")) 3347 (base-ifield (.sym f- base1 -6)) 3348 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u16))) 3349 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2))) 3350 (getter (c-call dmode (.str "operand_getter_" dmode) sb (.sym Dsp- offset -u16))) 3351 (setter (c-call DFLT (.str "operand_setter_" dmode) newval sb (.sym Dsp- offset -u16))) 3352 ; (getter (mem32 smode (add (.sym Dsp- offset -u16) (reg h-sb)))) 3353 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval)) 3354 ) 3355 (define-derived-operand 3356 (name (.sym dst32- offset -8-FB-relative- group - smode)) 3357 (comment (.str "m32c dsp:8[fb] relative destination " smode)) 3358 (attrs (machine 32)) 3359 (mode dmode) 3360 (args ((.sym Dsp- offset -s8))) 3361 (syntax (.str "${Dsp-" offset "-s8}[fb]")) 3362 (base-ifield (.sym f- base1 -6)) 3363 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s8))) 3364 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3))) 3365 (getter (c-call dmode (.str "operand_getter_" dmode) fb (.sym Dsp- offset -s8))) 3366 (setter (c-call DFLT (.str "operand_setter_" dmode) newval fb (.sym Dsp- offset -s8))) 3367 ; (getter (mem32 smode (add (.sym Dsp- offset -s8) (reg h-fb)))) 3368 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval)) 3369 ) 3370 (define-derived-operand 3371 (name (.sym dst32- offset -16-FB-relative- group - smode)) 3372 (comment (.str "m32c dsp:16[fb] relative destination " smode)) 3373 (attrs (machine 32)) 3374 (mode dmode) 3375 (args ((.sym Dsp- offset -s16))) 3376 (syntax (.str "${Dsp-" offset "-s16}[fb]")) 3377 (base-ifield (.sym f- base1 -6)) 3378 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s16))) 3379 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3))) 3380 (getter (c-call dmode (.str "operand_getter_" dmode) fb (.sym Dsp- offset -s16))) 3381 (setter (c-call DFLT (.str "operand_setter_" dmode) newval fb (.sym Dsp- offset -s16))) 3382 ; (getter (mem32 smode (add (.sym Dsp- offset -s16) (reg h-fb)))) 3383 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -s16) (reg h-fb))) newval)) 3384 ) 3385 (define-derived-operand 3386 (name (.sym dst32- offset -8-An-relative- group - smode)) 3387 (comment (.str "m32c dsp:8[An] relative destination " smode)) 3388 (attrs (machine 32)) 3389 (mode dmode) 3390 (args ((.sym Dst32An group) (.sym Dsp- offset -u8))) 3391 (syntax (.str "${Dsp-" offset "-u8}[$Dst32An" group "]")) 3392 (base-ifield (.sym f- base1 -6)) 3393 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u8) (.sym Dst32An group))) 3394 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0))) 3395 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u8))) 3396 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u8))) 3397 ; (getter (mem32 smode (add (.sym Dsp- offset -u8) (.sym Dst32An group)))) 3398 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u8) (.sym Dst32An group))) newval)) 3399 ) 3400 (define-derived-operand 3401 (name (.sym dst32- offset -16-An-relative- group - smode)) 3402 (comment (.str "m32c dsp:16[An] relative destination " smode)) 3403 (attrs (machine 32)) 3404 (mode dmode) 3405 (args ((.sym Dst32An group) (.sym Dsp- offset -u16))) 3406 (syntax (.str "${Dsp-" offset "-u16}[$Dst32An" group "]")) 3407 (base-ifield (.sym f- base1 -6)) 3408 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u16) (.sym Dst32An group))) 3409 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0))) 3410 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u16))) 3411 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u16))) 3412 ; (getter (mem32 smode (add (.sym Dsp- offset -u16) (.sym Dst32An group)))) 3413 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u16) (.sym Dst32An group))) newval)) 3414 ) 3415 (define-derived-operand 3416 (name (.sym dst32- offset -24-An-relative- group - smode)) 3417 (comment (.str "m32c dsp:16[An] relative destination " smode)) 3418 (attrs (machine 32)) 3419 (mode dmode) 3420 (args ((.sym Dst32An group) (.sym Dsp- offset -u24))) 3421 (syntax (.str "${Dsp-" offset "-u24}[$Dst32An" group "]")) 3422 (base-ifield (.sym f- base1 -6)) 3423 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u24) (.sym Dst32An group))) 3424 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0))) 3425 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u24))) 3426 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u24))) 3427 ; (getter (mem32 smode (add (.sym Dsp- offset -u24) (.sym Dst32An group)))) 3428 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u24) (.sym Dst32An group))) newval)) 3429 ) 3430 ) 3431 ) 3432 3433 (dst32-relative-operand 16 Unprefixed 4 8 QI QI) 3434 (dst32-relative-operand 24 Unprefixed 4 8 QI QI) 3435 (dst32-relative-operand 32 Unprefixed 4 8 QI QI) 3436 (dst32-relative-operand 40 Unprefixed 4 8 QI QI) 3437 (dst32-relative-operand 16 Unprefixed 4 8 HI HI) 3438 (dst32-relative-operand 24 Unprefixed 4 8 HI HI) 3439 (dst32-relative-operand 32 Unprefixed 4 8 HI HI) 3440 (dst32-relative-operand 40 Unprefixed 4 8 HI HI) 3441 (dst32-relative-operand 16 Unprefixed 4 8 SI SI) 3442 (dst32-relative-operand 24 Unprefixed 4 8 SI SI) 3443 (dst32-relative-operand 32 Unprefixed 4 8 SI SI) 3444 (dst32-relative-operand 40 Unprefixed 4 8 SI SI) 3445 3446 (dst32-relative-operand 24 Prefixed 12 16 QI QI) 3447 (dst32-relative-operand 32 Prefixed 12 16 QI QI) 3448 (dst32-relative-operand 40 Prefixed 12 16 QI QI) 3449 (dst32-relative-operand 48 Prefixed 12 16 QI QI) 3450 (dst32-relative-operand 24 Prefixed 12 16 HI HI) 3451 (dst32-relative-operand 32 Prefixed 12 16 HI HI) 3452 (dst32-relative-operand 40 Prefixed 12 16 HI HI) 3453 (dst32-relative-operand 48 Prefixed 12 16 HI HI) 3454 (dst32-relative-operand 24 Prefixed 12 16 SI SI) 3455 (dst32-relative-operand 32 Prefixed 12 16 SI SI) 3456 (dst32-relative-operand 40 Prefixed 12 16 SI SI) 3457 (dst32-relative-operand 48 Prefixed 12 16 SI SI) 3458 3459 (dst32-relative-operand 16 ExtUnprefixed 4 8 QI HI) 3460 (dst32-relative-operand 16 ExtUnprefixed 4 8 HI SI) 3461 3462 ;------------------------------------------------------------- 3463 ; Absolute address 3464 ;------------------------------------------------------------- 3465 3466 (define-pmacro (dst16-absolute offset xmode) 3467 (begin 3468 (define-derived-operand 3469 (name (.sym dst16- offset -16-absolute- xmode)) 3470 (comment (.str "m16c absolute address " xmode)) 3471 (attrs (machine 16)) 3472 (mode xmode) 3473 (args ((.sym Dsp- offset -u16))) 3474 (syntax (.str "${Dsp-" offset "-u16}")) 3475 (base-ifield f-12-4) 3476 (encoding (+ (f-12-4 #xF) (.sym Dsp- offset -u16))) 3477 (ifield-assertion (eq f-12-4 #xF)) 3478 (getter (mem16 xmode (.sym Dsp- offset -u16))) 3479 (setter (set (mem16 xmode (.sym Dsp- offset -u16)) newval)) 3480 ) 3481 ) 3482 ) 3483 3484 (dst16-absolute 16 QI) 3485 (dst16-absolute 24 QI) 3486 (dst16-absolute 32 QI) 3487 (dst16-absolute 40 QI) 3488 (dst16-absolute 48 QI) 3489 (dst16-absolute 16 HI) 3490 (dst16-absolute 24 HI) 3491 (dst16-absolute 32 HI) 3492 (dst16-absolute 40 HI) 3493 (dst16-absolute 48 HI) 3494 (dst16-absolute 16 SI) 3495 (dst16-absolute 24 SI) 3496 (dst16-absolute 32 SI) 3497 (dst16-absolute 40 SI) 3498 (dst16-absolute 48 SI) 3499 3500 (define-derived-operand 3501 (name dst16-16-16-absolute-Ext-QI) 3502 (comment "m16c absolute address QI") 3503 (attrs (machine 16)) 3504 (mode HI) 3505 (args (Dsp-16-u16)) 3506 (syntax "${Dsp-16-u16}") 3507 (base-ifield f-12-4) 3508 (encoding (+ (f-12-4 #xF) Dsp-16-u16)) 3509 (ifield-assertion (eq f-12-4 #xF)) 3510 (getter (mem16 QI Dsp-16-u16)) 3511 (setter (set (mem16 HI Dsp-16-u16) newval)) 3512 ) 3513 3514 (define-pmacro (dst32-absolute offset group base1 base2 smode dmode) 3515 (begin 3516 (define-derived-operand 3517 (name (.sym dst32- offset -16-absolute- group - smode)) 3518 (comment (.str "m32c absolute address " smode)) 3519 (attrs (machine 32)) 3520 (mode dmode) 3521 (args ((.sym Dsp- offset -u16))) 3522 (syntax (.str "${Dsp-" offset "-u16}")) 3523 (base-ifield (.sym f- base1 -6)) 3524 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16))) 3525 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3))) 3526 (getter (c-call smode (.str "operand_getter_" smode) (const 0) (.sym Dsp- offset -u16))) 3527 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (const 0) (.sym Dsp- offset -u16))) 3528 ; (getter (mem32 smode (.sym Dsp- offset -u16))) 3529 ; (setter (set (mem32 dmode (.sym Dsp- offset -u16)) newval)) 3530 ) 3531 (define-derived-operand 3532 (name (.sym dst32- offset -24-absolute- group - smode)) 3533 (comment (.str "m32c absolute address " smode)) 3534 (attrs (machine 32)) 3535 (mode dmode) 3536 (args ((.sym Dsp- offset -u24))) 3537 (syntax (.str "${Dsp-" offset "-u24}")) 3538 (base-ifield (.sym f- base1 -6)) 3539 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24))) 3540 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2))) 3541 (getter (c-call smode (.str "operand_getter_" smode) (const 0) (.sym Dsp- offset -u24))) 3542 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (const 0) (.sym Dsp- offset -u24))) 3543 ; (getter (mem32 smode (.sym Dsp- offset -u24))) 3544 ; (setter (set (mem32 dmode (.sym Dsp- offset -u24)) newval)) 3545 ) 3546 ) 3547 ) 3548 3549 (dst32-absolute 16 Unprefixed 4 8 QI QI) 3550 (dst32-absolute 24 Unprefixed 4 8 QI QI) 3551 (dst32-absolute 32 Unprefixed 4 8 QI QI) 3552 (dst32-absolute 40 Unprefixed 4 8 QI QI) 3553 (dst32-absolute 16 Unprefixed 4 8 HI HI) 3554 (dst32-absolute 24 Unprefixed 4 8 HI HI) 3555 (dst32-absolute 32 Unprefixed 4 8 HI HI) 3556 (dst32-absolute 40 Unprefixed 4 8 HI HI) 3557 (dst32-absolute 16 Unprefixed 4 8 SI SI) 3558 (dst32-absolute 24 Unprefixed 4 8 SI SI) 3559 (dst32-absolute 32 Unprefixed 4 8 SI SI) 3560 (dst32-absolute 40 Unprefixed 4 8 SI SI) 3561 3562 (dst32-absolute 24 Prefixed 12 16 QI QI) 3563 (dst32-absolute 32 Prefixed 12 16 QI QI) 3564 (dst32-absolute 40 Prefixed 12 16 QI QI) 3565 (dst32-absolute 48 Prefixed 12 16 QI QI) 3566 (dst32-absolute 24 Prefixed 12 16 HI HI) 3567 (dst32-absolute 32 Prefixed 12 16 HI HI) 3568 (dst32-absolute 40 Prefixed 12 16 HI HI) 3569 (dst32-absolute 48 Prefixed 12 16 HI HI) 3570 (dst32-absolute 24 Prefixed 12 16 SI SI) 3571 (dst32-absolute 32 Prefixed 12 16 SI SI) 3572 (dst32-absolute 40 Prefixed 12 16 SI SI) 3573 (dst32-absolute 48 Prefixed 12 16 SI SI) 3574 3575 (dst32-absolute 16 ExtUnprefixed 4 8 QI HI) 3576 (dst32-absolute 16 ExtUnprefixed 4 8 HI SI) 3577 3578 ;------------------------------------------------------------- 3579 ; An indirect indirect 3580 ;------------------------------------------------------------- 3581 3582 ;(define-pmacro (dst-An-indirect-indirect-operand xmode) 3583 ; (define-derived-operand 3584 ; (name (.sym dst32-An-indirect-indirect- xmode)) 3585 ; (comment (.str "m32c An indirect indirect destination " xmode)) 3586 ; (attrs (machine 32)) 3587 ; (mode xmode) 3588 ; (args (Dst32AnPrefixed)) 3589 ; (syntax (.str "[[$Dst32AnPrefixed]]")) 3590 ; (base-ifield f-12-6) 3591 ; (encoding (+ (f-12-3 0) (f-16-1 0) Dst32AnPrefixed)) 3592 ; (ifield-assertion (andif (eq f-12-3 0) (eq f-16-1 0))) 3593 ; (getter (mem32 xmode (indirect-addr Dst32AnPrefixed))) 3594 ; (setter (set (mem32 xmode (indirect-addr Dst32AnPrefixed)) newval)) 3595 ; ) 3596 ;) 3597 3598 ; (dst-An-indirect-indirect-operand QI) 3599 ; (dst-An-indirect-indirect-operand HI) 3600 ; (dst-An-indirect-indirect-operand SI) 3601 3602 ;------------------------------------------------------------- 3603 ; Relative indirect 3604 ;------------------------------------------------------------- 3605 3606 (define-pmacro (dst-relative-indirect-operand offset xmode) 3607 (begin 3608 ; (define-derived-operand 3609 ; (name (.sym dst32- offset -8-SB-relative-indirect- xmode)) 3610 ; (comment (.str "m32c dsp:8[sb] relative destination " xmode)) 3611 ; (attrs (machine 32)) 3612 ; (mode xmode) 3613 ; (args ((.sym Dsp- offset -u8))) 3614 ; (syntax (.str "[${Dsp-" offset "-u8}[sb]]")) 3615 ; (base-ifield f-12-6) 3616 ; (encoding (+ (f-12-3 1) (f-16-2 2) (.sym Dsp- offset -u8))) 3617 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-2 2))) 3618 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) (reg h-sb))))) 3619 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) (reg h-sb)))) newval)) 3620 ; ) 3621 ; (define-derived-operand 3622 ; (name (.sym dst32- offset -16-SB-relative-indirect- xmode)) 3623 ; (comment (.str "m32c dsp:16[sb] relative destination " xmode)) 3624 ; (attrs (machine 32)) 3625 ; (mode xmode) 3626 ; (args ((.sym Dsp- offset -u16))) 3627 ; (syntax (.str "[${Dsp-" offset "-u16}[sb]]")) 3628 ; (base-ifield f-12-6) 3629 ; (encoding (+ (f-12-3 2) (f-16-2 2) (.sym Dsp- offset -u16))) 3630 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-2 2))) 3631 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) (reg h-sb))))) 3632 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) (reg h-sb)))) newval)) 3633 ; ) 3634 ; (define-derived-operand 3635 ; (name (.sym dst32- offset -8-FB-relative-indirect- xmode)) 3636 ; (comment (.str "m32c dsp:8[fb] relative destination " xmode)) 3637 ; (attrs (machine 32)) 3638 ; (mode xmode) 3639 ; (args ((.sym Dsp- offset -s8))) 3640 ; (syntax (.str "[${Dsp-" offset "-s8}[fb]]")) 3641 ; (base-ifield f-12-6) 3642 ; (encoding (+ (f-12-3 1) (f-16-2 3) (.sym Dsp- offset -s8))) 3643 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-2 3))) 3644 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s8) (reg h-fb))))) 3645 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s8) (reg h-fb)))) newval)) 3646 ; ) 3647 ; (define-derived-operand 3648 ; (name (.sym dst32- offset -16-FB-relative-indirect- xmode)) 3649 ; (comment (.str "m32c dsp:16[fb] relative destination " xmode)) 3650 ; (attrs (machine 32)) 3651 ; (mode xmode) 3652 ; (args ((.sym Dsp- offset -s16))) 3653 ; (syntax (.str "[${Dsp-" offset "-s16}[fb]]")) 3654 ; (base-ifield f-12-6) 3655 ; (encoding (+ (f-12-3 2) (f-16-2 3) (.sym Dsp- offset -s16))) 3656 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-2 3))) 3657 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s16) (reg h-fb))))) 3658 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s16) (reg h-fb)))) newval)) 3659 ; ) 3660 ; (define-derived-operand 3661 ; (name (.sym dst32- offset -8-An-relative-indirect- xmode)) 3662 ; (comment (.str "m32c dsp:8[An] relative indirect destination " xmode)) 3663 ; (attrs (machine 32)) 3664 ; (mode xmode) 3665 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u8))) 3666 ; (syntax (.str "[${Dsp-" offset "-u8}[$Dst32AnPrefixed]]")) 3667 ; (base-ifield f-12-6) 3668 ; (encoding (+ (f-12-3 1) (f-16-1 0) (.sym Dsp- offset -u8) Dst32AnPrefixed)) 3669 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-1 0))) 3670 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) Dst32AnPrefixed)))) 3671 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) Dst32AnPrefixed))) newval)) 3672 ; ) 3673 ; (define-derived-operand 3674 ; (name (.sym dst32- offset -16-An-relative-indirect- xmode)) 3675 ; (comment (.str "m32c dsp:16[An] relative destination " xmode)) 3676 ; (attrs (machine 32)) 3677 ; (mode xmode) 3678 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u16))) 3679 ; (syntax (.str "[${Dsp-" offset "-u16}[$Dst32AnPrefixed]]")) 3680 ; (base-ifield f-12-6) 3681 ; (encoding (+ (f-12-3 2) (f-16-1 0) (.sym Dsp- offset -u16) Dst32AnPrefixed)) 3682 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-1 0))) 3683 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) Dst32AnPrefixed)))) 3684 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) Dst32AnPrefixed))) newval)) 3685 ; ) 3686 ; (define-derived-operand 3687 ; (name (.sym dst32- offset -24-An-relative-indirect- xmode)) 3688 ; (comment (.str "m32c dsp:24[An] relative destination " xmode)) 3689 ; (attrs (machine 32)) 3690 ; (mode xmode) 3691 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u24))) 3692 ; (syntax (.str "[${Dsp-" offset "-u24}[$Dst32AnPrefixed]]")) 3693 ; (base-ifield f-12-6) 3694 ; (encoding (+ (f-12-3 3) (f-16-1 0) (.sym Dsp- offset -u24) Dst32AnPrefixed)) 3695 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-1 0))) 3696 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u24) Dst32AnPrefixed)))) 3697 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u24) Dst32AnPrefixed))) newval)) 3698 ; ) 3699 ) 3700 ) 3701 3702 ; (dst-relative-indirect-operand 24 QI) 3703 ; (dst-relative-indirect-operand 32 QI) 3704 ; (dst-relative-indirect-operand 40 QI) 3705 ; (dst-relative-indirect-operand 48 QI) 3706 ; (dst-relative-indirect-operand 24 HI) 3707 ; (dst-relative-indirect-operand 32 HI) 3708 ; (dst-relative-indirect-operand 40 HI) 3709 ; (dst-relative-indirect-operand 48 HI) 3710 ; (dst-relative-indirect-operand 24 SI) 3711 ; (dst-relative-indirect-operand 32 SI) 3712 ; (dst-relative-indirect-operand 40 SI) 3713 ; (dst-relative-indirect-operand 48 SI) 3714 3715 ;------------------------------------------------------------- 3716 ; Absolute indirect 3717 ;------------------------------------------------------------- 3718 3719 (define-pmacro (dst-absolute-indirect offset xmode) 3720 (begin 3721 ; (define-derived-operand 3722 ; (name (.sym dst32- offset -16-absolute-indirect-derived- xmode)) 3723 ; (comment (.str "m32c absolute indirect address " xmode)) 3724 ; (attrs (machine 32)) 3725 ; (mode xmode) 3726 ; (args ((.sym Dsp- offset -u16))) 3727 ; (syntax (.str "[${Dsp-" offset "-u16}]")) 3728 ; (base-ifield f-12-6) 3729 ; (encoding (+ (f-12-3 3) (f-16-2 3) (.sym Dsp- offset -u16))) 3730 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-2 3))) 3731 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u16)))) 3732 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))) newval)) 3733 ; ) 3734 ; (define-derived-operand 3735 ; (name (.sym dst32- offset -24-absolute-indirect-derived- xmode)) 3736 ; (comment (.str "m32c absolute indirect address " xmode)) 3737 ; (attrs (machine 32)) 3738 ; (mode xmode) 3739 ; (args ((.sym Dsp- offset -u24))) 3740 ; (syntax (.str "[${Dsp-" offset "-u24}]")) 3741 ; (base-ifield f-12-6) 3742 ; (encoding (+ (f-12-3 3) (f-16-2 2) (.sym Dsp- offset -u24))) 3743 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-2 2))) 3744 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u24)))) 3745 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))) newval)) 3746 ; ) 3747 ) 3748 ) 3749 3750 (dst-absolute-indirect 24 QI) 3751 (dst-absolute-indirect 32 QI) 3752 (dst-absolute-indirect 40 QI) 3753 (dst-absolute-indirect 48 QI) 3754 (dst-absolute-indirect 24 HI) 3755 (dst-absolute-indirect 32 HI) 3756 (dst-absolute-indirect 40 HI) 3757 (dst-absolute-indirect 48 HI) 3758 (dst-absolute-indirect 24 SI) 3759 (dst-absolute-indirect 32 SI) 3760 (dst-absolute-indirect 40 SI) 3761 (dst-absolute-indirect 48 SI) 3762 3763 ;------------------------------------------------------------- 3764 ; Bit operands 3765 ;------------------------------------------------------------- 3766 (define-pmacro (get-register-bit reg bitno) 3767 (and (srl reg bitno) 1) 3768 ) 3769 3770 (define-pmacro (set-register-bit reg bitno value) 3771 (set reg (or (and reg (inv (sll 1 bitno))) 3772 (sll (and QI value 1) bitno))) 3773 ) 3774 3775 (define-pmacro (get-memory-bit mach base bitno) 3776 (and (srl (mem-mach mach QI (add base (div bitno 8))) 3777 (mod bitno 8)) 3778 1) 3779 ) 3780 3781 (define-pmacro (set-memory-bit mach base bitno value) 3782 (sequence ((USI addr)) 3783 (set addr (add base (div bitno 8))) 3784 (set (mem-mach mach QI addr) 3785 (or (and (mem-mach mach QI addr) 3786 (inv (sll 1 (mod bitno 8)))) 3787 (sll (and QI value 1) (mod bitno 8))))) 3788 ) 3789 3790 ;------------------------------------------------------------- 3791 ; Rn direct 3792 ;------------------------------------------------------------- 3793 3794 (define-derived-operand 3795 (name bit16-Rn-direct) 3796 (comment "m16c Rn direct bit") 3797 (attrs (machine 16)) 3798 (mode BI) 3799 (args (Bitno16R Bit16Rn)) 3800 (syntax "$Bitno16R,$Bit16Rn") 3801 (base-ifield f-12-4) 3802 (encoding (+ (f-12-2 0) Bit16Rn Bitno16R)) 3803 (ifield-assertion (eq f-12-2 0)) 3804 (getter (get-register-bit Bit16Rn Bitno16R)) 3805 (setter (set-register-bit Bit16Rn Bitno16R newval)) 3806 ) 3807 3808 (define-pmacro (bit32-Rn-direct-operand group base) 3809 (begin 3810 (define-derived-operand 3811 (name (.sym bit32-Rn-direct- group)) 3812 (comment "m32c Rn direct bit") 3813 (attrs (machine 32)) 3814 (mode BI) 3815 (args ((.sym Bitno32 group) (.sym Bit32Rn group))) 3816 (syntax (.str "$Bitno32" group ",$Bit32Rn" group)) 3817 (base-ifield (.sym f- base -6)) 3818 (encoding (+ ((.sym f- base -3) 4) (.sym Bit32Rn group) (.sym Bitno32 group))) 3819 (ifield-assertion (eq (.sym f- base -3) 4)) 3820 (getter (get-register-bit (.sym Bit32Rn group) (.sym Bitno32 group))) 3821 (setter (set-register-bit (.sym Bit32Rn group) (.sym Bitno32 group) newval)) 3822 ) 3823 ) 3824 ) 3825 3826 (bit32-Rn-direct-operand Unprefixed 4) 3827 (bit32-Rn-direct-operand Prefixed 12) 3828 3829 ;------------------------------------------------------------- 3830 ; An direct 3831 ;------------------------------------------------------------- 3832 3833 (define-derived-operand 3834 (name bit16-An-direct) 3835 (comment "m16c An direct bit") 3836 (attrs (machine 16)) 3837 (mode BI) 3838 (args (Bitno16R Bit16An)) 3839 (syntax "$Bitno16R,$Bit16An") 3840 (base-ifield f-12-4) 3841 (encoding (+ (f-12-2 1) (f-14-1 0) Bit16An Bitno16R)) 3842 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 0))) 3843 (getter (get-register-bit Bit16An Bitno16R)) 3844 (setter (set-register-bit Bit16An Bitno16R newval)) 3845 ) 3846 3847 (define-pmacro (bit32-An-direct-operand group base1 base2) 3848 (begin 3849 (define-derived-operand 3850 (name (.sym bit32-An-direct- group)) 3851 (comment "m32c An direct bit") 3852 (attrs (machine 32)) 3853 (mode BI) 3854 (args ((.sym Bitno32 group) (.sym Bit32An group))) 3855 (syntax (.str "$Bitno32" group ",$Bit32An" group)) 3856 (base-ifield (.sym f- base1 -6)) 3857 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Bit32An group) (.sym Bitno32 group))) 3858 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1))) 3859 (getter (get-register-bit (.sym Bit32An group) (.sym Bitno32 group))) 3860 (setter (set-register-bit (.sym Bit32An group) (.sym Bitno32 group) newval)) 3861 ) 3862 ) 3863 ) 3864 3865 (bit32-An-direct-operand Unprefixed 4 8) 3866 (bit32-An-direct-operand Prefixed 12 16) 3867 3868 ;------------------------------------------------------------- 3869 ; An indirect 3870 ;------------------------------------------------------------- 3871 3872 (define-derived-operand 3873 (name bit16-An-indirect) 3874 (comment "m16c An indirect bit") 3875 (attrs (machine 16)) 3876 (mode BI) 3877 (args (Bit16An)) 3878 (syntax "[$Bit16An]") 3879 (base-ifield f-12-4) 3880 (encoding (+ (f-12-2 1) (f-14-1 1) Bit16An)) 3881 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1))) 3882 (getter (get-memory-bit 16 0 Bit16An)) 3883 (setter (set-memory-bit 16 0 Bit16An newval)) 3884 ) 3885 3886 (define-pmacro (bit32-An-indirect-operand group base1 base2) 3887 (begin 3888 (define-derived-operand 3889 (name (.sym bit32-An-indirect- group)) 3890 (comment "m32c An indirect destination ") 3891 (attrs (machine 32)) 3892 (mode BI) 3893 (args ((.sym Bitno32 group) (.sym Bit32An group))) 3894 (syntax (.str "$Bitno32" group ",[$Bit32An" group "]")) 3895 (base-ifield (.sym f- base1 -6)) 3896 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Bit32An group) (.sym Bitno32 group))) 3897 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0))) 3898 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym Bitno32 group))) 3899 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym Bitno32 group) newval)) 3900 ) 3901 ) 3902 ) 3903 3904 (bit32-An-indirect-operand Unprefixed 4 8) 3905 (bit32-An-indirect-operand Prefixed 12 16) 3906 3907 ;------------------------------------------------------------- 3908 ; dsp:d[r] relative 3909 ;------------------------------------------------------------- 3910 3911 (define-pmacro (bit16-relative-operand offset) 3912 (begin 3913 (define-derived-operand 3914 (name (.sym bit16- offset -8-SB-relative)) 3915 (comment (.str "m16c dsp:8[sb] relative bit " xmode)) 3916 (attrs (machine 16)) 3917 (mode BI) 3918 (args ((.sym BitBase16- offset -u8))) 3919 (syntax (.str "${BitBase16-" offset "-u8}[sb]")) 3920 (base-ifield f-12-4) 3921 (encoding (+ (f-12-4 #xA) (.sym BitBase16- offset -u8))) 3922 (ifield-assertion (eq f-12-4 #xA)) 3923 (getter (get-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u8))) 3924 (setter (set-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u8) newval)) 3925 ) 3926 (define-derived-operand 3927 (name (.sym bit16- offset -16-SB-relative)) 3928 (comment (.str "m16c dsp:16[sb] relative bit " xmode)) 3929 (attrs (machine 16)) 3930 (mode BI) 3931 (args ((.sym BitBase16- offset -u16))) 3932 (syntax (.str "${BitBase16-" offset "-u16}[sb]")) 3933 (base-ifield f-12-4) 3934 (encoding (+ (f-12-4 #xE) (.sym BitBase16- offset -u16))) 3935 (ifield-assertion (eq f-12-4 #xE)) 3936 (getter (get-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u16))) 3937 (setter (set-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u16) newval)) 3938 ) 3939 (define-derived-operand 3940 (name (.sym bit16- offset -8-FB-relative)) 3941 (comment (.str "m16c dsp:8[fb] relative bit " xmode)) 3942 (attrs (machine 16)) 3943 (mode BI) 3944 (args ((.sym BitBase16- offset -s8))) 3945 (syntax (.str "${BitBase16-" offset "-s8}[fb]")) 3946 (base-ifield f-12-4) 3947 (encoding (+ (f-12-4 #xB) (.sym BitBase16- offset -s8))) 3948 (ifield-assertion (eq f-12-4 #xB)) 3949 (getter (get-memory-bit 16 (reg h-fb) (.sym BitBase16- offset -s8))) 3950 (setter (set-memory-bit 16 (reg h-fb) (.sym BitBase16- offset -s8) newval)) 3951 ) 3952 (define-derived-operand 3953 (name (.sym bit16- offset -8-An-relative)) 3954 (comment (.str "m16c dsp:8[An] relative bit " xmode)) 3955 (attrs (machine 16)) 3956 (mode BI) 3957 (args (Bit16An (.sym Dsp- offset -u8))) 3958 (syntax (.str "${Dsp-" offset "-u8}[$Bit16An]")) 3959 (base-ifield f-12-4) 3960 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Bit16An)) 3961 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0))) 3962 (getter (get-memory-bit 16 (.sym Dsp- offset -u8) Bit16An)) 3963 (setter (set-memory-bit 16 (.sym Dsp- offset -u8) Bit16An newval)) 3964 ) 3965 (define-derived-operand 3966 (name (.sym bit16- offset -16-An-relative)) 3967 (comment (.str "m16c dsp:16[An] relative bit " xmode)) 3968 (attrs (machine 16)) 3969 (mode BI) 3970 (args (Bit16An (.sym Dsp- offset -u16))) 3971 (syntax (.str "${Dsp-" offset "-u16}[$Bit16An]")) 3972 (base-ifield f-12-4) 3973 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Bit16An)) 3974 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0))) 3975 (getter (get-memory-bit 16 (.sym Dsp- offset -u16) Bit16An)) 3976 (setter (set-memory-bit 16 (.sym Dsp- offset -u16) Bit16An newval)) 3977 ) 3978 ) 3979 ) 3980 3981 (bit16-relative-operand 16) 3982 3983 (define-pmacro (bit32-relative-operand offset group base1 base2) 3984 (begin 3985 (define-derived-operand 3986 (name (.sym bit32- offset -11-SB-relative- group)) 3987 (comment "m32c bit,base:11[sb] relative bit") 3988 (attrs (machine 32)) 3989 (mode BI) 3990 (args ((.sym BitBase32- offset -u11- group))) 3991 (syntax (.str "${BitBase32-" offset "-u11-" group "}[sb]")) 3992 (base-ifield (.sym f- base1 -12)) 3993 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u11- group))) 3994 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2))) 3995 (getter (get-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u11- group))) 3996 (setter (set-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u11- group) newval)) 3997 ) 3998 (define-derived-operand 3999 (name (.sym bit32- offset -19-SB-relative- group)) 4000 (comment "m32c bit,base:19[sb] relative bit") 4001 (attrs (machine 32)) 4002 (mode BI) 4003 (args ((.sym BitBase32- offset -u19- group))) 4004 (syntax (.str "${BitBase32-" offset "-u19-" group "}[sb]")) 4005 (base-ifield (.sym f- base1 -12)) 4006 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u19- group))) 4007 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2))) 4008 (getter (get-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u19- group))) 4009 (setter (set-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u19- group) newval)) 4010 ) 4011 (define-derived-operand 4012 (name (.sym bit32- offset -11-FB-relative- group)) 4013 (comment "m32c bit,base:11[fb] relative bit") 4014 (attrs (machine 32)) 4015 (mode BI) 4016 (args ((.sym BitBase32- offset -s11- group))) 4017 (syntax (.str "${BitBase32-" offset "-s11-" group "}[fb]")) 4018 (base-ifield (.sym f- base1 -12)) 4019 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -s11- group))) 4020 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3))) 4021 (getter (get-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s11- group))) 4022 (setter (set-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s11- group) newval)) 4023 ) 4024 (define-derived-operand 4025 (name (.sym bit32- offset -19-FB-relative- group)) 4026 (comment "m32c bit,base:19[fb] relative bit") 4027 (attrs (machine 32)) 4028 (mode BI) 4029 (args ((.sym BitBase32- offset -s19- group))) 4030 (syntax (.str "${BitBase32-" offset "-s19-" group "}[fb]")) 4031 (base-ifield (.sym f- base1 -12)) 4032 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -s19- group))) 4033 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3))) 4034 (getter (get-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s19- group))) 4035 (setter (set-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s19- group) newval)) 4036 ) 4037 (define-derived-operand 4038 (name (.sym bit32- offset -11-An-relative- group)) 4039 (comment "m32c bit,base:11[An] relative bit") 4040 (attrs (machine 32)) 4041 (mode BI) 4042 (args ((.sym BitBase32- offset -u11- group) (.sym Bit32An group))) 4043 (syntax (.str "${BitBase32-" offset "-u11-" group "}[$Bit32An" group "]")) 4044 (base-ifield (.sym f- base1 -12)) 4045 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u11- group) (.sym Bit32An group))) 4046 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0))) 4047 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u11- group))) 4048 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u11- group) newval)) 4049 ) 4050 (define-derived-operand 4051 (name (.sym bit32- offset -19-An-relative- group)) 4052 (comment "m32c bit,base:19[An] relative bit") 4053 (attrs (machine 32)) 4054 (mode BI) 4055 (args ((.sym BitBase32- offset -u19- group) (.sym Bit32An group))) 4056 (syntax (.str "${BitBase32-" offset "-u19-" group "}[$Bit32An" group "]")) 4057 (base-ifield (.sym f- base1 -12)) 4058 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u19- group) (.sym Bit32An group))) 4059 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0))) 4060 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u19- group))) 4061 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u19- group) newval)) 4062 ) 4063 (define-derived-operand 4064 (name (.sym bit32- offset -27-An-relative- group)) 4065 (comment "m32c bit,base:27[An] relative bit") 4066 (attrs (machine 32)) 4067 (mode BI) 4068 (args ((.sym BitBase32- offset -u27- group) (.sym Bit32An group))) 4069 (syntax (.str "${BitBase32-" offset "-u27-" group "}[$Bit32An" group "]")) 4070 (base-ifield (.sym f- base1 -12)) 4071 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u27- group) (.sym Bit32An group))) 4072 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0))) 4073 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u27- group))) 4074 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u27- group) newval)) 4075 ) 4076 ) 4077 ) 4078 4079 (bit32-relative-operand 16 Unprefixed 4 8) 4080 (bit32-relative-operand 24 Prefixed 12 16) 4081 4082 (define-derived-operand 4083 (name bit16-11-SB-relative-S) 4084 (comment "m16c bit,base:11[sb] relative bit") 4085 (attrs (machine 16)) 4086 (mode BI) 4087 (args (BitBase16-8-u11-S)) 4088 (syntax "${BitBase16-8-u11-S}[sb]") 4089 (base-ifield (.sym f-5-3)) 4090 (encoding (+ BitBase16-8-u11-S)) 4091 ; (ifield-assertion (#t)) 4092 (getter (get-memory-bit 16 (reg h-sb) BitBase16-8-u11-S)) 4093 (setter (set-memory-bit 16 (reg h-sb) BitBase16-8-u11-S newval)) 4094 ) 4095 4096 (define-derived-operand 4097 (name Rn16-push-S-derived) 4098 (comment "m16c r0[lh] for push,pop short version") 4099 (attrs (machine 16)) 4100 (mode QI) 4101 (args (Rn16-push-S)) 4102 (syntax "${Rn16-push-S}") 4103 (base-ifield (.sym f-4-1)) 4104 (encoding (+ Rn16-push-S)) 4105 ; (ifield-assertion (#t)) 4106 (getter (trunc QI Rn16-push-S)) 4107 (setter (set Rn16-push-S newval)) 4108 ) 4109 4110 (define-derived-operand 4111 (name An16-push-S-derived) 4112 (comment "m16c r0[lh] for push,pop short version") 4113 (attrs (machine 16)) 4114 (mode HI) 4115 (args (An16-push-S)) 4116 (syntax "${An16-push-S}") 4117 (base-ifield (.sym f-4-1)) 4118 (encoding (+ An16-push-S)) 4119 ; (ifield-assertion (#t)) 4120 (getter (trunc QI An16-push-S)) 4121 (setter (set An16-push-S newval)) 4122 ) 4123 4124 ;------------------------------------------------------------- 4125 ; Absolute address 4126 ;------------------------------------------------------------- 4127 4128 (define-pmacro (bit16-absolute offset) 4129 (begin 4130 (define-derived-operand 4131 (name (.sym bit16- offset -16-absolute)) 4132 (comment "m16c absolute address") 4133 (attrs (machine 16)) 4134 (mode BI) 4135 (args ((.sym BitBase16- offset -u16))) 4136 (syntax (.str "${BitBase16-" offset "-u16}")) 4137 (base-ifield f-12-4) 4138 (encoding (+ (f-12-4 #xF) (.sym BitBase16- offset -u16))) 4139 (ifield-assertion (eq f-12-4 #xF)) 4140 (getter (get-memory-bit 16 0 (.sym BitBase16- offset -u16))) 4141 (setter (set-memory-bit 16 0 (.sym BitBase16- offset -u16) newval)) 4142 ) 4143 ) 4144 ) 4145 4146 (bit16-absolute 16) 4147 4148 (define-pmacro (bit32-absolute offset group base1 base2) 4149 (begin 4150 (define-derived-operand 4151 (name (.sym bit32- offset -19-absolute- group)) 4152 (comment "m32c absolute address bit") 4153 (attrs (machine 32)) 4154 (mode BI) 4155 (args ((.sym BitBase32- offset -u19- group))) 4156 (syntax (.str "${BitBase32-" offset "-u19-" group "}")) 4157 (base-ifield (.sym f- base1 -12)) 4158 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -u19- group))) 4159 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3))) 4160 (getter (get-memory-bit 32 0 (.sym BitBase32- offset -u19- group))) 4161 (setter (set-memory-bit 32 0 (.sym BitBase32- offset -u19- group) newval)) 4162 ) 4163 (define-derived-operand 4164 (name (.sym bit32- offset -27-absolute- group)) 4165 (comment "m32c absolute address bit") 4166 (attrs (machine 32)) 4167 (mode BI) 4168 (args ((.sym BitBase32- offset -u27- group))) 4169 (syntax (.str "${BitBase32-" offset "-u27-" group "}")) 4170 (base-ifield (.sym f- base1 -12)) 4171 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u27- group))) 4172 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2))) 4173 (getter (get-memory-bit 32 0 (.sym BitBase32- offset -u27- group))) 4174 (setter (set-memory-bit 32 0 (.sym BitBase32- offset -u27- group) newval)) 4175 ) 4176 ) 4177 ) 4178 4179 (bit32-absolute 16 Unprefixed 4 8) 4180 (bit32-absolute 24 Prefixed 12 16) 4181 4182 ;------------------------------------------------------------- 4183 ; Destination operands for short fomat insns 4184 ;------------------------------------------------------------- 4185 4186 (define-derived-operand 4187 (name dst16-3-S-R0l-direct-QI) 4188 (comment "m16c R0l direct QI") 4189 (attrs (machine 16)) 4190 (mode QI) 4191 (args (R0l)) 4192 (syntax "r0l") 4193 (base-ifield f-5-3) 4194 (encoding (+ (f-5-3 4))) 4195 (ifield-assertion (eq f-5-3 4)) 4196 (getter (trunc QI R0l)) 4197 (setter (set R0l newval)) 4198 ) 4199 (define-derived-operand 4200 (name dst16-3-S-R0h-direct-QI) 4201 (comment "m16c R0h direct QI") 4202 (attrs (machine 16)) 4203 (mode QI) 4204 (args (R0h)) 4205 (syntax "r0h") 4206 (base-ifield f-5-3) 4207 (encoding (+ (f-5-3 3))) 4208 (ifield-assertion (eq f-5-3 3)) 4209 (getter (trunc QI R0h)) 4210 (setter (set R0h newval)) 4211 ) 4212 (define-derived-operand 4213 (name dst16-3-S-8-8-SB-relative-QI) 4214 (comment "m16c SB relative QI") 4215 (attrs (machine 16)) 4216 (mode QI) 4217 (args (Dsp-8-u8)) 4218 (syntax "${Dsp-8-u8}[sb]") 4219 (base-ifield f-5-3) 4220 (encoding (+ (f-5-3 5) Dsp-8-u8)) 4221 (ifield-assertion (eq f-5-3 5)) 4222 (getter (mem16 QI (add Dsp-8-u8 (reg h-sb)))) 4223 (setter (set (mem16 QI (add Dsp-8-u8 (reg h-sb))) newval)) 4224 ) 4225 (define-derived-operand 4226 (name dst16-3-S-8-8-FB-relative-QI) 4227 (comment "m16c FB relative QI") 4228 (attrs (machine 16)) 4229 (mode QI) 4230 (args (Dsp-8-s8)) 4231 (syntax "${Dsp-8-s8}[fb]") 4232 (base-ifield f-5-3) 4233 (encoding (+ (f-5-3 6) Dsp-8-s8)) 4234 (ifield-assertion (eq f-5-3 6)) 4235 (getter (mem16 QI (add Dsp-8-s8 (reg h-fb)))) 4236 (setter (set (mem16 QI (add Dsp-8-s8 (reg h-fb))) newval)) 4237 ) 4238 (define-derived-operand 4239 (name dst16-3-S-8-16-absolute-QI) 4240 (comment "m16c absolute address QI") 4241 (attrs (machine 16)) 4242 (mode QI) 4243 (args (Dsp-8-u16)) 4244 (syntax "${Dsp-8-u16}") 4245 (base-ifield f-5-3) 4246 (encoding (+ (f-5-3 7) Dsp-8-u16)) 4247 (ifield-assertion (eq f-5-3 7)) 4248 (getter (mem16 QI Dsp-8-u16)) 4249 (setter (set (mem16 QI Dsp-8-u16) newval)) 4250 ) 4251 (define-derived-operand 4252 (name dst16-3-S-16-8-SB-relative-QI) 4253 (comment "m16c SB relative QI") 4254 (attrs (machine 16)) 4255 (mode QI) 4256 (args (Dsp-16-u8)) 4257 (syntax "${Dsp-16-u8}[sb]") 4258 (base-ifield f-5-3) 4259 (encoding (+ (f-5-3 5) Dsp-16-u8)) 4260 (ifield-assertion (eq f-5-3 5)) 4261 (getter (mem16 QI (add Dsp-16-u8 (reg h-sb)))) 4262 (setter (set (mem16 QI (add Dsp-16-u8 (reg h-sb))) newval)) 4263 ) 4264 (define-derived-operand 4265 (name dst16-3-S-16-8-FB-relative-QI) 4266 (comment "m16c FB relative QI") 4267 (attrs (machine 16)) 4268 (mode QI) 4269 (args (Dsp-16-s8)) 4270 (syntax "${Dsp-16-s8}[fb]") 4271 (base-ifield f-5-3) 4272 (encoding (+ (f-5-3 6) Dsp-16-s8)) 4273 (ifield-assertion (eq f-5-3 6)) 4274 (getter (mem16 QI (add Dsp-16-s8 (reg h-fb)))) 4275 (setter (set (mem16 QI (add Dsp-16-s8 (reg h-fb))) newval)) 4276 ) 4277 (define-derived-operand 4278 (name dst16-3-S-16-16-absolute-QI) 4279 (comment "m16c absolute address QI") 4280 (attrs (machine 16)) 4281 (mode QI) 4282 (args (Dsp-16-u16)) 4283 (syntax "${Dsp-16-u16}") 4284 (base-ifield f-5-3) 4285 (encoding (+ (f-5-3 7) Dsp-16-u16)) 4286 (ifield-assertion (eq f-5-3 7)) 4287 (getter (mem16 QI Dsp-16-u16)) 4288 (setter (set (mem16 QI Dsp-16-u16) newval)) 4289 ) 4290 (define-derived-operand 4291 (name srcdst16-r0l-r0h-S-derived) 4292 (comment "m16c r0l/r0h operand for short format insns") 4293 (attrs (machine 16)) 4294 (mode SI) 4295 (args (SrcDst16-r0l-r0h-S-normal)) 4296 (syntax "${SrcDst16-r0l-r0h-S-normal}") 4297 (base-ifield f-6-3) 4298 (encoding (+ (f-6-2 0) SrcDst16-r0l-r0h-S-normal)) 4299 (ifield-assertion (eq f-6-2 0)) 4300 (getter (trunc SI SrcDst16-r0l-r0h-S-normal)) 4301 (setter ()) ; no setter 4302 ) 4303 (define-derived-operand 4304 (name dst32-2-S-R0l-direct-QI) 4305 (comment "m32c R0l direct QI") 4306 (attrs (machine 32)) 4307 (mode QI) 4308 (args (R0l)) 4309 (syntax "r0l") 4310 (base-ifield f-2-2) 4311 (encoding (+ (f-2-2 0))) 4312 (ifield-assertion (eq f-2-2 0)) 4313 (getter (trunc QI R0l)) 4314 (setter (set R0l newval)) 4315 ) 4316 (define-derived-operand 4317 (name dst32-2-S-R0-direct-HI) 4318 (comment "m32c R0 direct HI") 4319 (attrs (machine 32)) 4320 (mode HI) 4321 (args (R0)) 4322 (syntax "r0") 4323 (base-ifield f-2-2) 4324 (encoding (+ (f-2-2 0))) 4325 (ifield-assertion (eq f-2-2 0)) 4326 (getter (trunc HI R0)) 4327 (setter (set R0 newval)) 4328 ) 4329 (define-derived-operand 4330 (name dst32-1-S-A0-direct-HI) 4331 (comment "m32c A0 direct HI") 4332 (attrs (machine 32)) 4333 (mode HI) 4334 (args (A0)) 4335 (syntax "a0") 4336 (base-ifield f-7-1) 4337 (encoding (+ (f-7-1 0))) 4338 (ifield-assertion (eq f-7-1 0)) 4339 (getter (trunc HI A0)) 4340 (setter (set A0 newval)) 4341 ) 4342 (define-derived-operand 4343 (name dst32-1-S-A1-direct-HI) 4344 (comment "m32c A1 direct HI") 4345 (attrs (machine 32)) 4346 (mode HI) 4347 (args (A1)) 4348 (syntax "a1") 4349 (base-ifield f-7-1) 4350 (encoding (+ (f-7-1 1))) 4351 (ifield-assertion (eq f-7-1 1)) 4352 (getter (trunc HI A1)) 4353 (setter (set A1 newval)) 4354 ) 4355 (define-pmacro (dst32-2-S-operands xmode) 4356 (begin 4357 (define-derived-operand 4358 (name (.sym dst32-2-S-8-SB-relative- xmode)) 4359 (comment "m32c SB relative for short binary insns") 4360 (attrs (machine 32)) 4361 (mode xmode) 4362 (args (Dsp-8-u8)) 4363 (syntax "${Dsp-8-u8}[sb]") 4364 (base-ifield f-2-2) 4365 (encoding (+ (f-2-2 2) Dsp-8-u8)) 4366 (ifield-assertion (eq f-2-2 2)) 4367 (getter (c-call xmode (.str "operand_getter_" xmode) sb Dsp-8-u8)) 4368 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb Dsp-8-u8)) 4369 ; (getter (mem32 xmode (add Dsp-8-u8 (reg h-sb)))) 4370 ; (setter (set (mem32 xmode (add Dsp-8-u8 (reg h-sb))) newval)) 4371 ) 4372 (define-derived-operand 4373 (name (.sym dst32-2-S-8-FB-relative- xmode)) 4374 (comment "m32c FB relative for short binary insns") 4375 (attrs (machine 32)) 4376 (mode xmode) 4377 (args (Dsp-8-s8)) 4378 (syntax "${Dsp-8-s8}[fb]") 4379 (base-ifield f-2-2) 4380 (encoding (+ (f-2-2 3) Dsp-8-s8)) 4381 (ifield-assertion (eq f-2-2 3)) 4382 (getter (c-call xmode (.str "operand_getter_" xmode) fb Dsp-8-s8)) 4383 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb Dsp-8-s8)) 4384 ; (getter (mem32 xmode (add Dsp-8-s8 (reg h-fb)))) 4385 ; (setter (set (mem32 xmode (add Dsp-8-s8 (reg h-fb))) newval)) 4386 ) 4387 (define-derived-operand 4388 (name (.sym dst32-2-S-16-absolute- xmode)) 4389 (comment "m32c absolute address for short binary insns") 4390 (attrs (machine 32)) 4391 (mode xmode) 4392 (args (Dsp-8-u16)) 4393 (syntax "${Dsp-8-u16}") 4394 (base-ifield f-2-2) 4395 (encoding (+ (f-2-2 1) Dsp-8-u16)) 4396 (ifield-assertion (eq f-2-2 1)) 4397 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) Dsp-8-u16)) 4398 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) Dsp-8-u16)) 4399 ; (getter (mem32 xmode Dsp-8-u16)) 4400 ; (setter (set (mem32 xmode Dsp-8-u16) newval)) 4401 ) 4402 ; (define-derived-operand 4403 ; (name (.sym dst32-2-S-8-SB-relative-indirect- xmode)) 4404 ; (comment "m32c SB relative for short binary insns") 4405 ; (attrs (machine 32)) 4406 ; (mode xmode) 4407 ; (args (Dsp-16-u8)) 4408 ; (syntax "[${Dsp-16-u8}[sb]]") 4409 ; (base-ifield f-10-2) 4410 ; (encoding (+ (f-10-2 2) Dsp-16-u8)) 4411 ; (ifield-assertion (eq f-10-2 2)) 4412 ; (getter (mem32 xmode (indirect-addr (add Dsp-16-u8 (reg h-sb))))) 4413 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-16-u8 (reg h-sb)))) newval)) 4414 ; ) 4415 ; (define-derived-operand 4416 ; (name (.sym dst32-2-S-8-FB-relative-indirect- xmode)) 4417 ; (comment "m32c FB relative for short binary insns") 4418 ; (attrs (machine 32)) 4419 ; (mode xmode) 4420 ; (args (Dsp-16-s8)) 4421 ; (syntax "[${Dsp-16-s8}[fb]]") 4422 ; (base-ifield f-10-2) 4423 ; (encoding (+ (f-10-2 3) Dsp-16-s8)) 4424 ; (ifield-assertion (eq f-10-2 3)) 4425 ; (getter (mem32 xmode (indirect-addr (add Dsp-16-s8 (reg h-fb))))) 4426 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-16-s8 (reg h-fb)))) newval)) 4427 ; ) 4428 ; (define-derived-operand 4429 ; (name (.sym dst32-2-S-16-absolute-indirect- xmode)) 4430 ; (comment "m32c absolute address for short binary insns") 4431 ; (attrs (machine 32)) 4432 ; (mode xmode) 4433 ; (args (Dsp-16-u16)) 4434 ; (syntax "[${Dsp-16-u16}]") 4435 ; (base-ifield f-10-2) 4436 ; (encoding (+ (f-10-2 1) Dsp-16-u16)) 4437 ; (ifield-assertion (eq f-10-2 1)) 4438 ; (getter (mem32 xmode (indirect-addr Dsp-16-u16))) 4439 ; (setter (set (mem32 xmode (indirect-addr Dsp-16-u16)) newval)) 4440 ; ) 4441 ) 4442 ) 4443 4444 (dst32-2-S-operands QI) 4445 (dst32-2-S-operands HI) 4446 (dst32-2-S-operands SI) 4447 4448 ;============================================================= 4449 ; Anyof operands 4450 ;------------------------------------------------------------- 4451 ; Source operands with no additional fields 4452 ;------------------------------------------------------------- 4453 4454 (define-pmacro (src16-basic-operand xmode) 4455 (begin 4456 (define-anyof-operand 4457 (name (.sym src16-basic- xmode)) 4458 (comment (.str "m16c source operand of size " xmode " with no additional fields")) 4459 (attrs (machine 16)) 4460 (mode xmode) 4461 (choices 4462 (.sym src16-Rn-direct- xmode) 4463 (.sym src16-An-direct- xmode) 4464 (.sym src16-An-indirect- xmode) 4465 ) 4466 ) 4467 ) 4468 ) 4469 (src16-basic-operand QI) 4470 (src16-basic-operand HI) 4471 4472 (define-pmacro (src32-basic-operand xmode) 4473 (begin 4474 (define-anyof-operand 4475 (name (.sym src32-basic-Unprefixed- xmode)) 4476 (comment (.str "m32c destination operand of size " xmode " with no additional fields")) 4477 (attrs (machine 32)) 4478 (mode xmode) 4479 (choices 4480 (.sym src32-Rn-direct-Unprefixed- xmode) 4481 (.sym src32-An-direct-Unprefixed- xmode) 4482 (.sym src32-An-indirect-Unprefixed- xmode) 4483 ) 4484 ) 4485 (define-anyof-operand 4486 (name (.sym src32-basic-Prefixed- xmode)) 4487 (comment (.str "m32c destination operand of size " xmode " with no additional fields")) 4488 (attrs (machine 32)) 4489 (mode xmode) 4490 (choices 4491 (.sym src32-Rn-direct-Prefixed- xmode) 4492 (.sym src32-An-direct-Prefixed- xmode) 4493 (.sym src32-An-indirect-Prefixed- xmode) 4494 ) 4495 ) 4496 ; (define-anyof-operand 4497 ; (name (.sym src32-basic-indirect- xmode)) 4498 ; (comment (.str "m32c destination operand of size " xmode " indirect with no additional fields")) 4499 ; (attrs (machine 32)) 4500 ; (mode xmode) 4501 ; (choices 4502 ; (.sym src32-An-indirect-indirect- xmode) 4503 ; ) 4504 ; ) 4505 ) 4506 ) 4507 4508 (src32-basic-operand QI) 4509 (src32-basic-operand HI) 4510 (src32-basic-operand SI) 4511 4512 (define-anyof-operand 4513 (name src32-basic-ExtPrefixed-QI) 4514 (comment "m32c source operand of size QI with no additional fields") 4515 (attrs (machine 32)) 4516 (mode QI) 4517 (choices 4518 src32-Rn-direct-Prefixed-QI 4519 src32-An-indirect-Prefixed-QI 4520 ) 4521 ) 4522 4523 ;------------------------------------------------------------- 4524 ; Source operands with additional fields at offset 16 bits 4525 ;------------------------------------------------------------- 4526 4527 (define-pmacro (src16-16-operand xmode) 4528 (begin 4529 (define-anyof-operand 4530 (name (.sym src16-16-8- xmode)) 4531 (comment (.str "m16c source operand of size " xmode " with additional 8 bit fields at offset 16")) 4532 (attrs (machine 16)) 4533 (mode xmode) 4534 (choices 4535 (.sym src16-16-8-An-relative- xmode) 4536 (.sym src16-16-8-SB-relative- xmode) 4537 (.sym src16-16-8-FB-relative- xmode) 4538 ) 4539 ) 4540 (define-anyof-operand 4541 (name (.sym src16-16-16- xmode)) 4542 (comment (.str "m16c source operand of size " xmode " with additional 16 bit fields at offset 16")) 4543 (attrs (machine 16)) 4544 (mode xmode) 4545 (choices 4546 (.sym src16-16-16-An-relative- xmode) 4547 (.sym src16-16-16-SB-relative- xmode) 4548 (.sym src16-16-16-absolute- xmode) 4549 ) 4550 ) 4551 ) 4552 ) 4553 (src16-16-operand QI) 4554 (src16-16-operand HI) 4555 4556 (define-pmacro (src32-16-operand xmode) 4557 (begin 4558 (define-anyof-operand 4559 (name (.sym src32-16-8-Unprefixed- xmode)) 4560 (comment (.str "m32c source operand of size " xmode " with additional 8 bit fields at offset 16")) 4561 (attrs (machine 32)) 4562 (mode xmode) 4563 (choices 4564 (.sym src32-16-8-An-relative-Unprefixed- xmode) 4565 (.sym src32-16-8-SB-relative-Unprefixed- xmode) 4566 (.sym src32-16-8-FB-relative-Unprefixed- xmode) 4567 ) 4568 ) 4569 (define-anyof-operand 4570 (name (.sym src32-16-16-Unprefixed- xmode)) 4571 (comment (.str "m32c source operand of size " xmode " with additional 16 bit fields at offset 16")) 4572 (attrs (machine 32)) 4573 (mode xmode) 4574 (choices 4575 (.sym src32-16-16-An-relative-Unprefixed- xmode) 4576 (.sym src32-16-16-SB-relative-Unprefixed- xmode) 4577 (.sym src32-16-16-FB-relative-Unprefixed- xmode) 4578 (.sym src32-16-16-absolute-Unprefixed- xmode) 4579 ) 4580 ) 4581 (define-anyof-operand 4582 (name (.sym src32-16-24-Unprefixed- xmode)) 4583 (comment (.str "m32c source operand of size " xmode " with additional 24 bit fields at offset 16")) 4584 (attrs (machine 32)) 4585 (mode xmode) 4586 (choices 4587 (.sym src32-16-24-An-relative-Unprefixed- xmode) 4588 (.sym src32-16-24-absolute-Unprefixed- xmode) 4589 ) 4590 ) 4591 ) 4592 ) 4593 4594 (src32-16-operand QI) 4595 (src32-16-operand HI) 4596 (src32-16-operand SI) 4597 4598 ;------------------------------------------------------------- 4599 ; Source operands with additional fields at offset 24 bits 4600 ;------------------------------------------------------------- 4601 4602 (define-pmacro (src-24-operand group xmode) 4603 (begin 4604 (define-anyof-operand 4605 (name (.sym src32-24-8- group - xmode)) 4606 (comment (.str "m32c source operand of size " xmode " with additional 8 bit fields at offset 24")) 4607 (attrs (machine 32)) 4608 (mode xmode) 4609 (choices 4610 (.sym src32-24-8-An-relative- group - xmode) 4611 (.sym src32-24-8-SB-relative- group - xmode) 4612 (.sym src32-24-8-FB-relative- group - xmode) 4613 ) 4614 ) 4615 (define-anyof-operand 4616 (name (.sym src32-24-16- group - xmode)) 4617 (comment (.str "m32c source operand of size " xmode " with additional 16 bit fields at offset 16")) 4618 (attrs (machine 32)) 4619 (mode xmode) 4620 (choices 4621 (.sym src32-24-16-An-relative- group - xmode) 4622 (.sym src32-24-16-SB-relative- group - xmode) 4623 (.sym src32-24-16-FB-relative- group - xmode) 4624 (.sym src32-24-16-absolute- group - xmode) 4625 ) 4626 ) 4627 (define-anyof-operand 4628 (name (.sym src32-24-24- group - xmode)) 4629 (comment (.str "m32c source operand of size " xmode " with additional 24 bit fields at offset 16")) 4630 (attrs (machine 32)) 4631 (mode xmode) 4632 (choices 4633 (.sym src32-24-24-An-relative- group - xmode) 4634 (.sym src32-24-24-absolute- group - xmode) 4635 ) 4636 ) 4637 ) 4638 ) 4639 4640 (src-24-operand Prefixed QI) 4641 (src-24-operand Prefixed HI) 4642 (src-24-operand Prefixed SI) 4643 4644 (define-pmacro (src-24-indirect-operand xmode) 4645 (begin 4646 ; (define-anyof-operand 4647 ; (name (.sym src32-24-8-indirect- xmode)) 4648 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 4649 ; (attrs (machine 32)) 4650 ; (mode xmode) 4651 ; (choices 4652 ; (.sym src32-24-8-An-relative-indirect- xmode) 4653 ; (.sym src32-24-8-SB-relative-indirect- xmode) 4654 ; (.sym src32-24-8-FB-relative-indirect- xmode) 4655 ; ) 4656 ; ) 4657 ; (define-anyof-operand 4658 ; (name (.sym src32-24-16-indirect- xmode)) 4659 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 4660 ; (attrs (machine 32)) 4661 ; (mode xmode) 4662 ; (choices 4663 ; (.sym src32-24-16-An-relative-indirect- xmode) 4664 ; (.sym src32-24-16-SB-relative-indirect- xmode) 4665 ; (.sym src32-24-16-FB-relative-indirect- xmode) 4666 ; ) 4667 ; ) 4668 ; (define-anyof-operand 4669 ; (name (.sym src32-24-24-indirect- xmode)) 4670 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 4671 ; (attrs (machine 32)) 4672 ; (mode xmode) 4673 ; (choices 4674 ; (.sym src32-24-24-An-relative-indirect- xmode) 4675 ; ) 4676 ; ) 4677 ; (define-anyof-operand 4678 ; (name (.sym src32-24-16-absolute-indirect- xmode)) 4679 ; (comment (.str "m32c source operand of size " xmode " 16 bit absolute indirect")) 4680 ; (attrs (machine 32)) 4681 ; (mode xmode) 4682 ; (choices 4683 ; (.sym src32-24-16-absolute-indirect-derived- xmode) 4684 ; ) 4685 ; ) 4686 ; (define-anyof-operand 4687 ; (name (.sym src32-24-24-absolute-indirect- xmode)) 4688 ; (comment (.str "m32c source operand of size " xmode " 24 bit absolute indirect")) 4689 ; (attrs (machine 32)) 4690 ; (mode xmode) 4691 ; (choices 4692 ; (.sym src32-24-24-absolute-indirect-derived- xmode) 4693 ; ) 4694 ; ) 4695 ) 4696 ) 4697 4698 ; (src-24-indirect-operand QI) 4699 ; (src-24-indirect-operand HI) 4700 ; (src-24-indirect-operand SI) 4701 4702 ;------------------------------------------------------------- 4703 ; Destination operands with no additional fields 4704 ;------------------------------------------------------------- 4705 4706 (define-pmacro (dst16-basic-operand xmode) 4707 (begin 4708 (define-anyof-operand 4709 (name (.sym dst16-basic- xmode)) 4710 (comment (.str "m16c destination operand of size " xmode " with no additional fields")) 4711 (attrs (machine 16)) 4712 (mode xmode) 4713 (choices 4714 (.sym dst16-Rn-direct- xmode) 4715 (.sym dst16-An-direct- xmode) 4716 (.sym dst16-An-indirect- xmode) 4717 ) 4718 ) 4719 ) 4720 ) 4721 4722 (dst16-basic-operand QI) 4723 (dst16-basic-operand HI) 4724 (dst16-basic-operand SI) 4725 4726 (define-pmacro (dst32-basic-operand xmode) 4727 (begin 4728 (define-anyof-operand 4729 (name (.sym dst32-basic-Unprefixed- xmode)) 4730 (comment (.str "m32c destination operand of size " xmode " with no additional fields")) 4731 (attrs (machine 32)) 4732 (mode xmode) 4733 (choices 4734 (.sym dst32-Rn-direct-Unprefixed- xmode) 4735 (.sym dst32-An-direct-Unprefixed- xmode) 4736 (.sym dst32-An-indirect-Unprefixed- xmode) 4737 ) 4738 ) 4739 (define-anyof-operand 4740 (name (.sym dst32-basic-Prefixed- xmode)) 4741 (comment (.str "m32c destination operand of size " xmode " with no additional fields")) 4742 (attrs (machine 32)) 4743 (mode xmode) 4744 (choices 4745 (.sym dst32-Rn-direct-Prefixed- xmode) 4746 (.sym dst32-An-direct-Prefixed- xmode) 4747 (.sym dst32-An-indirect-Prefixed- xmode) 4748 ) 4749 ) 4750 ) 4751 ) 4752 4753 (dst32-basic-operand QI) 4754 (dst32-basic-operand HI) 4755 (dst32-basic-operand SI) 4756 4757 ;------------------------------------------------------------- 4758 ; Destination operands with possible additional fields at offset 16 bits 4759 ;------------------------------------------------------------- 4760 4761 (define-pmacro (dst16-16-operand xmode) 4762 (begin 4763 (define-anyof-operand 4764 (name (.sym dst16-16- xmode)) 4765 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16")) 4766 (attrs (machine 16)) 4767 (mode xmode) 4768 (choices 4769 (.sym dst16-Rn-direct- xmode) 4770 (.sym dst16-An-direct- xmode) 4771 (.sym dst16-An-indirect- xmode) 4772 (.sym dst16-16-8-An-relative- xmode) 4773 (.sym dst16-16-16-An-relative- xmode) 4774 (.sym dst16-16-8-SB-relative- xmode) 4775 (.sym dst16-16-16-SB-relative- xmode) 4776 (.sym dst16-16-8-FB-relative- xmode) 4777 (.sym dst16-16-16-absolute- xmode) 4778 ) 4779 ) 4780 (define-anyof-operand 4781 (name (.sym dst16-16-8- xmode)) 4782 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16")) 4783 (attrs (machine 16)) 4784 (mode xmode) 4785 (choices 4786 (.sym dst16-16-8-An-relative- xmode) 4787 (.sym dst16-16-8-SB-relative- xmode) 4788 (.sym dst16-16-8-FB-relative- xmode) 4789 ) 4790 ) 4791 (define-anyof-operand 4792 (name (.sym dst16-16-16- xmode)) 4793 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16")) 4794 (attrs (machine 16)) 4795 (mode xmode) 4796 (choices 4797 (.sym dst16-16-16-An-relative- xmode) 4798 (.sym dst16-16-16-SB-relative- xmode) 4799 (.sym dst16-16-16-absolute- xmode) 4800 ) 4801 ) 4802 (define-anyof-operand 4803 (name (.sym dst16-16-16sa- xmode)) 4804 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16")) 4805 (attrs (machine 16)) 4806 (mode xmode) 4807 (choices 4808 (.sym dst16-16-16-SB-relative- xmode) 4809 (.sym dst16-16-16-absolute- xmode) 4810 ) 4811 ) 4812 (define-anyof-operand 4813 (name (.sym dst16-16-20ar- xmode)) 4814 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16")) 4815 (attrs (machine 16)) 4816 (mode xmode) 4817 (choices 4818 (.sym dst16-16-20-An-relative- xmode) 4819 ) 4820 ) 4821 ) 4822 ) 4823 4824 (dst16-16-operand QI) 4825 (dst16-16-operand HI) 4826 (dst16-16-operand SI) 4827 4828 (define-anyof-operand 4829 (name dst16-16-Ext-QI) 4830 (comment "m16c destination operand of size QI for 'ext' insns with additional fields at offset 16") 4831 (attrs (machine 16)) 4832 (mode QI) 4833 (choices 4834 dst16-Rn-direct-Ext-QI 4835 dst16-An-indirect-Ext-QI 4836 dst16-16-8-An-relative-Ext-QI 4837 dst16-16-16-An-relative-Ext-QI 4838 dst16-16-8-SB-relative-Ext-QI 4839 dst16-16-16-SB-relative-Ext-QI 4840 dst16-16-8-FB-relative-Ext-QI 4841 dst16-16-16-absolute-Ext-QI 4842 ) 4843 ) 4844 4845 (define-derived-operand 4846 (name dst16-An-indirect-Mova-HI) 4847 (comment "m16c addressof An indirect destination HI") 4848 (attrs (ISA m16c)) 4849 (mode HI) 4850 (args (Dst16An)) 4851 (syntax "[$Dst16An]") 4852 (base-ifield f-12-4) 4853 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An)) 4854 (ifield-assertion 4855 (andif (eq f-12-2 1) (eq f-14-1 1))) 4856 (getter Dst16An) 4857 (setter (nop)) 4858 ) 4859 4860 (define-derived-operand 4861 (name dst16-16-8-An-relative-Mova-HI) 4862 (comment 4863 "m16c addressof dsp:8[An] relative destination HI") 4864 (attrs (ISA m16c)) 4865 (mode HI) 4866 (args (Dst16An Dsp-16-u8)) 4867 (syntax "${Dsp-16-u8}[$Dst16An]") 4868 (base-ifield f-12-4) 4869 (encoding 4870 (+ (f-12-2 2) (f-14-1 0) Dsp-16-u8 Dst16An)) 4871 (ifield-assertion 4872 (andif (eq f-12-2 2) (eq f-14-1 0))) 4873 (getter (add Dsp-16-u8 Dst16An)) 4874 (setter (nop)) 4875 ) 4876 (define-derived-operand 4877 (name dst16-16-16-An-relative-Mova-HI) 4878 (comment 4879 "m16c addressof dsp:16[An] relative destination HI") 4880 (attrs (ISA m16c)) 4881 (mode HI) 4882 (args (Dst16An Dsp-16-u16)) 4883 (syntax "${Dsp-16-u16}[$Dst16An]") 4884 (base-ifield f-12-4) 4885 (encoding 4886 (+ (f-12-2 3) (f-14-1 0) Dsp-16-u16 Dst16An)) 4887 (ifield-assertion 4888 (andif (eq f-12-2 3) (eq f-14-1 0))) 4889 (getter (add Dsp-16-u16 Dst16An)) 4890 (setter (nop)) 4891 ) 4892 (define-derived-operand 4893 (name dst16-16-8-SB-relative-Mova-HI) 4894 (comment 4895 "m16c addressof dsp:8[sb] relative destination HI") 4896 (attrs (ISA m16c)) 4897 (mode HI) 4898 (args (Dsp-16-u8)) 4899 (syntax "${Dsp-16-u8}[sb]") 4900 (base-ifield f-12-4) 4901 (encoding (+ (f-12-4 10) Dsp-16-u8)) 4902 (ifield-assertion (eq f-12-4 10)) 4903 (getter (add Dsp-16-u8 (reg h-sb))) 4904 (setter (nop)) 4905 ) 4906 (define-derived-operand 4907 (name dst16-16-16-SB-relative-Mova-HI) 4908 (comment 4909 "m16c addressof dsp:16[sb] relative destination HI") 4910 (attrs (ISA m16c)) 4911 (mode HI) 4912 (args (Dsp-16-u16)) 4913 (syntax "${Dsp-16-u16}[sb]") 4914 (base-ifield f-12-4) 4915 (encoding (+ (f-12-4 14) Dsp-16-u16)) 4916 (ifield-assertion (eq f-12-4 14)) 4917 (getter (add Dsp-16-u16 (reg h-sb))) 4918 (setter (nop)) 4919 ) 4920 (define-derived-operand 4921 (name dst16-16-8-FB-relative-Mova-HI) 4922 (comment 4923 "m16c addressof dsp:8[fb] relative destination HI") 4924 (attrs (ISA m16c)) 4925 (mode HI) 4926 (args (Dsp-16-s8)) 4927 (syntax "${Dsp-16-s8}[fb]") 4928 (base-ifield f-12-4) 4929 (encoding (+ (f-12-4 11) Dsp-16-s8)) 4930 (ifield-assertion (eq f-12-4 11)) 4931 (getter (add Dsp-16-s8 (reg h-fb))) 4932 (setter (nop)) 4933 ) 4934 (define-derived-operand 4935 (name dst16-16-16-absolute-Mova-HI) 4936 (comment "m16c addressof absolute address HI") 4937 (attrs (ISA m16c)) 4938 (mode HI) 4939 (args (Dsp-16-u16)) 4940 (syntax "${Dsp-16-u16}") 4941 (base-ifield f-12-4) 4942 (encoding (+ (f-12-4 15) Dsp-16-u16)) 4943 (ifield-assertion (eq f-12-4 15)) 4944 (getter Dsp-16-u16) 4945 (setter (nop)) 4946 ) 4947 4948 (define-anyof-operand 4949 (name dst16-16-Mova-HI) 4950 (comment "m16c addressof destination operand of size HI with additional fields at offset 16") 4951 (attrs (machine 16)) 4952 (mode HI) 4953 (choices 4954 dst16-An-indirect-Mova-HI 4955 dst16-16-8-An-relative-Mova-HI 4956 dst16-16-16-An-relative-Mova-HI 4957 dst16-16-8-SB-relative-Mova-HI 4958 dst16-16-16-SB-relative-Mova-HI 4959 dst16-16-8-FB-relative-Mova-HI 4960 dst16-16-16-absolute-Mova-HI 4961 ) 4962 ) 4963 4964 (define-derived-operand 4965 (name dst32-An-indirect-Unprefixed-Mova-SI) 4966 (comment "m32c addressof An indirect destination SI") 4967 (attrs (ISA m32c)) 4968 (mode SI) 4969 (args (Dst32AnUnprefixed)) 4970 (syntax "[$Dst32AnUnprefixed]") 4971 (base-ifield f-4-6) 4972 (encoding 4973 (+ (f-4-3 0) (f-8-1 0) Dst32AnUnprefixed)) 4974 (ifield-assertion 4975 (andif (eq f-4-3 0) (eq f-8-1 0))) 4976 (getter Dst32AnUnprefixed) 4977 (setter (nop)) 4978 ) 4979 4980 (define-derived-operand 4981 (name dst32-16-8-An-relative-Unprefixed-Mova-SI) 4982 (comment "m32c addressof dsp:8[An] relative destination SI") 4983 (attrs (ISA m32c)) 4984 (mode SI) 4985 (args (Dst32AnUnprefixed Dsp-16-u8)) 4986 (syntax "${Dsp-16-u8}[$Dst32AnUnprefixed]") 4987 (base-ifield f-4-6) 4988 (encoding 4989 (+ (f-4-3 1) 4990 (f-8-1 0) 4991 Dsp-16-u8 4992 Dst32AnUnprefixed)) 4993 (ifield-assertion 4994 (andif (eq f-4-3 1) (eq f-8-1 0))) 4995 (getter (add Dsp-16-u8 Dst32AnUnprefixed)) 4996 (setter (nop)) 4997 ) 4998 4999 (define-derived-operand 5000 (name dst32-16-16-An-relative-Unprefixed-Mova-SI) 5001 (comment 5002 "m32c addressof dsp:16[An] relative destination SI") 5003 (attrs (ISA m32c)) 5004 (mode SI) 5005 (args (Dst32AnUnprefixed Dsp-16-u16)) 5006 (syntax "${Dsp-16-u16}[$Dst32AnUnprefixed]") 5007 (base-ifield f-4-6) 5008 (encoding 5009 (+ (f-4-3 2) 5010 (f-8-1 0) 5011 Dsp-16-u16 5012 Dst32AnUnprefixed)) 5013 (ifield-assertion 5014 (andif (eq f-4-3 2) (eq f-8-1 0))) 5015 (getter (add Dsp-16-u16 Dst32AnUnprefixed)) 5016 (setter (nop)) 5017 ) 5018 5019 (define-derived-operand 5020 (name dst32-16-24-An-relative-Unprefixed-Mova-SI) 5021 (comment "addressof m32c dsp:16[An] relative destination SI") 5022 (attrs (ISA m32c)) 5023 (mode SI) 5024 (args (Dst32AnUnprefixed Dsp-16-u24)) 5025 (syntax "${Dsp-16-u24}[$Dst32AnUnprefixed]") 5026 (base-ifield f-4-6) 5027 (encoding 5028 (+ (f-4-3 3) 5029 (f-8-1 0) 5030 Dsp-16-u24 5031 Dst32AnUnprefixed)) 5032 (ifield-assertion 5033 (andif (eq f-4-3 3) (eq f-8-1 0))) 5034 (getter (add Dsp-16-u24 Dst32AnUnprefixed)) 5035 (setter (nop)) 5036 ) 5037 5038 (define-derived-operand 5039 (name dst32-16-8-SB-relative-Unprefixed-Mova-SI) 5040 (comment "m32c addressof dsp:8[sb] relative destination SI") 5041 (attrs (ISA m32c)) 5042 (mode SI) 5043 (args (Dsp-16-u8)) 5044 (syntax "${Dsp-16-u8}[sb]") 5045 (base-ifield f-4-6) 5046 (encoding (+ (f-4-3 1) (f-8-2 2) Dsp-16-u8)) 5047 (ifield-assertion 5048 (andif (eq f-4-3 1) (eq f-8-2 2))) 5049 (getter (add Dsp-16-u8 (reg h-sb))) 5050 (setter (nop)) 5051 ) 5052 5053 (define-derived-operand 5054 (name dst32-16-16-SB-relative-Unprefixed-Mova-SI) 5055 (comment "m32c addressof dsp:16[sb] relative destination SI") 5056 (attrs (ISA m32c)) 5057 (mode SI) 5058 (args (Dsp-16-u16)) 5059 (syntax "${Dsp-16-u16}[sb]") 5060 (base-ifield f-4-6) 5061 (encoding (+ (f-4-3 2) (f-8-2 2) Dsp-16-u16)) 5062 (ifield-assertion 5063 (andif (eq f-4-3 2) (eq f-8-2 2))) 5064 (getter (add Dsp-16-u16 (reg h-sb))) 5065 (setter (nop)) 5066 ) 5067 5068 (define-derived-operand 5069 (name dst32-16-8-FB-relative-Unprefixed-Mova-SI) 5070 (comment "m32c addressof dsp:8[fb] relative destination SI") 5071 (attrs (ISA m32c)) 5072 (mode SI) 5073 (args (Dsp-16-s8)) 5074 (syntax "${Dsp-16-s8}[fb]") 5075 (base-ifield f-4-6) 5076 (encoding (+ (f-4-3 1) (f-8-2 3) Dsp-16-s8)) 5077 (ifield-assertion 5078 (andif (eq f-4-3 1) (eq f-8-2 3))) 5079 (getter (add Dsp-16-s8 (reg h-fb))) 5080 (setter (nop)) 5081 ) 5082 5083 (define-derived-operand 5084 (name dst32-16-16-FB-relative-Unprefixed-Mova-SI) 5085 (comment "m32c addressof dsp:16[fb] relative destination SI") 5086 (attrs (ISA m32c)) 5087 (mode SI) 5088 (args (Dsp-16-s16)) 5089 (syntax "${Dsp-16-s16}[fb]") 5090 (base-ifield f-4-6) 5091 (encoding (+ (f-4-3 2) (f-8-2 3) Dsp-16-s16)) 5092 (ifield-assertion 5093 (andif (eq f-4-3 2) (eq f-8-2 3))) 5094 (getter (add Dsp-16-s16 (reg h-fb))) 5095 (setter (nop)) 5096 ) 5097 5098 (define-derived-operand 5099 (name dst32-16-16-absolute-Unprefixed-Mova-SI) 5100 (comment "m32c addressof absolute address SI") (attrs (ISA m32c)) 5101 (mode SI) 5102 (args (Dsp-16-u16)) 5103 (syntax "${Dsp-16-u16}") 5104 (base-ifield f-4-6) 5105 (encoding (+ (f-4-3 3) (f-8-2 3) Dsp-16-u16)) 5106 (ifield-assertion 5107 (andif (eq f-4-3 3) (eq f-8-2 3))) 5108 (getter Dsp-16-u16) 5109 (setter (nop)) 5110 ) 5111 5112 (define-derived-operand 5113 (name dst32-16-24-absolute-Unprefixed-Mova-SI) 5114 (comment "m32c addressof absolute address SI") (attrs (ISA m32c)) 5115 (mode SI) 5116 (args (Dsp-16-u24)) 5117 (syntax "${Dsp-16-u24}") 5118 (base-ifield f-4-6) 5119 (encoding (+ (f-4-3 3) (f-8-2 2) Dsp-16-u24)) 5120 (ifield-assertion 5121 (andif (eq f-4-3 3) (eq f-8-2 2))) 5122 (getter Dsp-16-u24) 5123 (setter (nop)) 5124 ) 5125 5126 (define-anyof-operand 5127 (name dst32-16-Unprefixed-Mova-SI) 5128 (comment 5129 "m32c addressof destination operand of size SI with additional fields at offset 16") 5130 (attrs (ISA m32c)) 5131 (mode SI) 5132 (choices 5133 dst32-An-indirect-Unprefixed-Mova-SI 5134 dst32-16-8-An-relative-Unprefixed-Mova-SI 5135 dst32-16-16-An-relative-Unprefixed-Mova-SI 5136 dst32-16-24-An-relative-Unprefixed-Mova-SI 5137 dst32-16-8-SB-relative-Unprefixed-Mova-SI 5138 dst32-16-16-SB-relative-Unprefixed-Mova-SI 5139 dst32-16-8-FB-relative-Unprefixed-Mova-SI 5140 dst32-16-16-FB-relative-Unprefixed-Mova-SI 5141 dst32-16-16-absolute-Unprefixed-Mova-SI 5142 dst32-16-24-absolute-Unprefixed-Mova-SI)) 5143 5144 (define-pmacro (dst32-16-operand xmode) 5145 (begin 5146 (define-anyof-operand 5147 (name (.sym dst32-16-Unprefixed- xmode)) 5148 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16")) 5149 (attrs (machine 32)) 5150 (mode xmode) 5151 (choices 5152 (.sym dst32-Rn-direct-Unprefixed- xmode) 5153 (.sym dst32-An-direct-Unprefixed- xmode) 5154 (.sym dst32-An-indirect-Unprefixed- xmode) 5155 (.sym dst32-16-8-An-relative-Unprefixed- xmode) 5156 (.sym dst32-16-16-An-relative-Unprefixed- xmode) 5157 (.sym dst32-16-24-An-relative-Unprefixed- xmode) 5158 (.sym dst32-16-8-SB-relative-Unprefixed- xmode) 5159 (.sym dst32-16-16-SB-relative-Unprefixed- xmode) 5160 (.sym dst32-16-8-FB-relative-Unprefixed- xmode) 5161 (.sym dst32-16-16-FB-relative-Unprefixed- xmode) 5162 (.sym dst32-16-16-absolute-Unprefixed- xmode) 5163 (.sym dst32-16-24-absolute-Unprefixed- xmode) 5164 ) 5165 ) 5166 (define-anyof-operand 5167 (name (.sym dst32-16-8-Unprefixed- xmode)) 5168 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16")) 5169 (attrs (machine 32)) 5170 (mode xmode) 5171 (choices 5172 (.sym dst32-16-8-An-relative-Unprefixed- xmode) 5173 (.sym dst32-16-8-SB-relative-Unprefixed- xmode) 5174 (.sym dst32-16-8-FB-relative-Unprefixed- xmode) 5175 ) 5176 ) 5177 (define-anyof-operand 5178 (name (.sym dst32-16-16-Unprefixed- xmode)) 5179 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16")) 5180 (attrs (machine 32)) 5181 (mode xmode) 5182 (choices 5183 (.sym dst32-16-16-An-relative-Unprefixed- xmode) 5184 (.sym dst32-16-16-SB-relative-Unprefixed- xmode) 5185 (.sym dst32-16-16-FB-relative-Unprefixed- xmode) 5186 (.sym dst32-16-16-absolute-Unprefixed- xmode) 5187 ) 5188 ) 5189 (define-anyof-operand 5190 (name (.sym dst32-16-16sa-Unprefixed- xmode)) 5191 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16")) 5192 (attrs (machine 32)) 5193 (mode xmode) 5194 (choices 5195 (.sym dst32-16-16-SB-relative-Unprefixed- xmode) 5196 (.sym dst32-16-16-FB-relative-Unprefixed- xmode) 5197 (.sym dst32-16-16-absolute-Unprefixed- xmode) 5198 ) 5199 ) 5200 (define-anyof-operand 5201 (name (.sym dst32-16-24-Unprefixed- xmode)) 5202 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16")) 5203 (attrs (machine 32)) 5204 (mode xmode) 5205 (choices 5206 (.sym dst32-16-24-An-relative-Unprefixed- xmode) 5207 (.sym dst32-16-24-absolute-Unprefixed- xmode) 5208 ) 5209 ) 5210 ) 5211 ) 5212 5213 (dst32-16-operand QI) 5214 (dst32-16-operand HI) 5215 (dst32-16-operand SI) 5216 5217 (define-pmacro (dst32-16-Ext-operand smode dmode) 5218 (begin 5219 (define-anyof-operand 5220 (name (.sym dst32-16-ExtUnprefixed- smode)) 5221 (comment (.str "m32c destination operand of size " smode " with additional fields at offset 16")) 5222 (attrs (machine 32)) 5223 (mode dmode) 5224 (choices 5225 (.sym dst32-Rn-direct-ExtUnprefixed- smode) 5226 (.sym dst32-An-direct-Unprefixed- dmode) ; ExtUnprefixed mode not required for this operand -- use the normal dmode version 5227 (.sym dst32-An-indirect-ExtUnprefixed- smode) 5228 (.sym dst32-16-8-An-relative-ExtUnprefixed- smode) 5229 (.sym dst32-16-16-An-relative-ExtUnprefixed- smode) 5230 (.sym dst32-16-24-An-relative-ExtUnprefixed- smode) 5231 (.sym dst32-16-8-SB-relative-ExtUnprefixed- smode) 5232 (.sym dst32-16-16-SB-relative-ExtUnprefixed- smode) 5233 (.sym dst32-16-8-FB-relative-ExtUnprefixed- smode) 5234 (.sym dst32-16-16-FB-relative-ExtUnprefixed- smode) 5235 (.sym dst32-16-16-absolute-ExtUnprefixed- smode) 5236 (.sym dst32-16-24-absolute-ExtUnprefixed- smode) 5237 ) 5238 ) 5239 ) 5240 ) 5241 5242 (dst32-16-Ext-operand QI HI) 5243 (dst32-16-Ext-operand HI SI) 5244 5245 (define-anyof-operand 5246 (name dst32-16-Unprefixed-Mulex-HI) 5247 (comment "m32c destination operand of size HI with additional fields at offset 16") 5248 (attrs (machine 32)) 5249 (mode HI) 5250 (choices 5251 dst32-R3-direct-Unprefixed-HI 5252 dst32-An-direct-Unprefixed-HI 5253 dst32-An-indirect-Unprefixed-HI 5254 dst32-16-8-An-relative-Unprefixed-HI 5255 dst32-16-16-An-relative-Unprefixed-HI 5256 dst32-16-24-An-relative-Unprefixed-HI 5257 dst32-16-8-SB-relative-Unprefixed-HI 5258 dst32-16-16-SB-relative-Unprefixed-HI 5259 dst32-16-8-FB-relative-Unprefixed-HI 5260 dst32-16-16-FB-relative-Unprefixed-HI 5261 dst32-16-16-absolute-Unprefixed-HI 5262 dst32-16-24-absolute-Unprefixed-HI 5263 ) 5264 ) 5265 ;------------------------------------------------------------- 5266 ; Destination operands with possible additional fields at offset 24 bits 5267 ;------------------------------------------------------------- 5268 5269 (define-pmacro (dst16-24-operand xmode) 5270 (begin 5271 (define-anyof-operand 5272 (name (.sym dst16-24- xmode)) 5273 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 24")) 5274 (attrs (machine 16)) 5275 (mode xmode) 5276 (choices 5277 (.sym dst16-Rn-direct- xmode) 5278 (.sym dst16-An-direct- xmode) 5279 (.sym dst16-An-indirect- xmode) 5280 (.sym dst16-24-8-An-relative- xmode) 5281 (.sym dst16-24-16-An-relative- xmode) 5282 (.sym dst16-24-8-SB-relative- xmode) 5283 (.sym dst16-24-16-SB-relative- xmode) 5284 (.sym dst16-24-8-FB-relative- xmode) 5285 (.sym dst16-24-16-absolute- xmode) 5286 ) 5287 ) 5288 ) 5289 ) 5290 5291 (dst16-24-operand QI) 5292 (dst16-24-operand HI) 5293 5294 (define-pmacro (dst32-24-operand xmode) 5295 (begin 5296 (define-anyof-operand 5297 (name (.sym dst32-24-Unprefixed- xmode)) 5298 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5299 (attrs (machine 32)) 5300 (mode xmode) 5301 (choices 5302 (.sym dst32-Rn-direct-Unprefixed- xmode) 5303 (.sym dst32-An-direct-Unprefixed- xmode) 5304 (.sym dst32-An-indirect-Unprefixed- xmode) 5305 (.sym dst32-24-8-An-relative-Unprefixed- xmode) 5306 (.sym dst32-24-16-An-relative-Unprefixed- xmode) 5307 (.sym dst32-24-24-An-relative-Unprefixed- xmode) 5308 (.sym dst32-24-8-SB-relative-Unprefixed- xmode) 5309 (.sym dst32-24-16-SB-relative-Unprefixed- xmode) 5310 (.sym dst32-24-8-FB-relative-Unprefixed- xmode) 5311 (.sym dst32-24-16-FB-relative-Unprefixed- xmode) 5312 (.sym dst32-24-16-absolute-Unprefixed- xmode) 5313 (.sym dst32-24-24-absolute-Unprefixed- xmode) 5314 ) 5315 ) 5316 (define-anyof-operand 5317 (name (.sym dst32-24-Prefixed- xmode)) 5318 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5319 (attrs (machine 32)) 5320 (mode xmode) 5321 (choices 5322 (.sym dst32-Rn-direct-Prefixed- xmode) 5323 (.sym dst32-An-direct-Prefixed- xmode) 5324 (.sym dst32-An-indirect-Prefixed- xmode) 5325 (.sym dst32-24-8-An-relative-Prefixed- xmode) 5326 (.sym dst32-24-16-An-relative-Prefixed- xmode) 5327 (.sym dst32-24-24-An-relative-Prefixed- xmode) 5328 (.sym dst32-24-8-SB-relative-Prefixed- xmode) 5329 (.sym dst32-24-16-SB-relative-Prefixed- xmode) 5330 (.sym dst32-24-8-FB-relative-Prefixed- xmode) 5331 (.sym dst32-24-16-FB-relative-Prefixed- xmode) 5332 (.sym dst32-24-16-absolute-Prefixed- xmode) 5333 (.sym dst32-24-24-absolute-Prefixed- xmode) 5334 ) 5335 ) 5336 (define-anyof-operand 5337 (name (.sym dst32-24-8-Prefixed- xmode)) 5338 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5339 (attrs (machine 32)) 5340 (mode xmode) 5341 (choices 5342 (.sym dst32-24-8-An-relative-Prefixed- xmode) 5343 (.sym dst32-24-8-SB-relative-Prefixed- xmode) 5344 (.sym dst32-24-8-FB-relative-Prefixed- xmode) 5345 ) 5346 ) 5347 (define-anyof-operand 5348 (name (.sym dst32-24-16-Prefixed- xmode)) 5349 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5350 (attrs (machine 32)) 5351 (mode xmode) 5352 (choices 5353 (.sym dst32-24-16-An-relative-Prefixed- xmode) 5354 (.sym dst32-24-16-SB-relative-Prefixed- xmode) 5355 (.sym dst32-24-16-FB-relative-Prefixed- xmode) 5356 (.sym dst32-24-16-absolute-Prefixed- xmode) 5357 ) 5358 ) 5359 (define-anyof-operand 5360 (name (.sym dst32-24-24-Prefixed- xmode)) 5361 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5362 (attrs (machine 32)) 5363 (mode xmode) 5364 (choices 5365 (.sym dst32-24-24-An-relative-Prefixed- xmode) 5366 (.sym dst32-24-24-absolute-Prefixed- xmode) 5367 ) 5368 ) 5369 ; (define-anyof-operand 5370 ; (name (.sym dst32-24-indirect- xmode)) 5371 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5372 ; (attrs (machine 32)) 5373 ; (mode xmode) 5374 ; (choices 5375 ; (.sym dst32-An-indirect-indirect- xmode) 5376 ; (.sym dst32-24-8-An-relative-indirect- xmode) 5377 ; (.sym dst32-24-16-An-relative-indirect- xmode) 5378 ; (.sym dst32-24-24-An-relative-indirect- xmode) 5379 ; (.sym dst32-24-8-SB-relative-indirect- xmode) 5380 ; (.sym dst32-24-16-SB-relative-indirect- xmode) 5381 ; (.sym dst32-24-8-FB-relative-indirect- xmode) 5382 ; (.sym dst32-24-16-FB-relative-indirect- xmode) 5383 ; ) 5384 ; ) 5385 ; (define-anyof-operand 5386 ; (name (.sym dst32-basic-indirect- xmode)) 5387 ; (comment (.str "m32c destination operand of size " xmode " with no additional fields")) 5388 ; (attrs (machine 32)) 5389 ; (mode xmode) 5390 ; (choices 5391 ; (.sym dst32-An-indirect-indirect- xmode) 5392 ; ) 5393 ; ) 5394 ; (define-anyof-operand 5395 ; (name (.sym dst32-24-8-indirect- xmode)) 5396 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5397 ; (attrs (machine 32)) 5398 ; (mode xmode) 5399 ; (choices 5400 ; (.sym dst32-24-8-An-relative-indirect- xmode) 5401 ; (.sym dst32-24-8-SB-relative-indirect- xmode) 5402 ; (.sym dst32-24-8-FB-relative-indirect- xmode) 5403 ; ) 5404 ; ) 5405 ; (define-anyof-operand 5406 ; (name (.sym dst32-24-16-indirect- xmode)) 5407 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5408 ; (attrs (machine 32)) 5409 ; (mode xmode) 5410 ; (choices 5411 ; (.sym dst32-24-16-An-relative-indirect- xmode) 5412 ; (.sym dst32-24-16-SB-relative-indirect- xmode) 5413 ; (.sym dst32-24-16-FB-relative-indirect- xmode) 5414 ; ) 5415 ; ) 5416 ; (define-anyof-operand 5417 ; (name (.sym dst32-24-24-indirect- xmode)) 5418 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5419 ; (attrs (machine 32)) 5420 ; (mode xmode) 5421 ; (choices 5422 ; (.sym dst32-24-24-An-relative-indirect- xmode) 5423 ; ) 5424 ; ) 5425 ; (define-anyof-operand 5426 ; (name (.sym dst32-24-absolute-indirect- xmode)) 5427 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect")) 5428 ; (attrs (machine 32)) 5429 ; (mode xmode) 5430 ; (choices 5431 ; (.sym dst32-24-16-absolute-indirect-derived- xmode) 5432 ; (.sym dst32-24-24-absolute-indirect-derived- xmode) 5433 ; ) 5434 ; ) 5435 ; (define-anyof-operand 5436 ; (name (.sym dst32-24-16-absolute-indirect- xmode)) 5437 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect")) 5438 ; (attrs (machine 32)) 5439 ; (mode xmode) 5440 ; (choices 5441 ; (.sym dst32-24-16-absolute-indirect-derived- xmode) 5442 ; ) 5443 ; ) 5444 ; (define-anyof-operand 5445 ; (name (.sym dst32-24-24-absolute-indirect- xmode)) 5446 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect")) 5447 ; (attrs (machine 32)) 5448 ; (mode xmode) 5449 ; (choices 5450 ; (.sym dst32-24-24-absolute-indirect-derived- xmode) 5451 ; ) 5452 ; ) 5453 ) 5454 ) 5455 5456 (dst32-24-operand QI) 5457 (dst32-24-operand HI) 5458 (dst32-24-operand SI) 5459 5460 ;------------------------------------------------------------- 5461 ; Destination operands with possible additional fields at offset 32 bits 5462 ;------------------------------------------------------------- 5463 5464 (define-pmacro (dst16-32-operand xmode) 5465 (begin 5466 (define-anyof-operand 5467 (name (.sym dst16-32- xmode)) 5468 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 32")) 5469 (attrs (machine 16)) 5470 (mode xmode) 5471 (choices 5472 (.sym dst16-Rn-direct- xmode) 5473 (.sym dst16-An-direct- xmode) 5474 (.sym dst16-An-indirect- xmode) 5475 (.sym dst16-32-8-An-relative- xmode) 5476 (.sym dst16-32-16-An-relative- xmode) 5477 (.sym dst16-32-8-SB-relative- xmode) 5478 (.sym dst16-32-16-SB-relative- xmode) 5479 (.sym dst16-32-8-FB-relative- xmode) 5480 (.sym dst16-32-16-absolute- xmode) 5481 ) 5482 ) 5483 ) 5484 ) 5485 (dst16-32-operand QI) 5486 (dst16-32-operand HI) 5487 5488 ; This macro actually handles operands at offset 32, 40 and 48 bits 5489 (define-pmacro (dst32-32plus-operand offset xmode) 5490 (begin 5491 (define-anyof-operand 5492 (name (.sym dst32- offset -Unprefixed- xmode)) 5493 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32")) 5494 (attrs (machine 32)) 5495 (mode xmode) 5496 (choices 5497 (.sym dst32-Rn-direct-Unprefixed- xmode) 5498 (.sym dst32-An-direct-Unprefixed- xmode) 5499 (.sym dst32-An-indirect-Unprefixed- xmode) 5500 (.sym dst32- offset -8-An-relative-Unprefixed- xmode) 5501 (.sym dst32- offset -16-An-relative-Unprefixed- xmode) 5502 (.sym dst32- offset -24-An-relative-Unprefixed- xmode) 5503 (.sym dst32- offset -8-SB-relative-Unprefixed- xmode) 5504 (.sym dst32- offset -16-SB-relative-Unprefixed- xmode) 5505 (.sym dst32- offset -8-FB-relative-Unprefixed- xmode) 5506 (.sym dst32- offset -16-FB-relative-Unprefixed- xmode) 5507 (.sym dst32- offset -16-absolute-Unprefixed- xmode) 5508 (.sym dst32- offset -24-absolute-Unprefixed- xmode) 5509 ) 5510 ) 5511 (define-anyof-operand 5512 (name (.sym dst32- offset -Prefixed- xmode)) 5513 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32")) 5514 (attrs (machine 32)) 5515 (mode xmode) 5516 (choices 5517 (.sym dst32-Rn-direct-Prefixed- xmode) 5518 (.sym dst32-An-direct-Prefixed- xmode) 5519 (.sym dst32-An-indirect-Prefixed- xmode) 5520 (.sym dst32- offset -8-An-relative-Prefixed- xmode) 5521 (.sym dst32- offset -16-An-relative-Prefixed- xmode) 5522 (.sym dst32- offset -24-An-relative-Prefixed- xmode) 5523 (.sym dst32- offset -8-SB-relative-Prefixed- xmode) 5524 (.sym dst32- offset -16-SB-relative-Prefixed- xmode) 5525 (.sym dst32- offset -8-FB-relative-Prefixed- xmode) 5526 (.sym dst32- offset -16-FB-relative-Prefixed- xmode) 5527 (.sym dst32- offset -16-absolute-Prefixed- xmode) 5528 (.sym dst32- offset -24-absolute-Prefixed- xmode) 5529 ) 5530 ) 5531 ; (define-anyof-operand 5532 ; (name (.sym dst32- offset -indirect- xmode)) 5533 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32")) 5534 ; (attrs (machine 32)) 5535 ; (mode xmode) 5536 ; (choices 5537 ; (.sym dst32-An-indirect-indirect- xmode) 5538 ; (.sym dst32- offset -8-An-relative-indirect- xmode) 5539 ; (.sym dst32- offset -16-An-relative-indirect- xmode) 5540 ; (.sym dst32- offset -24-An-relative-indirect- xmode) 5541 ; (.sym dst32- offset -8-SB-relative-indirect- xmode) 5542 ; (.sym dst32- offset -16-SB-relative-indirect- xmode) 5543 ; (.sym dst32- offset -8-FB-relative-indirect- xmode) 5544 ; (.sym dst32- offset -16-FB-relative-indirect- xmode) 5545 ; ) 5546 ; ) 5547 ; (define-anyof-operand 5548 ; (name (.sym dst32- offset -absolute-indirect- xmode)) 5549 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect")) 5550 ; (attrs (machine 32)) 5551 ; (mode xmode) 5552 ; (choices 5553 ; (.sym dst32- offset -16-absolute-indirect-derived- xmode) 5554 ; (.sym dst32- offset -24-absolute-indirect-derived- xmode) 5555 ; ) 5556 ; ) 5557 ) 5558 ) 5559 5560 (dst32-32plus-operand 32 QI) 5561 (dst32-32plus-operand 32 HI) 5562 (dst32-32plus-operand 32 SI) 5563 (dst32-32plus-operand 40 QI) 5564 (dst32-32plus-operand 40 HI) 5565 (dst32-32plus-operand 40 SI) 5566 5567 ;------------------------------------------------------------- 5568 ; Destination operands with possible additional fields at offset 48 bits 5569 ;------------------------------------------------------------- 5570 5571 (define-pmacro (dst32-48-operand offset xmode) 5572 (begin 5573 (define-anyof-operand 5574 (name (.sym dst32- offset -Prefixed- xmode)) 5575 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32")) 5576 (attrs (machine 32)) 5577 (mode xmode) 5578 (choices 5579 (.sym dst32-Rn-direct-Prefixed- xmode) 5580 (.sym dst32-An-direct-Prefixed- xmode) 5581 (.sym dst32-An-indirect-Prefixed- xmode) 5582 (.sym dst32- offset -8-An-relative-Prefixed- xmode) 5583 (.sym dst32- offset -16-An-relative-Prefixed- xmode) 5584 (.sym dst32- offset -24-An-relative-Prefixed- xmode) 5585 (.sym dst32- offset -8-SB-relative-Prefixed- xmode) 5586 (.sym dst32- offset -16-SB-relative-Prefixed- xmode) 5587 (.sym dst32- offset -8-FB-relative-Prefixed- xmode) 5588 (.sym dst32- offset -16-FB-relative-Prefixed- xmode) 5589 (.sym dst32- offset -16-absolute-Prefixed- xmode) 5590 (.sym dst32- offset -24-absolute-Prefixed- xmode) 5591 ) 5592 ) 5593 ; (define-anyof-operand 5594 ; (name (.sym dst32- offset -indirect- xmode)) 5595 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32")) 5596 ; (attrs (machine 32)) 5597 ; (mode xmode) 5598 ; (choices 5599 ; (.sym dst32-An-indirect-indirect- xmode) 5600 ; (.sym dst32- offset -8-An-relative-indirect- xmode) 5601 ; (.sym dst32- offset -16-An-relative-indirect- xmode) 5602 ; (.sym dst32- offset -24-An-relative-indirect- xmode) 5603 ; (.sym dst32- offset -8-SB-relative-indirect- xmode) 5604 ; (.sym dst32- offset -16-SB-relative-indirect- xmode) 5605 ; (.sym dst32- offset -8-FB-relative-indirect- xmode) 5606 ; (.sym dst32- offset -16-FB-relative-indirect- xmode) 5607 ; ) 5608 ; ) 5609 ; (define-anyof-operand 5610 ; (name (.sym dst32- offset -absolute-indirect- xmode)) 5611 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect")) 5612 ; (attrs (machine 32)) 5613 ; (mode xmode) 5614 ; (choices 5615 ; (.sym dst32- offset -16-absolute-indirect-derived- xmode) 5616 ; (.sym dst32- offset -24-absolute-indirect-derived- xmode) 5617 ; ) 5618 ; ) 5619 ) 5620 ) 5621 5622 (dst32-48-operand 48 QI) 5623 (dst32-48-operand 48 HI) 5624 (dst32-48-operand 48 SI) 5625 5626 ;------------------------------------------------------------- 5627 ; Bit operands for m16c 5628 ;------------------------------------------------------------- 5629 5630 (define-pmacro (bit16-operand offset) 5631 (begin 5632 (define-anyof-operand 5633 (name (.sym bit16- offset)) 5634 (comment (.str "m16c bit operand with possible additional fields at offset 24")) 5635 (attrs (machine 16)) 5636 (mode BI) 5637 (choices 5638 bit16-Rn-direct 5639 bit16-An-direct 5640 bit16-An-indirect 5641 (.sym bit16- offset -8-An-relative) 5642 (.sym bit16- offset -16-An-relative) 5643 (.sym bit16- offset -8-SB-relative) 5644 (.sym bit16- offset -16-SB-relative) 5645 (.sym bit16- offset -8-FB-relative) 5646 (.sym bit16- offset -16-absolute) 5647 ) 5648 ) 5649 (define-anyof-operand 5650 (name (.sym bit16- offset -basic)) 5651 (comment (.str "m16c bit operand with no additional fields")) 5652 (attrs (machine 16)) 5653 (mode BI) 5654 (choices 5655 bit16-An-indirect 5656 ) 5657 ) 5658 (define-anyof-operand 5659 (name (.sym bit16- offset -8)) 5660 (comment (.str "m16c bit operand with possible additional fields at offset 24")) 5661 (attrs (machine 16)) 5662 (mode BI) 5663 (choices 5664 bit16-Rn-direct 5665 bit16-An-direct 5666 (.sym bit16- offset -8-An-relative) 5667 (.sym bit16- offset -8-SB-relative) 5668 (.sym bit16- offset -8-FB-relative) 5669 ) 5670 ) 5671 (define-anyof-operand 5672 (name (.sym bit16- offset -16)) 5673 (comment (.str "m16c bit operand with possible additional fields at offset 24")) 5674 (attrs (machine 16)) 5675 (mode BI) 5676 (choices 5677 (.sym bit16- offset -16-An-relative) 5678 (.sym bit16- offset -16-SB-relative) 5679 (.sym bit16- offset -16-absolute) 5680 ) 5681 ) 5682 ) 5683 ) 5684 5685 (bit16-operand 16) 5686 5687 ;------------------------------------------------------------- 5688 ; Bit operands for m32c 5689 ;------------------------------------------------------------- 5690 5691 (define-pmacro (bit32-operand offset group) 5692 (begin 5693 (define-anyof-operand 5694 (name (.sym bit32- offset - group)) 5695 (comment (.str "m32c bit operand with possible additional fields at offset 24")) 5696 (attrs (machine 32)) 5697 (mode BI) 5698 (choices 5699 (.sym bit32-Rn-direct- group) 5700 (.sym bit32-An-direct- group) 5701 (.sym bit32-An-indirect- group) 5702 (.sym bit32- offset -11-An-relative- group) 5703 (.sym bit32- offset -19-An-relative- group) 5704 (.sym bit32- offset -27-An-relative- group) 5705 (.sym bit32- offset -11-SB-relative- group) 5706 (.sym bit32- offset -19-SB-relative- group) 5707 (.sym bit32- offset -11-FB-relative- group) 5708 (.sym bit32- offset -19-FB-relative- group) 5709 (.sym bit32- offset -19-absolute- group) 5710 (.sym bit32- offset -27-absolute- group) 5711 ) 5712 ) 5713 ) 5714 ) 5715 5716 (bit32-operand 16 Unprefixed) 5717 (bit32-operand 24 Prefixed) 5718 5719 (define-anyof-operand 5720 (name bit32-basic-Unprefixed) 5721 (comment "m32c bit operand with no additional fields") 5722 (attrs (machine 32)) 5723 (mode BI) 5724 (choices 5725 bit32-Rn-direct-Unprefixed 5726 bit32-An-direct-Unprefixed 5727 bit32-An-indirect-Unprefixed 5728 ) 5729 ) 5730 5731 (define-anyof-operand 5732 (name bit32-16-8-Unprefixed) 5733 (comment "m32c bit operand with 8 bit additional fields") 5734 (attrs (machine 32)) 5735 (mode BI) 5736 (choices 5737 bit32-16-11-An-relative-Unprefixed 5738 bit32-16-11-SB-relative-Unprefixed 5739 bit32-16-11-FB-relative-Unprefixed 5740 ) 5741 ) 5742 5743 (define-anyof-operand 5744 (name bit32-16-16-Unprefixed) 5745 (comment "m32c bit operand with 16 bit additional fields") 5746 (attrs (machine 32)) 5747 (mode BI) 5748 (choices 5749 bit32-16-19-An-relative-Unprefixed 5750 bit32-16-19-SB-relative-Unprefixed 5751 bit32-16-19-FB-relative-Unprefixed 5752 bit32-16-19-absolute-Unprefixed 5753 ) 5754 ) 5755 5756 (define-anyof-operand 5757 (name bit32-16-24-Unprefixed) 5758 (comment "m32c bit operand with 24 bit additional fields") 5759 (attrs (machine 32)) 5760 (mode BI) 5761 (choices 5762 bit32-16-27-An-relative-Unprefixed 5763 bit32-16-27-absolute-Unprefixed 5764 ) 5765 ) 5766 5767 ;------------------------------------------------------------- 5768 ; Operands for short format binary insns 5769 ;------------------------------------------------------------- 5770 5771 (define-anyof-operand 5772 (name src16-2-S) 5773 (comment "m16c source operand of size QI for short format insns") 5774 (attrs (machine 16)) 5775 (mode QI) 5776 (choices 5777 src16-2-S-8-SB-relative-QI 5778 src16-2-S-8-FB-relative-QI 5779 src16-2-S-16-absolute-QI 5780 ) 5781 ) 5782 5783 (define-anyof-operand 5784 (name src32-2-S-QI) 5785 (comment "m32c source operand of size QI for short format insns") 5786 (attrs (machine 32)) 5787 (mode QI) 5788 (choices 5789 src32-2-S-8-SB-relative-QI 5790 src32-2-S-8-FB-relative-QI 5791 src32-2-S-16-absolute-QI 5792 ) 5793 ) 5794 5795 (define-anyof-operand 5796 (name src32-2-S-HI) 5797 (comment "m32c source operand of size QI for short format insns") 5798 (attrs (machine 32)) 5799 (mode HI) 5800 (choices 5801 src32-2-S-8-SB-relative-HI 5802 src32-2-S-8-FB-relative-HI 5803 src32-2-S-16-absolute-HI 5804 ) 5805 ) 5806 5807 (define-anyof-operand 5808 (name Dst16-3-S-8) 5809 (comment "m16c destination operand of size QI for short format insns") 5810 (attrs (machine 16)) 5811 (mode QI) 5812 (choices 5813 dst16-3-S-R0l-direct-QI 5814 dst16-3-S-R0h-direct-QI 5815 dst16-3-S-8-8-SB-relative-QI 5816 dst16-3-S-8-8-FB-relative-QI 5817 dst16-3-S-8-16-absolute-QI 5818 ) 5819 ) 5820 5821 (define-anyof-operand 5822 (name Dst16-3-S-16) 5823 (comment "m16c destination operand of size QI for short format insns") 5824 (attrs (machine 16)) 5825 (mode QI) 5826 (choices 5827 dst16-3-S-R0l-direct-QI 5828 dst16-3-S-R0h-direct-QI 5829 dst16-3-S-16-8-SB-relative-QI 5830 dst16-3-S-16-8-FB-relative-QI 5831 dst16-3-S-16-16-absolute-QI 5832 ) 5833 ) 5834 5835 (define-anyof-operand 5836 (name srcdst16-r0l-r0h-S) 5837 (comment "m16c r0l/r0h operand of size QI for short format insns") 5838 (attrs (machine 16)) 5839 (mode SI) 5840 (choices 5841 srcdst16-r0l-r0h-S-derived 5842 ) 5843 ) 5844 5845 (define-anyof-operand 5846 (name dst32-2-S-basic-QI) 5847 (comment "m32c r0l operand of size QI for short format binary insns") 5848 (attrs (machine 32)) 5849 (mode QI) 5850 (choices 5851 dst32-2-S-R0l-direct-QI 5852 ) 5853 ) 5854 5855 (define-anyof-operand 5856 (name dst32-2-S-basic-HI) 5857 (comment "m32c r0 operand of size HI for short format binary insns") 5858 (attrs (machine 32)) 5859 (mode HI) 5860 (choices 5861 dst32-2-S-R0-direct-HI 5862 ) 5863 ) 5864 5865 (define-pmacro (dst32-2-S-operands xmode) 5866 (begin 5867 (define-anyof-operand 5868 (name (.sym dst32-2-S-8- xmode)) 5869 (comment "m32c operand of size " xmode " for short format binary insns") 5870 (attrs (machine 32)) 5871 (mode xmode) 5872 (choices 5873 (.sym dst32-2-S-8-SB-relative- xmode) 5874 (.sym dst32-2-S-8-FB-relative- xmode) 5875 ) 5876 ) 5877 (define-anyof-operand 5878 (name (.sym dst32-2-S-16- xmode)) 5879 (comment "m32c operand of size " xmode " for short format binary insns") 5880 (attrs (machine 32)) 5881 (mode xmode) 5882 (choices 5883 (.sym dst32-2-S-16-absolute- xmode) 5884 ) 5885 ) 5886 ; (define-anyof-operand 5887 ; (name (.sym dst32-2-S-8-indirect- xmode)) 5888 ; (comment "m32c operand of size " xmode " for short format binary insns") 5889 ; (attrs (machine 32)) 5890 ; (mode xmode) 5891 ; (choices 5892 ; (.sym dst32-2-S-8-SB-relative-indirect- xmode) 5893 ; (.sym dst32-2-S-8-FB-relative-indirect- xmode) 5894 ; ) 5895 ; ) 5896 ; (define-anyof-operand 5897 ; (name (.sym dst32-2-S-absolute-indirect- xmode)) 5898 ; (comment "m32c operand of size " xmode " for short format binary insns") 5899 ; (attrs (machine 32)) 5900 ; (mode xmode) 5901 ; (choices 5902 ; (.sym dst32-2-S-16-absolute-indirect- xmode) 5903 ; ) 5904 ; ) 5905 ) 5906 ) 5907 5908 (dst32-2-S-operands QI) 5909 (dst32-2-S-operands HI) 5910 (dst32-2-S-operands SI) 5911 5912 (define-anyof-operand 5913 (name dst32-an-S) 5914 (comment "m32c An operand for short format binary insns") 5915 (attrs (machine 32)) 5916 (mode HI) 5917 (choices 5918 dst32-1-S-A0-direct-HI 5919 dst32-1-S-A1-direct-HI 5920 ) 5921 ) 5922 5923 (define-anyof-operand 5924 (name bit16-11-S) 5925 (comment "m16c bit operand for short format insns") 5926 (attrs (machine 16)) 5927 (mode BI) 5928 (choices 5929 bit16-11-SB-relative-S 5930 ) 5931 ) 5932 5933 (define-anyof-operand 5934 (name Rn16-push-S-anyof) 5935 (comment "m16c bit operand for short format insns") 5936 (attrs (machine 16)) 5937 (mode QI) 5938 (choices 5939 Rn16-push-S-derived 5940 ) 5941 ) 5942 5943 (define-anyof-operand 5944 (name An16-push-S-anyof) 5945 (comment "m16c bit operand for short format insns") 5946 (attrs (machine 16)) 5947 (mode HI) 5948 (choices 5949 An16-push-S-derived 5950 ) 5951 ) 5952 5953 ;============================================================= 5954 ; Common macros for instruction definitions 5955 ; 5956 (define-pmacro (set-z x) 5957 (sequence () 5958 (set zbit (zflag x))) 5959 5960 ) 5961 5962 (define-pmacro (set-s x) 5963 (sequence () 5964 (set sbit (nflag x))) 5965 ) 5966 5967 (define-pmacro (set-z-and-s x) 5968 (sequence () 5969 (set-z x) 5970 (set-s x)) 5971 ) 5972 5974 ;============================================================= 5975 ; Unary insn macros 5976 ;------------------------------------------------------------- 5977 5978 (define-pmacro (unary-insn-defn-g mach group mode wstr op encoding sem opg) 5979 (dni (.sym op mach wstr - group) 5980 (.str op wstr opg " dst" mach "-" group "-" mode) 5981 ((machine mach) RL_1ADDR) 5982 (.str op wstr opg " ${dst" mach "-" group "-" mode "}") 5983 encoding 5984 (sem mode (.sym dst mach - group - mode)) 5985 ()) 5986 ) 5987 5988 (define-pmacro (unary-insn-defn mach group mode wstr op encoding sem) 5989 (unary-insn-defn-g mach group mode wstr op encoding sem "") 5990 ) 5991 5992 5993 (define-pmacro (unary16-defn-g mode wstr wbit op opc1 opc2 opc3 sem opg) 5994 (unary-insn-defn-g 16 16 mode wstr op 5995 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16- mode)) 5996 sem opg) 5997 ) 5998 (define-pmacro (unary16-defn mode wstr wbit op opc1 opc2 opc3 sem) 5999 (unary-16-defn-g mode wstr wbit op opc1 opc2 opc3 sem "") 6000 ) 6001 6002 (define-pmacro (unary32-defn-g mode wstr wbit op opc1 opc2 opc3 sem opg) 6003 (begin 6004 ; Multi insns are tried for assembly in the reverse order in which they appear here, so 6005 ; define the absolute-indirect insns first in order to prevent them from being selected 6006 ; when the mode is register-indirect 6007 ; (unary-insn-defn 32 24-absolute-indirect mode wstr op 6008 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) (f-20-4 opc3)) 6009 ; sem) 6010 (unary-insn-defn-g 32 16-Unprefixed mode wstr op 6011 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3)) 6012 sem opg) 6013 ; (unary-insn-defn 32 24-indirect mode wstr op 6014 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-indirect- mode) (f-18-2 opc2) (f-20-4 opc3)) 6015 ; sem) 6016 ) 6017 ) 6018 (define-pmacro (unary32-defn mode wstr wbit op opc1 opc2 opc3 sem) 6019 (unary32-defn-g mode wstr wbit op opc1 opc2 opc3 sem "") 6020 ) 6021 6022 (define-pmacro (unary-insn-mach-g mach op opc1 opc2 opc3 sem opg) 6023 (begin 6024 (.apply (.sym unary mach -defn-g) (QI .b 0 op opc1 opc2 opc3 sem opg)) 6025 (.apply (.sym unary mach -defn-g) (HI .w 1 op opc1 opc2 opc3 sem opg)) 6026 ) 6027 ) 6028 (define-pmacro (unary-insn-mach mach op opc1 opc2 opc3 sem) 6029 (unary-insn-mach-g mach op opc1 opc2 opc3 sem "") 6030 ) 6031 6032 (define-pmacro (unary-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 6033 (begin 6034 (unary-insn-mach-g 16 op opc16-1 opc16-2 opc16-3 sem "") 6035 (unary-insn-mach-g 32 op opc32-1 opc32-2 opc32-3 sem "") 6036 ) 6037 ) 6038 6039 (define-pmacro (unary-insn-g op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 6040 (begin 6041 (unary-insn-mach-g 16 op opc16-1 opc16-2 opc16-3 sem "$G") 6042 (unary-insn-mach-g 32 op opc32-1 opc32-2 opc32-3 sem "$G") 6043 ) 6044 ) 6045 6046 ;------------------------------------------------------------- 6047 ; Sign/zero extension macros 6048 ;------------------------------------------------------------- 6049 6050 (define-pmacro (ext-insn-defn mach group smode dmode wstr op encoding sem) 6051 (dni (.sym op mach wstr - group) 6052 (.str op wstr " dst" mach "-" group "-" smode) 6053 ((machine mach)) 6054 (.str op wstr " ${dst" mach "-" group "-" smode "}") 6055 encoding 6056 (sem smode dmode (.sym dst mach - group - smode) (.sym dst mach - group - smode)) 6057 ()) 6058 ) 6059 6060 (define-pmacro (ext16-defn smode dmode wstr wbit op opc1 opc2 opc3 sem) 6061 (ext-insn-defn 16 16-Ext smode dmode wstr op 6062 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-Ext- smode)) 6063 sem) 6064 ) 6065 6066 (define-pmacro (ext32-defn smode dmode wstr wbit op opc1 opc2 opc3 sem) 6067 (ext-insn-defn 32 16-ExtUnprefixed smode dmode wstr op 6068 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst32-16-ExtUnprefixed- smode)) 6069 sem) 6070 ) 6071 6072 (define-pmacro (ext32-binary-insn src-group dst-group op wstr encoding sem) 6073 (dni (.sym op 32 wstr - src-group - dst-group) 6074 (.str op 32 wstr " src32-" src-group "-QI,dst32-" dst-group "-HI") 6075 ((machine 32)) 6076 (.str op wstr " ${src32-" src-group "-QI},${dst32-" dst-group "-HI}") 6077 encoding 6078 (sem QI HI (.sym src32- src-group -QI) (.sym dst32 - dst-group -HI)) 6079 ()) 6080 ) 6081 6082 (define-pmacro (ext32-binary-defn op wstr opc1 opc2 sem) 6083 (begin 6084 (ext32-binary-insn basic-ExtPrefixed 24-Prefixed op wstr 6085 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-basic-ExtPrefixed-QI dst32-24-Prefixed-HI (f-20-4 opc2)) 6086 sem) 6087 (ext32-binary-insn 24-24-Prefixed 48-Prefixed op wstr 6088 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-24-Prefixed-QI dst32-48-Prefixed-HI (f-20-4 opc2)) 6089 sem) 6090 (ext32-binary-insn 24-16-Prefixed 40-Prefixed op wstr 6091 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-16-Prefixed-QI dst32-40-Prefixed-HI (f-20-4 opc2)) 6092 sem) 6093 (ext32-binary-insn 24-8-Prefixed 32-Prefixed op wstr 6094 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-8-Prefixed-QI dst32-32-Prefixed-HI (f-20-4 opc2)) 6095 sem) 6096 ) 6097 ) 6098 6099 ;============================================================= 6100 ; Binary Arithmetic macros 6101 ; 6102 ;------------------------------------------------------------- 6103 ;<arith>.size:S src2,r0[l] -- for m32c 6104 ;------------------------------------------------------------- 6105 6106 (define-pmacro (binary-arith32-S-src2 op xmode wstr wbit opc1 opc2 sem) 6107 (dni (.sym op 32 wstr .S-src2-r0- xmode) 6108 (.str op 32 wstr ":S src2,r0[l]") 6109 ((machine 32)) 6110 (.str op wstr"$S ${src32-2-S-" xmode "},${Dst32R0" xmode "-S}") 6111 (+ opc1 opc2 (.sym src32-2-S- xmode) (f-7-1 wbit)) 6112 (sem xmode (.sym src32-2-S- xmode) (.sym Dst32R0 xmode -S)) 6113 ()) 6114 ) 6115 6116 ;------------------------------------------------------------- 6117 ;<arith>.b:S src2,r0l/r0h -- for m16c 6118 ;------------------------------------------------------------- 6119 6120 (define-pmacro (binary-arith16-b-S-src2 op opc1 opc2 sem) 6121 (begin 6122 (dni (.sym op 16 .b.S-src2) 6123 (.str op ".b:S src2,r0[lh]") 6124 ((machine 16)) 6125 (.str op ".b$S ${src16-2-S},${Dst16RnQI-S}") 6126 (+ opc1 opc2 Dst16RnQI-S src16-2-S) 6127 (sem QI src16-2-S Dst16RnQI-S) 6128 ()) 6129 (dni (.sym op 16 .b.S-r0l-r0h) 6130 (.str op ".b:S r0l/r0h") 6131 ((machine 16)) 6132 (.str op ".b$S ${srcdst16-r0l-r0h-S}") 6133 (+ opc1 opc2 srcdst16-r0l-r0h-S) 6134 (if (eq srcdst16-r0l-r0h-S 0) 6135 (sem QI R0h R0l) 6136 (sem QI R0l R0h)) 6137 ()) 6138 ) 6139 ) 6140 6141 ;------------------------------------------------------------- 6142 ;<arith>.b:S #imm8,dst3 -- for m16c 6143 ;------------------------------------------------------------- 6144 6145 (define-pmacro (binary-arith16-b-S-imm8-dst3 op sz opc1 opc2 sem) 6146 (dni (.sym op 16 .b.S-imm8-dst3) 6147 (.str op sz ":S imm8,dst3") 6148 ((machine 16)) 6149 (.str op sz "$S #${Imm-8-QI},${Dst16-3-S-16}") 6150 (+ opc1 opc2 Dst16-3-S-16 Imm-8-QI) 6151 (sem QI Imm-8-QI Dst16-3-S-16) 6152 ()) 6153 ) 6154 6155 ;------------------------------------------------------------- 6156 ;<arith>.size:Q #imm4,sp -- for m16c 6157 ;------------------------------------------------------------- 6158 6159 (define-pmacro (binary-arith16-Q-sp op opc1 opc2 opc3 sem) 6160 (dni (.sym op 16 -wQ-sp) 6161 (.str op ".w:q #imm4,sp") 6162 ((machine 16)) 6163 (.str op ".w$Q #${Imm-12-s4},sp") 6164 (+ opc1 opc2 opc3 Imm-12-s4) 6165 (sem QI Imm-12-s4 sp) 6166 ()) 6167 ) 6168 6169 ;------------------------------------------------------------- 6170 ;<arith>.size:G #imm,sp -- for m16c 6171 ;------------------------------------------------------------- 6172 6173 (define-pmacro (binary-arith16-G-sp-defn mode wstr wbit op opc1 opc2 opc3 opc4 sem) 6174 (dni (.sym op 16 wstr - G-sp) 6175 (.str op wstr " imm-sp " mode) 6176 ((machine 16)) 6177 (.str op wstr "$G #${Imm-16-" mode "},sp") 6178 (+ opc1 opc2 (f-7-1 wbit) opc3 opc4 (.sym Imm-16- mode)) 6179 (sem mode (.sym Imm-16- mode) sp) 6180 ()) 6181 ) 6182 6183 (define-pmacro (binary-arith16-G-sp op opc1 opc2 opc3 opc4 sem) 6184 (begin 6185 (binary-arith16-G-sp-defn QI .b 0 op opc1 opc2 opc3 opc4 sem) 6186 (binary-arith16-G-sp-defn HI .w 1 op opc1 opc2 opc3 opc4 sem) 6187 ) 6188 ) 6189 6190 ;------------------------------------------------------------- 6191 ;<arith>.size:G #imm,dst -- for m16c and m32c 6192 ;------------------------------------------------------------- 6193 6194 (define-pmacro (binary-arith-imm-dst-defn mach src dstgroup dmode wstr op suffix encoding sem) 6195 (dni (.sym op mach wstr - imm-G - dstgroup) 6196 (.str op wstr " " mach "-imm-G-" dstgroup "-" dmode) 6197 ((machine mach) RL_1ADDR) 6198 (.str op wstr "$"suffix " #${" src "},${dst" mach "-" dstgroup "-" dmode "}") 6199 encoding 6200 (sem dmode src (.sym dst mach - dstgroup - dmode)) 6201 ()) 6202 ) 6203 6204 ; m16c variants 6205 (define-pmacro (binary-arith16-imm-dst-defn smode dmode wstr wbit op suffix opc1 opc2 opc3 sem) 6206 (begin 6207 (binary-arith-imm-dst-defn 16 (.sym Imm-32- smode) 16-16 dmode wstr op suffix 6208 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- dmode) (.sym Imm-32- smode)) 6209 sem) 6210 (binary-arith-imm-dst-defn 16 (.sym Imm-24- smode) 16-8 dmode wstr op suffix 6211 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- dmode) (.sym Imm-24- smode)) 6212 sem) 6213 (binary-arith-imm-dst-defn 16 (.sym Imm-16- smode) basic dmode wstr op suffix 6214 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- dmode) (.sym Imm-16- smode)) 6215 sem) 6216 ) 6217 ) 6218 6219 ; m32c Unprefixed variants 6220 (define-pmacro (binary-arith32-imm-dst-Unprefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem) 6221 (begin 6222 (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 16-24-Unprefixed dmode wstr op suffix 6223 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-24-Unprefixed- dmode) (.sym Imm-40- smode)) 6224 sem) 6225 (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 16-16-Unprefixed dmode wstr op suffix 6226 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-16-Unprefixed- dmode) (.sym Imm-32- smode)) 6227 sem) 6228 (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) 16-8-Unprefixed dmode wstr op suffix 6229 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-8-Unprefixed- dmode) (.sym Imm-24- smode)) 6230 sem) 6231 (binary-arith-imm-dst-defn 32 (.sym Imm-16- smode) basic-Unprefixed dmode wstr op suffix 6232 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-basic-Unprefixed- dmode) (.sym Imm-16- smode)) 6233 sem) 6234 ) 6235 ) 6236 6237 ; m32c Prefixed variants 6238 (define-pmacro (binary-arith32-imm-dst-Prefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem) 6239 (begin 6240 (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-Prefixed dmode wstr op suffix 6241 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-Prefixed- dmode) (.sym Imm-48- smode)) 6242 sem) 6243 (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-Prefixed dmode wstr op suffix 6244 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-Prefixed- dmode) (.sym Imm-40- smode)) 6245 sem) 6246 (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 24-8-Prefixed dmode wstr op suffix 6247 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-8-Prefixed- dmode) (.sym Imm-32- smode)) 6248 sem) 6249 (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) basic-Prefixed dmode wstr op suffix 6250 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-basic-Prefixed- dmode) (.sym Imm-24- smode)) 6251 sem) 6252 ) 6253 ) 6254 6255 ; All m32c variants 6256 (define-pmacro (binary-arith32-imm-dst-defn smode dmode wstr wbit op suffix opc1 opc2 opc3 sem) 6257 (begin 6258 ; Multi insns are tried for assembly in the reverse order in which they appear here, so 6259 ; define the absolute-indirect insns first in order to prevent them from being selected 6260 ; when the mode is register-indirect 6261 ; (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-absolute-indirect dmode wstr op suffix 6262 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-absolute-indirect- dmode) (.sym Imm-48- smode)) 6263 ; sem) 6264 ; (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-absolute-indirect dmode wstr op suffix 6265 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-absolute-indirect- dmode) (.sym Imm-40- smode)) 6266 ; sem) 6267 ; Unprefixed modes next 6268 (binary-arith32-imm-dst-Unprefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem) 6269 6270 ; Remaining indirect modes 6271 ; (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) basic-indirect dmode wstr op suffix 6272 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-basic-indirect- dmode) (.sym Imm-24- smode)) 6273 ; sem) 6274 ; (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-indirect dmode wstr op suffix 6275 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-indirect- dmode) (.sym Imm-48- smode)) 6276 ; sem) 6277 ; (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-indirect dmode wstr op suffix 6278 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-indirect- dmode) (.sym Imm-40- smode)) 6279 ; sem) 6280 ; (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 24-8-indirect dmode wstr op suffix 6281 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-8-indirect- dmode) (.sym Imm-32- smode)) 6282 ; sem) 6283 ) 6284 ) 6285 6286 (define-pmacro (binary-arith-imm-dst-mach mach op suffix opc1 opc2 opc3 sem) 6287 (begin 6288 (.apply (.sym binary-arith mach -imm-dst-defn) (QI QI .b 0 op suffix opc1 opc2 opc3 sem)) 6289 (.apply (.sym binary-arith mach -imm-dst-defn) (HI HI .w 1 op suffix opc1 opc2 opc3 sem)) 6290 ) 6291 ) 6292 6293 (define-pmacro (binary-arith-imm-dst op suffix opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 6294 (begin 6295 (binary-arith-imm-dst-mach 16 op suffix opc16-1 opc16-2 opc16-3 sem) 6296 (binary-arith-imm-dst-mach 32 op suffix opc32-1 opc32-2 opc32-3 sem) 6297 ) 6298 ) 6299 6300 ;------------------------------------------------------------- 6301 ;<arith>.size:Q #imm4,dst -- for m16c and m32c 6302 ;------------------------------------------------------------- 6303 6304 (define-pmacro (binary-arith-imm4-dst-defn mach src dstgroup mode wstr op encoding sem) 6305 (dni (.sym op mach wstr - imm4-Q - dstgroup) 6306 (.str op wstr " " mach "-imm4-Q-" dstgroup "-" mode) 6307 ((machine mach) RL_1ADDR) 6308 (.str op wstr "$Q #${" src "},${dst" mach "-" dstgroup "-" mode "}") 6309 encoding 6310 (sem mode src (.sym dst mach - dstgroup - mode)) 6311 ()) 6312 ) 6313 6314 ; m16c variants 6315 (define-pmacro (binary-arith16-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem) 6316 (binary-arith-imm4-dst-defn 16 Imm-8-s4 16 mode wstr op 6317 (+ opc1 opc2 (f-7-1 wbit2) Imm-8-s4 (.sym dst16-16- mode)) 6318 sem) 6319 ) 6320 6321 (define-pmacro (binary-arith16-shimm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem) 6322 (binary-arith-imm4-dst-defn 16 Imm-sh-8-s4 16 mode wstr op 6323 (+ opc1 opc2 (f-7-1 wbit2) Imm-sh-8-s4 (.sym dst16-16- mode)) 6324 sem) 6325 ) 6326 6327 ; m32c variants 6328 (define-pmacro (binary-arith32-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem) 6329 (begin 6330 ; Multi insns are tried for assembly in the reverse order in which they appear here, so 6331 ; define the absolute-indirect insns first in order to prevent them from being selected 6332 ; when the mode is register-indirect 6333 ; (binary-arith-imm4-dst-defn 32 Imm-20-s4 24-absolute-indirect mode wstr op 6334 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) Imm-20-s4) 6335 ; sem) 6336 (binary-arith-imm4-dst-defn 32 Imm-12-s4 16-Unprefixed mode wstr op 6337 (+ (f-0-3 opc1) (f-3-1 wbit1) (f-7-1 wbit2) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4) 6338 sem) 6339 ; (binary-arith-imm4-dst-defn 32 Imm-20-s4 24-indirect mode wstr op 6340 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-indirect- mode) (f-18-2 opc2) Imm-20-s4) 6341 ; sem) 6342 ) 6343 ) 6344 6345 (define-pmacro (binary-arith32-shimm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem) 6346 (begin 6347 ; Multi insns are tried for assembly in the reverse order in which they appear here, so 6348 ; define the absolute-indirect insns first in order to prevent them from being selected 6349 ; when the mode is register-indirect 6350 ; (binary-arith-imm4-dst-defn 32 Imm-sh-20-s4 24-absolute-indirect mode wstr op 6351 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) Imm-sh-20-s4) 6352 ; sem) 6353 (binary-arith-imm4-dst-defn 32 Imm-sh-12-s4 16-Unprefixed mode wstr op 6354 (+ (f-0-3 opc1) (f-3-1 wbit1) (f-7-1 wbit2) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) Imm-sh-12-s4) 6355 sem) 6356 ; (binary-arith-imm4-dst-defn 32 Imm-sh-20-s4 24-indirect mode wstr op 6357 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-indirect- mode) (f-18-2 opc2) Imm-sh-20-s4) 6358 ; sem) 6359 ) 6360 ) 6361 6362 (define-pmacro (binary-arith-imm4-dst-mach mach op opc1 opc2 sem) 6363 (begin 6364 (.apply (.sym binary-arith mach -imm4-dst-defn) (QI .b 0 0 op opc1 opc2 sem)) 6365 (.apply (.sym binary-arith mach -imm4-dst-defn) (HI .w 0 1 op opc1 opc2 sem)) 6366 ) 6367 ) 6368 6369 (define-pmacro (binary-arith-imm4-dst op opc16-1 opc16-2 opc32-1 opc32-2 sem) 6370 (begin 6371 (binary-arith-imm4-dst-mach 16 op opc16-1 opc16-2 sem) 6372 (binary-arith-imm4-dst-mach 32 op opc32-1 opc32-2 sem) 6373 ) 6374 ) 6375 6376 ;------------------------------------------------------------- 6377 ;<arith>.size:G src,dst -- for m16c and m32c 6378 ;------------------------------------------------------------- 6379 6380 (define-pmacro (binary-arith-src-dst-defn mach srcgroup dstgroup smode dmode wstr op suffix encoding sem) 6381 (dni (.sym op mach wstr - srcgroup - dstgroup) 6382 (.str op wstr " dst" mach "-" srcgroup "-" dstgroup "-" dmode) 6383 ((machine mach) RL_2ADDR) 6384 (.str op wstr "$" suffix " ${src" mach "-" srcgroup "-" smode "},${dst" mach "-" dstgroup "-" dmode "}") 6385 encoding 6386 (sem dmode (.sym src mach - srcgroup - smode) (.sym dst mach - dstgroup - dmode)) 6387 ()) 6388 ) 6389 6390 ; m16c variants 6391 (define-pmacro (binary-arith16-src-dst-defn smode dmode wstr wbit op suffix opc1 opc2 sem) 6392 (begin 6393 (binary-arith-src-dst-defn 16 basic 16 smode dmode wstr op suffix 6394 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-basic- smode) (.sym dst16-16- dmode)) 6395 sem) 6396 (binary-arith-src-dst-defn 16 16-16 32 smode dmode wstr op suffix 6397 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-16-16- smode) (.sym dst16-32- dmode)) 6398 sem) 6399 (binary-arith-src-dst-defn 16 16-8 24 smode dmode wstr op suffix 6400 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-16-8- smode) (.sym dst16-24- dmode)) 6401 sem) 6402 ) 6403 ) 6404 6405 ; m32c Prefixed variants 6406 (define-pmacro (binary-arith32-src-dst-Prefixed smode dmode wstr wbit op suffix opc1 opc2 sem) 6407 (begin 6408 (binary-arith-src-dst-defn 32 basic-Prefixed 24-Prefixed smode dmode wstr op suffix 6409 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-basic-Prefixed- smode) (.sym dst32-24-Prefixed- dmode) (f-20-4 opc2)) 6410 sem) 6411 (binary-arith-src-dst-defn 32 24-24-Prefixed 48-Prefixed smode dmode wstr op suffix 6412 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2)) 6413 sem) 6414 (binary-arith-src-dst-defn 32 24-16-Prefixed 40-Prefixed smode dmode wstr op suffix 6415 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2)) 6416 sem) 6417 (binary-arith-src-dst-defn 32 24-8-Prefixed 32-Prefixed smode dmode wstr op suffix 6418 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-Prefixed- dmode) (f-20-4 opc2)) 6419 sem) 6420 ) 6421 ) 6422 6423 ; all m32c variants 6424 (define-pmacro (binary-arith32-src-dst-defn smode dmode wstr wbit op suffix opc1 opc2 sem) 6425 (begin 6426 ; Multi insns are tried for assembly in the reverse order in which they appear here, so 6427 ; define the absolute-indirect insns first in order to prevent them from being selected 6428 ; when the mode is register-indirect 6429 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-absolute-indirect smode dmode wstr op suffix 6430 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6431 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2)) 6432 ; sem) 6433 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-absolute-indirect smode dmode wstr op suffix 6434 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6435 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2)) 6436 ; sem) 6437 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-Prefixed smode dmode wstr op suffix 6438 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) 6439 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2)) 6440 ; sem) 6441 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-Prefixed smode dmode wstr op suffix 6442 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) 6443 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2)) 6444 ; sem) 6445 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-indirect smode dmode wstr op suffix 6446 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6447 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2)) 6448 ; sem) 6449 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-indirect smode dmode wstr op suffix 6450 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6451 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2)) 6452 ; sem) 6453 ; (binary-arith-src-dst-defn 32 basic-Prefixed 24-absolute-indirect smode dmode wstr op suffix 6454 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6455 ; (.sym src32-basic-Prefixed- smode) (.sym dst32-24-absolute-indirect- dmode) (f-20-4 opc2)) 6456 ; sem) 6457 ; (binary-arith-src-dst-defn 32 24-24-Prefixed 48-absolute-indirect smode dmode wstr op suffix 6458 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6459 ; (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2)) 6460 ; sem) 6461 ; (binary-arith-src-dst-defn 32 24-16-Prefixed 40-absolute-indirect smode dmode wstr op suffix 6462 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6463 ; (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2)) 6464 ; sem) 6465 ; (binary-arith-src-dst-defn 32 24-8-Prefixed 32-absolute-indirect smode dmode wstr op suffix 6466 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6467 ; (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-absolute-indirect- dmode) (f-20-4 opc2)) 6468 ; sem) 6469 ; (binary-arith-src-dst-defn 32 basic-indirect 24-absolute-indirect smode dmode wstr op suffix 6470 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6471 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-absolute-indirect- dmode) (f-20-4 opc2)) 6472 ; sem) 6473 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-absolute-indirect smode dmode wstr op suffix 6474 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6475 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2)) 6476 ; sem) 6477 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-absolute-indirect smode dmode wstr op suffix 6478 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6479 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2)) 6480 ; sem) 6481 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-absolute-indirect smode dmode wstr op suffix 6482 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6483 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-absolute-indirect- dmode) (f-20-4 opc2)) 6484 ; sem) 6485 (binary-arith-src-dst-defn 32 basic-Unprefixed 16-Unprefixed smode dmode wstr op suffix 6486 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-basic-Unprefixed- smode) (.sym dst32-16-Unprefixed- dmode) (f-12-4 opc2)) 6487 sem) 6488 (binary-arith-src-dst-defn 32 16-24-Unprefixed 40-Unprefixed smode dmode wstr op suffix 6489 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-24-Unprefixed- smode) (.sym dst32-40-Unprefixed- dmode) (f-12-4 opc2)) 6490 sem) 6491 (binary-arith-src-dst-defn 32 16-16-Unprefixed 32-Unprefixed smode dmode wstr op suffix 6492 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-16-Unprefixed- smode) (.sym dst32-32-Unprefixed- dmode) (f-12-4 opc2)) 6493 sem) 6494 (binary-arith-src-dst-defn 32 16-8-Unprefixed 24-Unprefixed smode dmode wstr op suffix 6495 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-8-Unprefixed- smode) (.sym dst32-24-Unprefixed- dmode) (f-12-4 opc2)) 6496 sem) 6497 ; (binary-arith-src-dst-defn 32 basic-indirect 24-Prefixed smode dmode wstr op suffix 6498 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) 6499 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-Prefixed- dmode) (f-20-4 opc2)) 6500 ; sem) 6501 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-Prefixed smode dmode wstr op suffix 6502 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) 6503 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2)) 6504 ; sem) 6505 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-Prefixed smode dmode wstr op suffix 6506 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) 6507 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2)) 6508 ; sem) 6509 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-Prefixed smode dmode wstr op suffix 6510 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) 6511 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-Prefixed- dmode) (f-20-4 opc2)) 6512 ; sem) 6513 ; (binary-arith-src-dst-defn 32 basic-Prefixed 24-indirect smode dmode wstr op suffix 6514 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6515 ; (.sym src32-basic-Prefixed- smode) (.sym dst32-24-indirect- dmode) (f-20-4 opc2)) 6516 ; sem) 6517 ; (binary-arith-src-dst-defn 32 24-24-Prefixed 48-indirect smode dmode wstr op suffix 6518 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6519 ; (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2)) 6520 ; sem) 6521 ; (binary-arith-src-dst-defn 32 24-16-Prefixed 40-indirect smode dmode wstr op suffix 6522 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6523 ; (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2)) 6524 ; sem) 6525 ; (binary-arith-src-dst-defn 32 24-8-Prefixed 32-indirect smode dmode wstr op suffix 6526 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6527 ; (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-indirect- dmode) (f-20-4 opc2)) 6528 ; sem) 6529 ; (binary-arith-src-dst-defn 32 basic-indirect 24-indirect smode dmode wstr op suffix 6530 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6531 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-indirect- dmode) (f-20-4 opc2)) 6532 ; sem) 6533 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-indirect smode dmode wstr op suffix 6534 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6535 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2)) 6536 ; sem) 6537 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-indirect smode dmode wstr op suffix 6538 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6539 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2)) 6540 ; sem) 6541 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-indirect smode dmode wstr op suffix 6542 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6543 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-indirect- dmode) (f-20-4 opc2)) 6544 ; sem) 6545 ) 6546 ) 6547 6548 (define-pmacro (binary-arith-src-dst-mach mach op suffix opc1 opc2 sem) 6549 (begin 6550 (.apply (.sym binary-arith mach -src-dst-defn) (QI QI .b 0 op suffix opc1 opc2 sem)) 6551 (.apply (.sym binary-arith mach -src-dst-defn) (HI HI .w 1 op suffix opc1 opc2 sem)) 6552 ) 6553 ) 6554 6555 (define-pmacro (binary-arith-src-dst op suffix opc16-1 opc16-2 opc32-1 opc32-2 sem) 6556 (begin 6557 (binary-arith-src-dst-mach 16 op suffix opc16-1 opc16-2 sem) 6558 (binary-arith-src-dst-mach 32 op suffix opc32-1 opc32-2 sem) 6559 ) 6560 ) 6561 6562 ;------------------------------------------------------------- 6563 ;<arith>.size:S #imm,dst -- for m32c 6564 ;------------------------------------------------------------- 6565 6566 (define-pmacro (binary-arith32-s-imm-dst-defn src dstgroup mode wstr op encoding sem) 6567 (dni (.sym op 32 wstr - imm-S - dstgroup) 6568 (.str op wstr " 32-imm-S-" dstgroup "-" mode) 6569 ((machine 32)) 6570 (.str op wstr "$S #${" src "},${dst32-" dstgroup "-" mode "}") 6571 encoding 6572 (sem mode src (.sym dst32- dstgroup - mode)) 6573 ()) 6574 ) 6575 6576 (define-pmacro (binary-arith32-z-imm-dst-defn src dstgroup mode wstr op encoding sem) 6577 (dni (.sym op 32 wstr - imm-Z - dstgroup) 6578 (.str op wstr " 32-imm-Z-" dstgroup "-" mode) 6579 ((machine 32)) 6580 (.str op wstr "$Z #0,${dst32-" dstgroup "-" mode "}") 6581 encoding 6582 (sem mode (const 0) (.sym dst32- dstgroup - mode)) 6583 ()) 6584 ) 6585 6586 (define-pmacro (binary-arith32-s-imm-dst mode wstr wbit op opc1 opc2 sem) 6587 (begin 6588 ; (binary-arith32-s-imm-dst-defn (.sym Imm-32- mode) 2-S-absolute-indirect mode wstr op 6589 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-absolute-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-32- mode)) 6590 ; sem) 6591 (binary-arith32-s-imm-dst-defn (.sym Imm-8- mode) 2-S-basic mode wstr op 6592 (+ (f-0-2 opc1) (.sym dst32-2-S-basic- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-8- mode)) 6593 sem) 6594 (binary-arith32-s-imm-dst-defn (.sym Imm-24- mode) 2-S-16 mode wstr op 6595 (+ (f-0-2 opc1) (.sym dst32-2-S-16- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-24- mode)) 6596 sem) 6597 (binary-arith32-s-imm-dst-defn (.sym Imm-16- mode) 2-S-8 mode wstr op 6598 (+ (f-0-2 opc1) (.sym dst32-2-S-8- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-16- mode)) 6599 sem) 6600 ; (binary-arith32-s-imm-dst-defn (.sym Imm-24- mode) 2-S-8-indirect mode wstr op 6601 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-8-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-24- mode)) 6602 ; sem) 6603 ) 6604 ) 6605 6606 (define-pmacro (binary-arith32-z-imm-dst mode wstr wbit op opc1 opc2 sem) 6607 (begin 6608 ; (binary-arith32-z-imm-dst-defn (.sym Imm-32- mode) 2-S-absolute-indirect mode wstr op 6609 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-absolute-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-32- mode)) 6610 ; sem) 6611 (binary-arith32-z-imm-dst-defn (.sym Imm-8- mode) 2-S-basic mode wstr op 6612 (+ (f-0-2 opc1) (.sym dst32-2-S-basic- mode) (f-4-3 opc2) (f-7-1 wbit)) 6613 sem) 6614 (binary-arith32-z-imm-dst-defn (.sym Imm-24- mode) 2-S-16 mode wstr op 6615 (+ (f-0-2 opc1) (.sym dst32-2-S-16- mode) (f-4-3 opc2) (f-7-1 wbit)) 6616 sem) 6617 (binary-arith32-z-imm-dst-defn (.sym Imm-16- mode) 2-S-8 mode wstr op 6618 (+ (f-0-2 opc1) (.sym dst32-2-S-8- mode) (f-4-3 opc2) (f-7-1 wbit)) 6619 sem) 6620 ; (binary-arith32-z-imm-dst-defn (.sym Imm-24- mode) 2-S-8-indirect mode wstr op 6621 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-8-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-24- mode)) 6622 ; sem) 6623 ) 6624 ) 6625 6626 ;------------------------------------------------------------- 6627 ;<arith>.L:S #imm1,An -- for m32c 6628 ;------------------------------------------------------------- 6629 6630 (define-pmacro (binary-arith32-l-s-imm1-an op opc1 opc2 sem) 6631 (begin 6632 (dni (.sym op 32.l-s-imm1-S-an) 6633 (.str op ".l 32-imm1-S-an") 6634 ((machine 32)) 6635 (.str op ".l$S #${Imm1-S},${dst32-an-S}") 6636 (+ opc1 Imm1-S opc2 dst32-an-S) 6637 (sem SI Imm1-S dst32-an-S) 6638 ()) 6639 ) 6640 ) 6641 6642 ;------------------------------------------------------------- 6643 ;<arith>.L:Q #imm3,sp -- for m32c 6644 ;------------------------------------------------------------- 6645 6646 (define-pmacro (binary-arith32-l-q-imm3-sp op opc1 opc2 sem) 6647 (begin 6648 (dni (.sym op 32.l-imm3-Q) 6649 (.str op ".l 32-imm3-Q") 6650 ((machine 32)) 6651 (.str op ".l$Q #${Imm3-S},sp") 6652 (+ opc1 Imm3-S opc2) 6653 (sem SI Imm3-S sp) 6654 ()) 6655 ) 6656 ) 6657 6658 ;------------------------------------------------------------- 6659 ;<arith>.L:S #imm8,sp -- for m32c 6660 ;------------------------------------------------------------- 6661 6662 (define-pmacro (binary-arith32-l-s-imm8-sp op opc1 opc2 opc3 opc4 sem) 6663 (begin 6664 (dni (.sym op 32.l-imm8-S) 6665 (.str op ".l 32-imm8-S") 6666 ((machine 32)) 6667 (.str op ".l$S #${Imm-16-QI},sp") 6668 (+ opc1 opc2 opc3 opc4 Imm-16-QI) 6669 (sem SI Imm-16-QI sp) 6670 ()) 6671 ) 6672 ) 6673 6674 ;------------------------------------------------------------- 6675 ;<arith>.L:G #imm16,sp -- for m32c 6676 ;------------------------------------------------------------- 6677 6678 (define-pmacro (binary-arith32-l-g-imm16-sp op opc1 opc2 opc3 opc4 sem) 6679 (begin 6680 (dni (.sym op 32.l-imm16-G) 6681 (.str op ".l 32-imm16-G") 6682 ((machine 32)) 6683 (.str op ".l$G #${Imm-16-HI},sp") 6684 (+ opc1 opc2 opc3 opc4 Imm-16-HI) 6685 (sem SI Imm-16-HI sp) 6686 ()) 6687 ) 6688 ) 6689 6690 ;------------------------------------------------------------- 6691 ;<arith>jnz.size #imm4,dst,label -- for m16c and m32c 6692 ;------------------------------------------------------------- 6693 6694 (define-pmacro (arith-jnz-imm4-dst-defn mach src dstgroup label mode wstr op encoding sem) 6695 (dni (.sym op mach wstr - imm4 - dstgroup) 6696 (.str op wstr " " mach "-imm4-" dstgroup "-" label "-" mode) 6697 (RL_JUMP RELAXABLE (machine mach)) 6698 (.str op wstr " #${" src "},${dst" mach "-" dstgroup "-" mode "},${" label "}") 6699 encoding 6700 (sem mode src (.sym dst mach - dstgroup - mode) label) 6701 ()) 6702 ) 6703 6704 ; m16c variants 6705 (define-pmacro (arith-jnz16-imm4-dst-defn mode wstr wbit op i4n opc1 opc2 sem) 6706 (begin 6707 (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) basic Lab-16-8 mode wstr op 6708 (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-basic- mode) Lab-16-8) 6709 sem) 6710 (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) 16-16 Lab-32-8 mode wstr op 6711 (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-16- mode) Lab-32-8) 6712 sem) 6713 (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) 16-8 Lab-24-8 mode wstr op 6714 (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-8- mode) Lab-24-8) 6715 sem) 6716 ) 6717 ) 6718 6719 ; m32c variants 6720 (define-pmacro (arith-jnz32-imm4-dst-defn mode wstr wbit op i4n opc1 opc2 sem) 6721 (begin 6722 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) basic-Unprefixed Lab-16-8 mode wstr op 6723 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-16-8) 6724 sem) 6725 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-24-Unprefixed Lab-40-8 mode wstr op 6726 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-40-8) 6727 sem) 6728 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-16-Unprefixed Lab-32-8 mode wstr op 6729 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-32-8) 6730 sem) 6731 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-8-Unprefixed Lab-24-8 mode wstr op 6732 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-24-8) 6733 sem) 6734 ) 6735 ) 6736 6737 (define-pmacro (arith-jnz-imm4-dst-mach mach op i4n opc1 opc2 sem) 6738 (begin 6739 (.apply (.sym arith-jnz mach -imm4-dst-defn) (QI .b 0 op i4n opc1 opc2 sem)) 6740 (.apply (.sym arith-jnz mach -imm4-dst-defn) (HI .w 1 op i4n opc1 opc2 sem)) 6741 ) 6742 ) 6743 6744 (define-pmacro (arith-jnz-imm4-dst op i4n opc16-1 opc16-2 opc32-1 opc32-2 sem) 6745 (begin 6746 (arith-jnz-imm4-dst-mach 16 op i4n opc16-1 opc16-2 sem) 6747 (arith-jnz-imm4-dst-mach 32 op i4n opc32-1 opc32-2 sem) 6748 ) 6749 ) 6750 6751 ;------------------------------------------------------------- 6752 ;mov.size dsp8[sp],dst -- for m16c and m32c 6753 ;------------------------------------------------------------- 6754 (define-pmacro (mov-dspsp-dst-defn mach dstgroup dsp mode wstr op encoding sem) 6755 (dni (.sym op mach wstr -dspsp-dst- dstgroup) 6756 (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode) 6757 ((machine mach)) 6758 (.str op wstr "$G ${" dsp "}[sp],${dst" mach "-" dstgroup "-" mode "}") 6759 encoding 6760 (sem mach mode dsp (.sym dst mach - dstgroup - mode)) 6761 ()) 6762 ) 6763 (define-pmacro (mov-src-dspsp-defn mach dstgroup dsp mode wstr op encoding sem) 6764 (dni (.sym op mach wstr -dst-dspsp- dstgroup) 6765 (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode) 6766 ((machine mach)) 6767 (.str op wstr "$G ${dst" mach "-" dstgroup "-" mode "},${" dsp "}[sp]") 6768 encoding 6769 (sem mach mode (.sym dst mach - dstgroup - mode) dsp) 6770 ()) 6771 ) 6772 6773 ; m16c variants 6774 (define-pmacro (mov16-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem) 6775 (begin 6776 (mov-dspsp-dst-defn 16 basic Dsp-16-s8 mode wstr op 6777 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-s8) 6778 sem) 6779 (mov-dspsp-dst-defn 16 16-16 Dsp-32-s8 mode wstr op 6780 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-s8) 6781 sem) 6782 (mov-dspsp-dst-defn 16 16-8 Dsp-24-s8 mode wstr op 6783 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-s8) 6784 sem) 6785 ) 6786 ) 6787 6788 (define-pmacro (mov16-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem) 6789 (begin 6790 (mov-src-dspsp-defn 16 basic Dsp-16-s8 mode wstr op 6791 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-s8) 6792 sem) 6793 (mov-src-dspsp-defn 16 16-16 Dsp-32-s8 mode wstr op 6794 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-s8) 6795 sem) 6796 (mov-src-dspsp-defn 16 16-8 Dsp-24-s8 mode wstr op 6797 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-s8) 6798 sem) 6799 ) 6800 ) 6801 6802 ; m32c variants 6803 (define-pmacro (mov32-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem) 6804 (begin 6805 (mov-dspsp-dst-defn 32 basic-Unprefixed Dsp-16-s8 mode wstr op 6806 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-s8) 6807 sem) 6808 (mov-dspsp-dst-defn 32 16-24-Unprefixed Dsp-40-s8 mode wstr op 6809 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-s8) 6810 sem) 6811 (mov-dspsp-dst-defn 32 16-16-Unprefixed Dsp-32-s8 mode wstr op 6812 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-s8) 6813 sem) 6814 (mov-dspsp-dst-defn 32 16-8-Unprefixed Dsp-24-s8 mode wstr op 6815 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-s8) 6816 sem) 6817 ) 6818 ) 6819 (define-pmacro (mov32-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem) 6820 (begin 6821 (mov-src-dspsp-defn 32 basic-Unprefixed Dsp-16-s8 mode wstr op 6822 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-s8) 6823 sem) 6824 (mov-src-dspsp-defn 32 16-24-Unprefixed Dsp-40-s8 mode wstr op 6825 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-s8) 6826 sem) 6827 (mov-src-dspsp-defn 32 16-16-Unprefixed Dsp-32-s8 mode wstr op 6828 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-s8) 6829 sem) 6830 (mov-src-dspsp-defn 32 16-8-Unprefixed Dsp-24-s8 mode wstr op 6831 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-s8) 6832 sem) 6833 ) 6834 ) 6835 6836 (define-pmacro (mov-src-dspsp-mach mach op opc1 opc2 opc3 sem) 6837 (begin 6838 (.apply (.sym mov mach -src-dspsp-defn) (QI .b 0 op opc1 opc2 opc3 sem)) 6839 (.apply (.sym mov mach -src-dspsp-defn) (HI .w 1 op opc1 opc2 opc3 sem)) 6840 ) 6841 ) 6842 6843 (define-pmacro (mov-dspsp-dst-mach mach op opc1 opc2 opc3 sem) 6844 (begin 6845 (.apply (.sym mov mach -dspsp-dst-defn) (QI .b 0 op opc1 opc2 opc3 sem)) 6846 (.apply (.sym mov mach -dspsp-dst-defn) (HI .w 1 op opc1 opc2 opc3 sem)) 6847 ) 6848 ) 6849 6850 (define-pmacro (mov-dspsp-dst op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 6851 (begin 6852 (mov-dspsp-dst-mach 16 op opc16-1 opc16-2 opc16-3 sem) 6853 (mov-dspsp-dst-mach 32 op opc32-1 opc32-2 opc32-3 sem) 6854 ) 6855 ) 6856 (define-pmacro (mov-src-dspsp op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 6857 (begin 6858 (mov-src-dspsp-mach 16 op opc16-1 opc16-2 opc16-3 sem) 6859 (mov-src-dspsp-mach 32 op opc32-1 opc32-2 opc32-3 sem) 6860 ) 6861 ) 6862 6863 ;------------------------------------------------------------- 6864 ; lde dsp24,dst -- for m16c 6865 ;------------------------------------------------------------- 6866 6867 (define-pmacro (lde-dst-dsp mode wstr wbit dstgroup srcdisp) 6868 (begin 6869 6870 (dni (.sym lde wstr - dstgroup -u20) 6871 (.str "lde" wstr "-" dstgroup "-u20") 6872 ((machine 16)) 6873 (.str "lde" wstr " ${" srcdisp "},${dst16-" dstgroup "-" mode "}") 6874 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x8) 6875 (.sym dst16- dstgroup - mode) srcdisp) 6876 (nop) 6877 ()) 6878 6879 (dni (.sym lde wstr - dstgroup -u20a0) 6880 (.str "lde" wstr "-" dstgroup "-u20a0") 6881 ((machine 16)) 6882 (.str "lde" wstr " ${" srcdisp "}[a0],${dst16-" dstgroup "-" mode "}") 6883 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x9) 6884 (.sym dst16- dstgroup - mode) srcdisp) 6885 (nop) 6886 ()) 6887 6888 (dni (.sym lde wstr - dstgroup -a1a0) 6889 (.str "lde" wstr "-" dstgroup "-a1a0") 6890 ((machine 16)) 6891 (.str "lde" wstr " [a1a0],${dst16-" dstgroup "-" mode "}") 6892 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #xa) 6893 (.sym dst16- dstgroup - mode)) 6894 (nop) 6895 ()) 6896 ) 6897 ) 6898 6899 (define-pmacro (lde-dst mode wstr wbit) 6900 (begin 6901 ; like: QI .b 0 6902 (lde-dst-dsp mode wstr wbit basic Dsp-16-u20) 6903 (lde-dst-dsp mode wstr wbit 16-8 Dsp-24-u20) 6904 (lde-dst-dsp mode wstr wbit 16-16 Dsp-32-u20) 6905 ) 6906 ) 6907 6908 ;------------------------------------------------------------- 6909 ; ste dst,dsp24 -- for m16c 6910 ;------------------------------------------------------------- 6911 6912 (define-pmacro (ste-dst-dsp mode wstr wbit dstgroup srcdisp) 6913 (begin 6914 6915 (dni (.sym ste wstr - dstgroup -u20) 6916 (.str "ste" wstr "-" dstgroup "-u20") 6917 ((machine 16)) 6918 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}") 6919 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x0) 6920 (.sym dst16- dstgroup - mode) srcdisp) 6921 (nop) 6922 ()) 6923 6924 (dni (.sym ste wstr - dstgroup -u20a0) 6925 (.str "ste" wstr "-" dstgroup "-u20a0") 6926 ((machine 16)) 6927 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}[a0]") 6928 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x1) 6929 (.sym dst16- dstgroup - mode) srcdisp) 6930 (nop) 6931 ()) 6932 6933 (dni (.sym ste wstr - dstgroup -a1a0) 6934 (.str "ste" wstr "-" dstgroup "-a1a0") 6935 ((machine 16)) 6936 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},[a1a0]") 6937 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x2) 6938 (.sym dst16- dstgroup - mode)) 6939 (nop) 6940 ()) 6941 ) 6942 ) 6943 6944 (define-pmacro (ste-dst mode wstr wbit) 6945 (begin 6946 ; like: QI .b 0 6947 (ste-dst-dsp mode wstr wbit basic Dsp-16-u20) 6948 (ste-dst-dsp mode wstr wbit 16-8 Dsp-24-u20) 6949 (ste-dst-dsp mode wstr wbit 16-16 Dsp-32-u20) 6950 ) 6951 ) 6952 6953 ;============================================================= 6954 ; Division 6955 ;------------------------------------------------------------- 6956 6957 (define-pmacro (div-sem divop modop opmode reg src quot rem max min) 6958 (sequence () 6959 (if (eq src 0) 6960 (set obit (const BI 1)) 6961 (sequence ((opmode quot-result) (opmode rem-result)) 6962 (set quot-result (divop opmode (ext opmode reg) src)) 6963 (set rem-result (modop opmode (ext opmode reg) src)) 6964 (set obit (orif (gt opmode quot-result max) 6965 (lt opmode quot-result min))) 6966 (set quot quot-result) 6967 (set rem rem-result)))) 6968 ) 6969 6970 ;<divop>.size #imm -- for m16c and m32c 6971 (define-pmacro (div-imm-defn mach wstr op src encoding divop modop opmode reg quot rem max min sem) 6972 (dni (.sym op mach wstr - src) 6973 (.str op mach wstr "-" src) 6974 ((machine mach)) 6975 (.str op wstr " #${" src "}") 6976 encoding 6977 (sem divop modop opmode reg src quot rem max min) 6978 ()) 6979 ) 6980 (define-pmacro (div16-imm-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 opc4 sem) 6981 (div-imm-defn 16 wstr op (.sym Imm-16 - smode) 6982 (+ opc1 opc2 (f-7-1 wbit) opc3 opc4 (.sym Imm-16 - smode)) 6983 divop modop opmode reg quot rem max min 6984 sem) 6985 ) 6986 (define-pmacro (div32-imm-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 opc4 sem) 6987 (div-imm-defn 32 wstr op (.sym Imm-16 - smode) 6988 (+ (f-0-4 opc1) (f-4-4 opc2) (f-8-3 opc3) (f-11-1 wbit) (f-12-4 opc4) (.sym Imm-16 - smode)) 6989 divop modop opmode reg quot rem max min 6990 sem) 6991 ) 6992 (define-pmacro (div-imm-mach mach op divop modop opmode max-QI min-QI max-HI min-HI opc1 opc2 opc3 opc4 sem) 6993 (begin 6994 (.apply (.sym div mach -imm-defn) (QI .b 0 op divop modop opmode R0 R0l R0h max-QI min-QI opc1 opc2 opc3 opc4 sem)) 6995 (.apply (.sym div mach -imm-defn) (HI .w 1 op divop modop opmode R2R0 R0 R2 max-HI min-HI opc1 opc2 opc3 opc4 sem)) 6996 ) 6997 ) 6998 (define-pmacro (div-imm op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc16-4 opc32-1 opc32-2 opc32-3 opc32-4 sem) 6999 (begin 7000 (div-imm-mach 16 op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc16-4 sem) 7001 (div-imm-mach 32 op divop modop opmode max-QI min-QI max-HI min-HI opc32-1 opc32-2 opc32-3 opc32-4 sem) 7002 ) 7003 ) 7004 7005 ;<divop>.size src -- for m16c and m32c 7006 (define-pmacro (div-src-defn mach wstr op src encoding divop modop opmode reg quot rem max min sem) 7007 (dni (.sym op mach wstr - src) 7008 (.str op mach wstr "-" src) 7009 ((machine mach)) 7010 (.str op wstr " ${" src "}") 7011 encoding 7012 (sem divop modop opmode reg src quot rem max min) 7013 ()) 7014 ) 7015 (define-pmacro (div16-src-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 sem) 7016 (div-src-defn 16 wstr op (.sym dst16-16 - smode) 7017 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16 - smode)) 7018 divop modop opmode reg quot rem max min 7019 sem) 7020 ) 7021 (define-pmacro (div32-src-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 sem) 7022 (begin 7023 ; Multi insns are tried for assembly in the reverse order in which they appear here, so 7024 ; define the absolute-indirect insns first in order to prevent them from being selected 7025 ; when the mode is register-indirect 7026 ; (div-src-defn 32 wstr op (.sym dst32-24-absolute-indirect- smode) 7027 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (f-18-2 opc2) (f-20-4 opc3) (.sym dst32-24-absolute-indirect - smode)) 7028 ; divop modop opmode reg quot rem max min 7029 ; sem) 7030 (div-src-defn 32 wstr op (.sym dst32-16-Unprefixed- smode) 7031 (+ (f-0-4 opc1) (f-7-1 wbit) (f-10-2 opc2) (f-12-4 opc3) (.sym dst32-16-Unprefixed- smode)) 7032 divop modop opmode reg quot rem max min 7033 sem) 7034 ; (div-src-defn 32 wstr op (.sym dst32-24-indirect- smode) 7035 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (f-18-2 opc2) (f-20-4 opc3) (.sym dst32-24-indirect - smode)) 7036 ; divop modop opmode reg quot rem max min 7037 ; sem) 7038 ) 7039 ) 7040 (define-pmacro (div-src-mach mach op divop modop opmode max-QI min-QI max-HI min-HI opc1 opc2 opc3 sem) 7041 (begin 7042 (.apply (.sym div mach -src-defn) (QI .b 0 op divop modop opmode R0 R0l R0h max-QI min-QI opc1 opc2 opc3 sem)) 7043 (.apply (.sym div mach -src-defn) (HI .w 1 op divop modop opmode R2R0 R0 R2 max-HI min-HI opc1 opc2 opc3 sem)) 7044 ) 7045 ) 7046 (define-pmacro (div-src op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 7047 (begin 7048 (div-src-mach 16 op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 sem) 7049 (div-src-mach 32 op divop modop opmode max-QI min-QI max-HI min-HI opc32-1 opc32-2 opc32-3 sem) 7050 ) 7051 ) 7052 7053 ;============================================================= 7054 ; Bit manipulation 7055 ; 7056 (define-pmacro (bit-insn-defn mach op suffix opnd encoding sem) 7057 (dni (.sym op mach - suffix - opnd) 7058 (.str op mach ":" suffix " " opnd) 7059 ((machine mach)) 7060 (.str op "$" suffix " ${" opnd "}") 7061 encoding 7062 (sem opnd) 7063 ()) 7064 ) 7065 7066 (define-pmacro (bitsrc16-defn op opc1 opc2 opc3 sem) 7067 (bit-insn-defn 16 op X bit16-16 7068 (+ opc1 opc2 opc3 bit16-16) 7069 sem) 7070 ) 7071 7072 (define-pmacro (bitsrc32-defn op opc1 opc2 opc3 sem) 7073 (begin 7074 (bit-insn-defn 32 op X bit32-24-Prefixed 7075 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) bit32-24-Prefixed (f-15-1 opc2) (f-18-3 opc3)) 7076 sem) 7077 ) 7078 ) 7079 7080 (define-pmacro (bitsrc-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 7081 (begin 7082 (bitsrc16-defn op opc16-1 opc16-2 opc16-3 sem) 7083 (bitsrc32-defn op opc32-1 opc32-2 opc32-3 sem) 7084 ) 7085 ) 7086 7087 (define-pmacro (bitdst16-defn op opc1 opc2 opc3 opc4 opc5 opc6 sem) 7088 (begin 7089 (bit-insn-defn 16 op G bit16-16-basic (+ opc1 opc2 opc3 bit16-16-basic) sem) 7090 (bit-insn-defn 16 op G bit16-16-16 (+ opc1 opc2 opc3 bit16-16-16) sem) 7091 (bit-insn-defn 16 op S bit16-11-S (+ opc4 opc5 opc6 bit16-11-S) sem) 7092 (bit-insn-defn 16 op G bit16-16-8 (+ opc1 opc2 opc3 bit16-16-8) sem) 7093 ) 7094 ) 7095 7096 (define-pmacro (bitdst32-defn op opc1 opc2 opc3 sem) 7097 (begin 7098 (bit-insn-defn 32 op X bit32-16-Unprefixed 7099 (+ (f-0-4 opc1) bit32-16-Unprefixed (f-7-1 opc2) (f-10-3 opc3)) 7100 sem) 7101 ) 7102 ) 7103 7104 (define-pmacro (bitdstnos-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 7105 (begin 7106 (bitsrc16-defn op opc16-1 opc16-2 opc16-3 sem) 7107 (bitdst32-defn op opc32-1 opc32-2 opc32-3 sem) 7108 ) 7109 ) 7110 7111 (define-pmacro (bitdst-insn op opc16-1 opc16-2 opc16-3 opc16-4 opc16-5 opc16-6 opc32-1 opc32-2 opc32-3 sem) 7112 (begin 7113 (bitdst16-defn op opc16-1 opc16-2 opc16-3 opc16-4 opc16-5 opc16-6 sem) 7114 (bitdst32-defn op opc32-1 opc32-2 opc32-3 sem) 7115 ) 7116 ) 7117 7118 ;============================================================= 7119 ; Bit condition 7120 ; 7121 (define-pmacro (bitcond-insn-defn mach op bit-opnd cond-opnd encoding sem) 7122 (dni (.sym op mach - bit-opnd - cond-opnd) 7123 (.str op mach " " bit-opnd " " cond-opnd) 7124 ((machine mach)) 7125 (.str op "${" cond-opnd "} ${" bit-opnd "}") 7126 encoding 7127 (sem mach bit-opnd cond-opnd) 7128 ()) 7129 ) 7130 7131 (define-pmacro (bitcond16-defn op opc1 opc2 opc3 sem) 7132 (begin 7133 (bitcond-insn-defn 16 op bit16-16-basic cond16-16 (+ opc1 opc2 opc3 bit16-16-basic cond16-16) sem) 7134 (bitcond-insn-defn 16 op bit16-16-16 cond16-32 (+ opc1 opc2 opc3 bit16-16-16 cond16-32) sem) 7135 (bitcond-insn-defn 16 op bit16-16-8 cond16-24 (+ opc1 opc2 opc3 bit16-16-8 cond16-24) sem) 7136 ) 7137 ) 7138 7139 (define-pmacro (bitcond32-defn op opc1 opc2 opc3 sem) 7140 (begin 7141 (bitcond-insn-defn 32 op bit32-16-24-Unprefixed cond32-40 7142 (+ (f-0-4 opc1) bit32-16-24-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-40) 7143 sem) 7144 (bitcond-insn-defn 32 op bit32-16-16-Unprefixed cond32-32 7145 (+ (f-0-4 opc1) bit32-16-16-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-32) 7146 sem) 7147 (bitcond-insn-defn 32 op bit32-16-8-Unprefixed cond32-24 7148 (+ (f-0-4 opc1) bit32-16-8-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-24) 7149 sem) 7150 (bitcond-insn-defn 32 op bit32-basic-Unprefixed cond32-16 7151 (+ (f-0-4 opc1) bit32-basic-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-16) 7152 sem) 7153 ) 7154 ) 7155 7156 (define-pmacro (bitcond-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 7157 (begin 7158 (bitcond16-defn op opc16-1 opc16-2 opc16-3 sem) 7159 (bitcond32-defn op opc32-1 opc32-2 opc32-3 sem) 7160 ) 7161 ) 7162 7163 ;============================================================= 7164 ;<insn>.size #imm1,#imm2,dst -- for m32c 7165 ; 7166 (define-pmacro (insn-imm1-imm2-dst-defn src1 src2 dstgroup xmode wstr op encoding sem) 7167 (dni (.sym op 32 wstr - src1 - src2 - dstgroup) 7168 (.str op 32 wstr "-" src1 "-" src2 "-" dstgroup "-" xmode) 7169 ((machine 32)) 7170 (.str op wstr " #${" src1 "},#${" src2 "},${dst32-" dstgroup "-" xmode "}") 7171 encoding 7172 (sem xmode src1 src2 (.sym dst32- dstgroup - xmode)) 7173 ()) 7174 ) 7175 7176 ; m32c Prefixed variants 7177 (define-pmacro (insn32-imm1-imm2-dst-Prefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 opc2 opc3 sem) 7178 (begin 7179 (insn-imm1-imm2-dst-defn (.sym Imm-48- xmode) (.sym Imm- base4 - xmode) 24-24-Prefixed xmode wstr op 7180 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) 7181 (.sym dst32-24-24-Prefixed- xmode) (.sym Imm-48- xmode) (.sym Imm- base4 - xmode)) 7182 sem) 7183 (insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base3 - xmode) 24-16-Prefixed xmode wstr op 7184 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) 7185 (.sym dst32-24-16-Prefixed- xmode) (.sym Imm-40- xmode) (.sym Imm- base3 - xmode)) 7186 sem) 7187 (insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base2 - xmode) 24-8-Prefixed xmode wstr op 7188 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) 7189 (.sym dst32-24-8-Prefixed- xmode) (.sym Imm-32- xmode) (.sym Imm- base2 - xmode)) 7190 sem) 7191 (insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base1 - xmode) basic-Prefixed xmode wstr op 7192 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) 7193 (.sym dst32-basic-Prefixed- xmode) (.sym Imm-24- xmode) (.sym Imm- base1 - xmode)) 7194 sem) 7195 ) 7196 ) 7197 7198 ; m32c Unprefixed variants 7199 (define-pmacro (insn32-imm1-imm2-dst-Unprefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 opc2 opc3 sem) 7200 (begin 7201 (insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base4 - xmode) 16-24-Unprefixed xmode wstr op 7202 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) 7203 (.sym dst32-16-24-Unprefixed- xmode) (.sym Imm-40- xmode) (.sym Imm- base4 - xmode)) 7204 sem) 7205 (insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base3 - xmode) 16-16-Unprefixed xmode wstr op 7206 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) 7207 (.sym dst32-16-16-Unprefixed- xmode) (.sym Imm-32- xmode) (.sym Imm- base3 - xmode)) 7208 sem) 7209 (insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base2 - xmode) 16-8-Unprefixed xmode wstr op 7210 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) 7211 (.sym dst32-16-8-Unprefixed- xmode) (.sym Imm-24- xmode) (.sym Imm- base2 - xmode)) 7212 sem) 7213 (insn-imm1-imm2-dst-defn (.sym Imm-16- xmode) (.sym Imm- base1 - xmode) basic-Unprefixed xmode wstr op 7214 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) 7215 (.sym dst32-basic-Unprefixed- xmode) (.sym Imm-16- xmode) (.sym Imm- base1 - xmode)) 7216 sem) 7217 ) 7218 ) 7219 7220 (define-pmacro (insn-imm1-imm2-dst-Prefixed op opc32-1 opc32-2 opc32-3 sem) 7221 (begin 7222 (insn32-imm1-imm2-dst-Prefixed-defn QI .b 0 32 40 48 56 op opc32-1 opc32-2 opc32-3 sem) 7223 (insn32-imm1-imm2-dst-Prefixed-defn HI .w 1 40 48 56 64 op opc32-1 opc32-2 opc32-3 sem) 7224 ) 7225 ) 7226 (define-pmacro (insn-imm1-imm2-dst-Unprefixed op opc32-1 opc32-2 opc32-3 sem) 7227 (begin 7228 (insn32-imm1-imm2-dst-Unprefixed-defn QI .b 0 24 32 40 48 op opc32-1 opc32-2 opc32-3 sem) 7229 (insn32-imm1-imm2-dst-Unprefixed-defn HI .w 1 32 40 48 56 op opc32-1 opc32-2 opc32-3 sem) 7230 ) 7231 ) 7232 7234 ;============================================================= 7235 ; Insn definitions 7236 ;------------------------------------------------------------- 7237 ; abs - absolute 7238 ;------------------------------------------------------------- 7239 7240 (define-pmacro (abs-sem mode dst) 7241 (sequence ((mode result)) 7242 (set result (abs mode dst)) 7243 (set obit (eq result dst)) 7244 (set-z-and-s result) 7245 (set dst result)) 7246 ) 7247 (unary-insn abs (f-0-4 7) (f-4-3 3) (f-8-4 #xF) #xA #x1 #xF abs-sem) 7248 7249 ;------------------------------------------------------------- 7250 ; adcf - addition carry flag 7251 ;------------------------------------------------------------- 7252 7253 (define-pmacro (adcf-sem mode dst) 7254 (sequence ((mode result)) 7255 (set result (addc mode dst 0 cbit)) 7256 (set obit (add-oflag mode dst 0 cbit)) 7257 (set cbit (add-cflag mode dst 0 cbit)) 7258 (set-z-and-s result) 7259 (set dst result)) 7260 ) 7261 (unary-insn adcf (f-0-4 7) (f-4-3 3) (f-8-4 #xE) #xB #x1 #xE adcf-sem) 7262 7263 ;------------------------------------------------------------- 7264 ; add - binary addition 7265 ;------------------------------------------------------------- 7266 7267 (define-pmacro (add-sem mode src1 dst) 7268 (sequence ((mode result)) 7269 (set result (add mode src1 dst)) 7270 (set obit (add-oflag mode src1 dst 0)) 7271 (set cbit (add-cflag mode src1 dst 0)) 7272 (set-z-and-s result) 7273 (set dst result)) 7274 ) 7275 7276 ; add.L:G #imm32,dst (m32 #2) 7277 (binary-arith32-imm-dst-defn SI SI .l 0 add G #x8 #x3 #x1 add-sem) 7278 ; add.size:G #imm,dst (m16 #1 m32 #1) 7279 (binary-arith-imm-dst add G (f-0-4 7) (f-4-3 3) (f-8-4 4) #x8 #x2 #xE add-sem) 7280 ; add.size:Q #imm4,dst (m16 #2 m32 #3) 7281 (binary-arith-imm4-dst add (f-0-4 #xC) (f-4-3 4) #x7 #x3 add-sem) 7282 (binary-arith32-imm4-dst-defn SI .l 1 0 add #x7 #x3 add-sem) 7283 ; add.b:S #imm8,dst3 (m16 #3) 7284 (binary-arith16-b-S-imm8-dst3 add ".b" (f-0-4 8) (f-4-1 0) add-sem) 7285 ; add.BW:Q #imm4,sp (m16 #7) 7286 (binary-arith16-Q-sp add (f-0-4 7) (f-4-4 #xD) (f-8-4 #xB) add-sem) 7287 (dnmi add16-bQ-sp "add16-bQ-sp" () 7288 "add.b:q #${Imm-12-s4},sp" 7289 (emit add16-wQ-sp Imm-12-s4)) 7290 ; add.BW:G #imm,sp (m16 #6) 7291 (binary-arith16-G-sp add (f-0-4 7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #xB) add-sem) 7292 ; add.BW:G src,dst (m16 #4 m32 #6) 7293 (binary-arith-src-dst add G (f-0-4 #xA) (f-4-3 0) #x1 #x8 add-sem) 7294 ; add.B.S src2,r0l/r0h (m16 #5) 7295 (binary-arith16-b-S-src2 add (f-0-4 2) (f-4-1 0) add-sem) 7296 ; add.L:G src,dst (m32 #7) 7297 (binary-arith32-src-dst-defn SI SI .l 1 add G #x1 #x2 add-sem) 7298 ; add.L:S #imm{1,2},A0/A1 (m32 #5) 7299 (binary-arith32-l-s-imm1-an add (f-0-2 2) (f-3-4 6) add-sem) 7300 ; add.L:Q #imm3,sp (m32 #9) 7301 (binary-arith32-l-q-imm3-sp add (f-0-2 1) (f-4-3 1) add-sem) 7302 ; add.L:S #imm8,sp (m32 #10) 7303 (binary-arith32-l-s-imm8-sp add (f-0-4 #xb) (f-4-4 6) (f-8-4 0) (f-12-4 3) add-sem) 7304 ; add.L:G #imm16,sp (m32 #8) 7305 (binary-arith32-l-g-imm16-sp add (f-0-4 #xb) (f-4-4 6) (f-8-4 1) (f-12-4 3) add-sem) 7306 ; add.BW:S #imm,dst2 (m32 #4) 7307 (binary-arith32-s-imm-dst QI .b 0 add #x0 #x3 add-sem) 7308 (binary-arith32-s-imm-dst HI .w 1 add #x0 #x3 add-sem) 7309 7310 ;------------------------------------------------------------- 7311 ; adc - binary add with carry 7312 ;------------------------------------------------------------- 7313 7314 (define-pmacro (addc-sem mode src dst) 7315 (sequence ((mode result)) 7316 (set result (addc mode src dst cbit)) 7317 (set obit (add-oflag mode src dst cbit)) 7318 (set cbit (add-cflag mode src dst cbit)) 7319 (set-z-and-s result) 7320 (set dst result)) 7321 ) 7322 7323 ; adc.size:G #imm,dst 7324 (binary-arith16-imm-dst-defn QI QI .b 0 adc X (f-0-4 7) (f-4-3 3) (f-8-4 6) addc-sem) 7325 (binary-arith16-imm-dst-defn HI HI .w 1 adc X (f-0-4 7) (f-4-3 3) (f-8-4 6) addc-sem) 7326 (binary-arith32-imm-dst-Prefixed QI QI .b 0 adc X #x8 #x2 #xE addc-sem) 7327 (binary-arith32-imm-dst-Prefixed HI HI .w 1 adc X #x8 #x2 #xE addc-sem) 7328 7329 ; adc.BW:G src,dst 7330 (binary-arith16-src-dst-defn QI QI .b 0 adc X (f-0-4 #xB) (f-4-3 0) addc-sem) 7331 (binary-arith16-src-dst-defn HI HI .w 1 adc X (f-0-4 #xB) (f-4-3 0) addc-sem) 7332 (binary-arith32-src-dst-Prefixed QI QI .b 0 adc X #x1 #x4 addc-sem) 7333 (binary-arith32-src-dst-Prefixed HI HI .w 1 adc X #x1 #x4 addc-sem) 7334 7335 ;------------------------------------------------------------- 7336 ; dadc - decimal add with carry 7337 ; dadd - decimal addition 7338 ;------------------------------------------------------------- 7339 7340 (define-pmacro (dadc-sem mode src dst) 7341 (sequence ((mode result)) 7342 (set result (subc mode dst src (not cbit))) 7343 (set cbit (sub-cflag mode dst src (not cbit))) 7344 (set-z-and-s result) 7345 (set dst result)) 7346 ) 7347 7348 (define-pmacro (decimal-subtraction16-insn op opc1 opc2) 7349 (begin 7350 ; op.b #imm8,r0l 7351 (dni (.sym op 16.b-imm8) 7352 (.str op ".b #imm8") 7353 ((machine 16)) 7354 (.str op ".b #${Imm-16-QI},r0l") 7355 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc1) Imm-16-QI) 7356 ((.sym op -sem) QI Imm-16-QI R0l) 7357 ()) 7358 ; op.w #imm16,r0 7359 (dni (.sym op 16.w-imm16) 7360 (.str op ".b #imm16") 7361 ((machine 16)) 7362 (.str op ".w #${Imm-16-HI},r0") 7363 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc1) Imm-16-HI) 7364 ((.sym op -sem) HI Imm-16-HI R0) 7365 ()) 7366 ; op.b #r0h,r0l 7367 (dni (.sym op 16.b-r0h-r0l) 7368 (.str op ".b r0h,r0l") 7369 ((machine 16)) 7370 (.str op ".b r0h,r0l") 7371 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc2)) 7372 ((.sym op -sem) QI R0h R0l) 7373 ()) 7374 ; op.w #r1,r0 7375 (dni (.sym op 16.w-r1-r0) 7376 (.str op ".b r1,r0") 7377 ((machine 16)) 7378 (.str op ".w r1,r0") 7379 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc2)) 7380 ((.sym op -sem) HI R1 R0) 7381 ()) 7382 ) 7383 ) 7384 7385 ; dadc for m16c 7386 (decimal-subtraction16-insn dadc #xE #x6 ) 7387 7388 ; dadc.size #imm,dst 7389 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dadc X #x8 #x0 #xE dadc-sem) 7390 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dadc X #x8 #x0 #xE dadc-sem) 7391 ; dadc.BW src,dst 7392 (binary-arith32-src-dst-Prefixed QI QI .b 0 dadc X #x1 #x8 dadc-sem) 7393 (binary-arith32-src-dst-Prefixed HI HI .w 1 dadc X #x1 #x8 dadc-sem) 7394 7395 (define-pmacro (dadd-sem mode src dst) 7396 (sequence ((mode result)) 7397 (set result (subc mode dst src 0)) 7398 (set cbit (sub-cflag mode dst src 0)) 7399 (set-z-and-s result) 7400 (set dst result)) 7401 ) 7402 7403 ; dadd for m16c 7404 (decimal-subtraction16-insn dadd #xC #x4) 7405 7406 ; dadd.size #imm,dst 7407 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dadd X #x8 #x1 #xE dadd-sem) 7408 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dadd X #x8 #x1 #xE dadd-sem) 7409 ; dadd.BW src,dst 7410 (binary-arith32-src-dst-Prefixed QI QI .b 0 dadd X #x1 #x0 dadd-sem) 7411 (binary-arith32-src-dst-Prefixed HI HI .w 1 dadd X #x1 #x0 dadd-sem) 7412 7413 ;-------------------------------------------------------------; 7414 ; addx - Add extend sign with no carry 7415 ;-------------------------------------------------------------; 7416 7417 (define-pmacro (addx-sem mode src dst) 7418 (sequence ((SI source) (SI result)) 7419 (set source (zext SI (trunc QI src))) 7420 (set result (add SI source dst)) 7421 (set obit (add-oflag SI source dst 0)) 7422 (set cbit (add-cflag SI source dst 0)) 7423 (set-z-and-s result) 7424 (set dst result)) 7425 ) 7426 7427 ; addx #imm,dst 7428 (binary-arith32-imm-dst-defn QI SI "" 0 addx X #x8 #x1 #x1 addx-sem) 7429 ; addx src,dst 7430 (binary-arith32-src-dst-defn QI SI "" 0 addx X #x1 #x2 addx-sem) 7431 7432 ;------------------------------------------------------------- 7433 ; adjnz - Add/Sub and branch if not zero 7434 ;------------------------------------------------------------- 7435 7436 (define-pmacro (arith-jnz-sem mode src dst label) 7437 (sequence ((mode result)) 7438 (set result (add mode src dst)) 7439 (set dst result) 7440 (if (ne result 0) 7441 (set pc label))) 7442 ) 7443 7444 ; adjnz.size #imm4,dst,label 7445 (arith-jnz-imm4-dst adjnz s4 (f-0-4 #xF) (f-4-3 4) #xf #x1 arith-jnz-sem) 7446 7447 ;------------------------------------------------------------- 7448 ; and - binary and 7449 ;------------------------------------------------------------- 7450 7451 (define-pmacro (and-sem mode src1 dst) 7452 (sequence ((mode result)) 7453 (set result (and mode src1 dst)) 7454 (set-z-and-s result) 7455 (set dst result)) 7456 ) 7457 7458 ; and.size:G #imm,dst (m16 #1 m32 #1) 7459 (binary-arith-imm-dst and G (f-0-4 7) (f-4-3 3) (f-8-4 2) #x8 #x3 #xF and-sem) 7460 ; and.b:S #imm8,dst3 (m16 #2) 7461 (binary-arith16-b-S-imm8-dst3 and ".b" (f-0-4 9) (f-4-1 0) and-sem) 7462 ; and.BW:G src,dst (m16 #3 m32 #3) 7463 (binary-arith-src-dst and G (f-0-4 #x9) (f-4-3 0) #x1 #xD and-sem) 7464 ; and.B.S src2,r0l/r0h (m16 #4) 7465 (binary-arith16-b-S-src2 and (f-0-4 1) (f-4-1 0) and-sem) 7466 ; and.BW:S #imm,dst2 (m32 #2) 7467 (binary-arith32-s-imm-dst QI .b 0 and #x1 #x6 and-sem) 7468 (binary-arith32-s-imm-dst HI .w 1 and #x1 #x6 and-sem) 7469 7470 ;------------------------------------------------------------- 7471 ; band - bit and 7472 ;------------------------------------------------------------- 7473 7474 (define-pmacro (band-sem src) 7475 (set cbit (and src cbit)) 7476 ) 7477 (bitsrc-insn band (f-0-4 7) (f-4-4 #xE) (f-8-4 4) #xD #x0 #x1 band-sem) 7478 7479 ;------------------------------------------------------------- 7480 ; bclr - bit clear 7481 ;------------------------------------------------------------- 7482 7483 (define-pmacro (bclr-sem dst) 7484 (set dst 0) 7485 ) 7486 (bitdst-insn bclr (f-0-4 7) (f-4-4 #xE) (f-8-4 8) (f-0-2 1) (f-2-2 0) (f-4-1 0) #xD #x0 #x6 bclr-sem) 7487 7488 ;------------------------------------------------------------- 7489 ; bitindex - bit index 7490 ;------------------------------------------------------------- 7491 7492 (define-pmacro (bitindex-sem mode dst) 7493 (set BitIndex dst) 7494 ) 7495 (unary-insn-defn 32 16-Unprefixed QI .b bitindex 7496 (+ (f-0-4 #xC) (f-7-1 0) dst32-16-Unprefixed-QI (f-10-2 #x2) (f-12-4 #xE)) 7497 bitindex-sem) 7498 (unary-insn-defn 32 16-Unprefixed HI .w bitindex 7499 (+ (f-0-4 #xC) (f-7-1 1) dst32-16-Unprefixed-HI (f-10-2 #x2) (f-12-4 #xE)) 7500 bitindex-sem) 7501 7502 ;------------------------------------------------------------- 7503 ; bmCnd - bit move condition 7504 ;------------------------------------------------------------- 7505 7506 (define-pmacro (test-condition16 cond) 7507 (case UQI cond 7508 ((#x00) (trunc BI cbit)) 7509 ((#x01) (not (or cbit zbit))) 7510 ((#x02) (trunc BI zbit)) 7511 ((#x03) (trunc BI sbit)) 7512 ((#x04) (or zbit (xor sbit obit))) 7513 ((#x05) (trunc BI obit)) 7514 ((#x06) (xor sbit obit)) 7515 ((#xf8) (not cbit)) 7516 ((#xf9) (or cbit zbit)) 7517 ((#xfa) (not zbit)) 7518 ((#xfb) (not sbit)) 7519 ((#xfc) (not (or zbit (xor sbit obit)))) 7520 ((#xfd) (not obit)) 7521 ((#xfe) (not (xor sbit obit))) 7522 (else (const BI 0)) 7523 ) 7524 ) 7525 7526 (define-pmacro (test-condition32 cond) 7527 (case UQI cond 7528 ((#x00) (not cbit)) 7529 ((#x01) (or cbit zbit)) 7530 ((#x02) (not zbit)) 7531 ((#x03) (not sbit)) 7532 ((#x04) (not obit)) 7533 ((#x05) (not (or zbit (xor sbit obit)))) 7534 ((#x06) (not (xor sbit obit))) 7535 ((#x08) (trunc BI cbit)) 7536 ((#x09) (not (or cbit zbit))) 7537 ((#x0a) (trunc BI zbit)) 7538 ((#x0b) (trunc BI sbit)) 7539 ((#x0c) (trunc BI obit)) 7540 ((#x0d) (or zbit (xor sbit obit))) 7541 ((#x0e) (xor sbit obit)) 7542 (else (const BI 0)) 7543 ) 7544 ) 7545 7546 (define-pmacro (bitcond-sem mach op cond) 7547 (if ((.sym test-condition mach) cond) 7548 (set op 1) 7549 (set op 0)) 7550 ) 7551 (bitcond-insn bm (f-0-4 7) (f-4-4 #xE) (f-8-4 2) #xD #x0 #x2 bitcond-sem) 7552 7553 (dni bm16-c 7554 "bm16 C" 7555 ((machine 16)) 7556 "bm$cond16c c" 7557 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xD) cond16c) 7558 (bitcond-sem 16 cbit cond16c) 7559 ()) 7560 7561 (dni bm32-c 7562 "bm32 C" 7563 ((machine 32)) 7564 "bm$cond32 c" 7565 (+ (f-0-4 #xD) (f-4-4 #x9) (f-8-1 0) (f-10-3 5) cond32) 7566 (bitcond-sem 32 cbit cond32) 7567 ()) 7568 7569 ;------------------------------------------------------------- 7570 ; bnand 7571 ;------------------------------------------------------------- 7572 7573 (define-pmacro (bnand-sem src) 7574 (set cbit (and (inv src) cbit)) 7575 ) 7576 (bitsrc-insn bnand (f-0-4 7) (f-4-4 #xE) (f-8-4 5) #xD #x0 #x3 bnand-sem) 7577 7578 ;------------------------------------------------------------- 7579 ; bnor 7580 ;------------------------------------------------------------- 7581 7582 (define-pmacro (bnor-sem src) 7583 (set cbit (or (inv src) cbit)) 7584 ) 7585 (bitsrc-insn bnor (f-0-4 7) (f-4-4 #xE) (f-8-4 7) #xD #x0 #x6 bnor-sem) 7586 7587 ;------------------------------------------------------------- 7588 ; bnot 7589 ;------------------------------------------------------------- 7590 7591 (define-pmacro (bnot-sem dst) 7592 (set dst (inv dst)) 7593 ) 7594 (bitdst-insn bnot (f-0-4 7) (f-4-4 #xE) (f-8-4 #xA) (f-0-2 1) (f-2-2 1) (f-4-1 0) #xD #x0 #x3 bnot-sem) 7595 7596 ;------------------------------------------------------------- 7597 ; bntst 7598 ;------------------------------------------------------------- 7599 7600 (define-pmacro (bntst-sem src) 7601 (set cbit (inv src)) 7602 (set zbit (inv src)) 7603 ) 7604 (bitsrc-insn bntst (f-0-4 7) (f-4-4 #xE) (f-8-4 3) #xD #x0 #x0 bntst-sem) 7605 7606 ;------------------------------------------------------------- 7607 ; bnxor 7608 ;------------------------------------------------------------- 7609 7610 (define-pmacro (bnxor-sem src) 7611 (set cbit (xor (inv src) cbit)) 7612 ) 7613 (bitsrc-insn bnxor (f-0-4 7) (f-4-4 #xE) (f-8-4 #xD) #xD #x0 #x7 bnxor-sem) 7614 7615 ;------------------------------------------------------------- 7616 ; bor 7617 ;------------------------------------------------------------- 7618 7619 (define-pmacro (bor-sem src) 7620 (set cbit (or src cbit)) 7621 ) 7622 (bitsrc-insn bor (f-0-4 7) (f-4-4 #xE) (f-8-4 #x6) #xD #x0 #x4 bor-sem) 7623 7624 ;------------------------------------------------------------- 7625 ; brk 7626 ;------------------------------------------------------------- 7627 7628 (dni brk16 7629 "brk" 7630 ((machine 16)) 7631 "brk" 7632 (+ (f-0-4 #x0) (f-4-4 #x0)) 7633 (nop) 7634 ()) 7635 7636 (dni brk32 7637 "brk" 7638 ((machine 32)) 7639 "brk" 7640 (+ (f-0-4 #x0) (f-4-4 #x0)) 7641 (nop) 7642 ()) 7643 7644 ;------------------------------------------------------------- 7645 ; brk2 7646 ;------------------------------------------------------------- 7647 7648 (dni brk232 7649 "brk2" 7650 ((machine 32)) 7651 "brk2" 7652 (+ (f-0-4 #x0) (f-4-4 #x8)) 7653 (nop) 7654 ()) 7655 7656 ;------------------------------------------------------------- 7657 ; bset 7658 ;------------------------------------------------------------- 7659 7660 (define-pmacro (bset-sem dst) 7661 (set dst 1) 7662 ) 7663 (bitdst-insn bset (f-0-4 7) (f-4-4 #xE) (f-8-4 9) (f-0-2 1) (f-2-2 0) (f-4-1 1) #xD #x0 #x7 bset-sem) 7664 7665 ;------------------------------------------------------------- 7666 ; btst 7667 ;------------------------------------------------------------- 7668 7669 (define-pmacro (btst-sem dst) 7670 (set zbit (inv dst)) 7671 (set cbit dst) 7672 ) 7673 (bitdst16-defn btst (f-0-4 7) (f-4-4 #xE) (f-8-4 #xB) (f-0-2 1) (f-2-2 1) (f-4-1 1) btst-sem) 7674 7675 (bit-insn-defn 32 btst G bit32-16-Unprefixed 7676 (+ (f-0-4 #xD) bit32-16-Unprefixed (f-7-1 #x0) (f-10-3 #x0)) 7677 btst-sem) 7678 7679 (dni btst.s "btst:s" ((machine 32)) 7680 "btst:s ${Bit3-S},${Dsp-8-u16}" 7681 (+ (f-0-2 #x0) (f-4-3 #x5) Bit3-S Dsp-8-u16) 7682 () ()) 7683 7684 ;------------------------------------------------------------- 7685 ; btstc 7686 ;------------------------------------------------------------- 7687 7688 (define-pmacro (btstc-sem dst) 7689 (set zbit (inv dst)) 7690 (set cbit dst) 7691 (set dst (const 0)) 7692 ) 7693 (bitdstnos-insn btstc (f-0-4 7) (f-4-4 #xE) (f-8-4 #x0) #xD #x0 #x4 btstc-sem) 7694 7695 ;------------------------------------------------------------- 7696 ; btsts 7697 ;------------------------------------------------------------- 7698 7699 (define-pmacro (btsts-sem dst) 7700 (set zbit (inv dst)) 7701 (set cbit dst) 7702 (set dst (const 0)) 7703 ) 7704 (bitdstnos-insn btsts (f-0-4 7) (f-4-4 #xE) (f-8-4 #x1) #xD #x0 #x5 btsts-sem) 7705 7706 ;------------------------------------------------------------- 7707 ; bxor 7708 ;------------------------------------------------------------- 7709 7710 (define-pmacro (bxor-sem src) 7711 (set cbit (xor src cbit)) 7712 ) 7713 (bitsrc-insn bxor (f-0-4 7) (f-4-4 #xE) (f-8-4 #xC) #xD #x0 #x5 bxor-sem) 7714 7715 ;------------------------------------------------------------- 7716 ; clip 7717 ;------------------------------------------------------------- 7718 7719 (define-pmacro (clip-sem mode imm1 imm2 dest) 7720 (sequence () 7721 (if (gt mode imm1 dest) 7722 (set dest imm1)) 7723 (if (lt mode imm2 dest) 7724 (set dest imm2))) 7725 ) 7726 7727 (insn-imm1-imm2-dst-Prefixed clip #x8 #x3 #xE clip-sem) 7728 7729 ;------------------------------------------------------------- 7730 ; cmp - binary compare 7731 ;------------------------------------------------------------- 7732 7733 (define-pmacro (cmp-sem mode src1 dst) 7734 (sequence ((mode result)) 7735 (set result (sub mode dst src1)) 7736 (set obit (sub-oflag mode dst src1 0)) 7737 (set cbit (not (sub-cflag mode dst src1 0))) 7738 (set-z-and-s result)) 7739 ) 7740 7741 ; cmp.L:G #imm32,dst (m32 #2) 7742 (binary-arith32-imm-dst-defn SI SI .l 0 cmp G #xA #x3 #x1 cmp-sem) 7743 ; cmp.size:G #imm,dst (m16 #1 m32 #1) 7744 (binary-arith-imm-dst cmp G (f-0-4 7) (f-4-3 3) (f-8-4 8) #x9 #x2 #xE cmp-sem) 7745 ; cmp.size:Q #imm4,dst (m16 #2 m32 #3) 7746 (binary-arith-imm4-dst cmp (f-0-4 #xD) (f-4-3 0) #x7 #x1 cmp-sem) 7747 ; cmp.b:S #imm8,dst3 (m16 #3) 7748 (binary-arith16-b-S-imm8-dst3 cmp ".b" (f-0-4 #xE) (f-4-1 0) cmp-sem) 7749 ; cmp.BW:G src,dst (m16 #4 m32 #5) 7750 (binary-arith-src-dst cmp G (f-0-4 #xC) (f-4-3 0) #x1 #x6 cmp-sem) 7751 ; cmp.B.S src2,r0l/r0h (m16 #5) 7752 (binary-arith16-b-S-src2 cmp (f-0-4 3) (f-4-1 1) cmp-sem) 7753 ; cmp.L:G src,dst (m32 #6) 7754 (binary-arith32-src-dst-defn SI SI .l 1 cmp G #x1 #x1 cmp-sem) 7755 ; cmp.BW:S #imm,dst2 (m32 #4) 7756 (binary-arith32-s-imm-dst QI .b 0 cmp #x1 #x3 cmp-sem) 7757 (binary-arith32-s-imm-dst HI .w 1 cmp #x1 #x3 cmp-sem) 7758 ; cmp.BW:s src2,r0[l] (m32 #7) 7759 (binary-arith32-S-src2 cmp QI .b 0 (f-0-2 1) (f-4-3 0) cmp-sem) 7760 (binary-arith32-S-src2 cmp HI .w 1 (f-0-2 1) (f-4-3 0) cmp-sem) 7761 7762 ;------------------------------------------------------------- 7763 ; cmpx - binary compare extend sign 7764 ;------------------------------------------------------------- 7765 7766 (define-pmacro (cmpx-sem mode src1 dst) 7767 (sequence ((mode result)) 7768 (set result (sub mode dst (ext mode src1))) 7769 (set obit (sub-oflag mode dst (ext mode src1) 0)) 7770 (set cbit (sub-cflag mode dst (ext mode src1) 0)) 7771 (set-z-and-s result)) 7772 ) 7773 7774 (binary-arith32-imm-dst-defn QI SI "" 0 cmpx X #xA #x1 #x1 cmpx-sem) 7775 7776 ;------------------------------------------------------------- 7777 ; dec - decrement 7778 ;------------------------------------------------------------- 7779 7780 (define-pmacro (dec-sem mode dest) 7781 (sequence ((mode result)) 7782 (set result (sub mode dest 1)) 7783 (set-z-and-s result) 7784 (set dest result)) 7785 ) 7786 7787 (dni dec16.b 7788 "dec.b Dst16-3-S-8" 7789 ((machine 16)) 7790 "dec.b ${Dst16-3-S-8}" 7791 (+ (f-0-4 #xA) (f-4-1 #x1) Dst16-3-S-8) 7792 (dec-sem QI Dst16-3-S-8) 7793 ()) 7794 7795 (dni dec16.w 7796 "dec.w Dst16An-S" 7797 ((machine 16)) 7798 "dec.w ${Dst16An-S}" 7799 (+ (f-0-4 #xF) (f-5-3 #x2) Dst16An-S) 7800 (dec-sem HI Dst16An-S) 7801 ()) 7802 7803 (unary32-defn QI .b 0 dec #xB #x0 #xE dec-sem) 7804 (unary32-defn HI .w 1 dec #xB #x0 #xE dec-sem) 7805 7806 ;------------------------------------------------------------- 7807 ; div - divide 7808 ; divu - divide unsigned 7809 ; divx - divide extension 7810 ;------------------------------------------------------------- 7811 7812 ; div.BW #imm 7813 (div-imm div div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x1) #xB #x0 #x2 #x3 div-sem) 7814 (div-imm divu udiv umod USI 255 0 65535 0 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x0) #xB #x0 #x0 #x3 div-sem) 7815 (div-imm divx div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x3) #xB #x2 #x2 #x3 div-sem) 7816 ; div.BW src 7817 (div-src div div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 3) (f-8-4 #xD) #x8 #x1 #xE div-sem) 7818 (div-src divu udiv umod USI 255 0 65535 0 (f-0-4 #x7) (f-4-3 3) (f-8-4 #xC) #x8 #x0 #xE div-sem) 7819 (div-src divx div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 3) (f-8-4 #x9) #x9 #x1 #xE div-sem) 7820 7821 (div-src-defn 32 .l div dst32-24-Prefixed-SI 7822 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x1) (f-20-4 #xf) dst32-24-Prefixed-SI) 7823 div mod SI R2R0 R2R0 NoRemainder #x7fffffff (neg SI #x80000000) 7824 div-sem) 7825 (div-src-defn 32 .l divu dst32-24-Prefixed-SI 7826 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x0) (f-20-4 #xf) dst32-24-Prefixed-SI) 7827 udiv umod USI R2R0 R2R0 NoRemainder #x80000000 0 7828 div-sem) 7829 (div-src-defn 32 .l divx dst32-24-Prefixed-SI 7830 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x2) (f-20-4 #xf) dst32-24-Prefixed-SI) 7831 div mod SI R2R0 R2R0 NoRemainder #x7fffffff (neg SI #x80000000) 7832 div-sem) 7833 7834 ;------------------------------------------------------------- 7835 ; dsbb - decimal subtraction with borrow 7836 ; dsub - decimal subtraction 7837 ;------------------------------------------------------------- 7838 7839 (define-pmacro (dsbb-sem mode src dst) 7840 (sequence ((mode result)) 7841 (set result (subc mode dst src (not cbit))) 7842 (set cbit (sub-cflag mode dst src (not cbit))) 7843 (set-z-and-s result) 7844 (set dst result)) 7845 ) 7846 7847 ; dsbb for m16c 7848 (decimal-subtraction16-insn dsbb #xF #x7) 7849 7850 ; dsbb.size #imm,dst 7851 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dsbb X #x9 #x0 #xE dsbb-sem) 7852 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dsbb X #x9 #x0 #xE dsbb-sem) 7853 ; dsbb.BW src,dst 7854 (binary-arith32-src-dst-Prefixed QI QI .b 0 dsbb X #x1 #xA dsbb-sem) 7855 (binary-arith32-src-dst-Prefixed HI HI .w 1 dsbb X #x1 #xA dsbb-sem) 7856 7857 (define-pmacro (dsub-sem mode src dst) 7858 (sequence ((mode result)) 7859 (set result (subc mode dst src 0)) 7860 (set cbit (sub-cflag mode dst src 0)) 7861 (set-z-and-s result) 7862 (set dst result)) 7863 ) 7864 7865 ; dsub for m16c 7866 (decimal-subtraction16-insn dsub #xD #x5) 7867 7868 ; dsub.size #imm,dst 7869 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dsub X #x9 #x1 #xE dsub-sem) 7870 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dsub X #x9 #x1 #xE dsub-sem) 7871 ; dsub.BW src,dst 7872 (binary-arith32-src-dst-Prefixed QI QI .b 0 dsub X #x1 #x2 dsub-sem) 7873 (binary-arith32-src-dst-Prefixed HI HI .w 1 dsub X #x1 #x2 dsub-sem) 7874 7875 ;------------------------------------------------------------- 7876 ; sub - binary subtraction 7877 ;------------------------------------------------------------- 7878 7879 (define-pmacro (sub-sem mode src1 dst) 7880 (sequence ((mode result)) 7881 (set result (sub mode dst src1)) 7882 (set obit (sub-oflag mode dst src1 0)) 7883 (set cbit (sub-cflag mode dst src1 0)) 7884 (set dst result) 7885 (set-z-and-s result))) 7886 7887 ; sub.size:G #imm,dst (m16 #1 m32 #1) 7888 (binary-arith-imm-dst sub G (f-0-4 7) (f-4-3 3) (f-8-4 5) #x8 #x3 #xE sub-sem) 7889 ; sub.b:S #imm8,dst3 (m16 #2) 7890 (binary-arith16-b-S-imm8-dst3 sub ".b" (f-0-4 8) (f-4-1 1) sub-sem) 7891 ; sub.BW:G src,dst (m16 #3 m32 #4) 7892 (binary-arith-src-dst sub G (f-0-4 #xA) (f-4-3 4) #x1 #xA sub-sem) 7893 ; sub.B.S src2,r0l/r0h (m16 #4) 7894 (binary-arith16-b-S-src2 sub (f-0-4 2) (f-4-1 1) sub-sem) 7895 ; sub.L:G #imm32,dst (m32 #2) 7896 (binary-arith32-imm-dst-defn SI SI .l 0 sub G #x9 #x3 #x1 sub-sem) 7897 ; sub.BW:S #imm,dst2 (m32 #3) 7898 (binary-arith32-s-imm-dst QI .b 0 sub #x0 #x7 sub-sem) 7899 (binary-arith32-s-imm-dst HI .w 1 sub #x0 #x7 sub-sem) 7900 ; sub.L:G src,dst (m32 #5) 7901 (binary-arith32-src-dst-defn SI SI .l 1 sub G #x1 #x0 sub-sem) 7902 7903 ;------------------------------------------------------------- 7904 ; enter - enter function 7905 ; exitd - exit and deallocate stack frame 7906 ;------------------------------------------------------------- 7907 7908 (define-pmacro (enter16-sem mach amt) 7909 (sequence () 7910 (set (reg h-sp) (sub (reg h-sp) 2)) 7911 (set (mem16 HI (reg h-sp)) (reg h-fb)) 7912 (set (reg h-fb) (reg h-sp)) 7913 (set (reg h-sp) (sub (reg h-sp) amt)))) 7914 7915 (define-pmacro (exit16-sem mach) 7916 (sequence ((SI newpc)) 7917 (set (reg h-sp) (reg h-fb)) 7918 (set (reg h-fb) (mem16 HI (reg h-sp))) 7919 (set (reg h-sp) (add (reg h-sp) 2)) 7920 (set newpc (mem16 HI (reg h-sp))) 7921 (set (reg h-sp) (add (reg h-sp) 2)) 7922 (set newpc (or newpc (sll (mem16 QI (reg h-sp)) (const 16)))) 7923 (set (reg h-sp) (add (reg h-sp) 1)) 7924 (set pc newpc))) 7925 7926 (define-pmacro (enter32-sem mach amt) 7927 (sequence () 7928 (set (reg h-sp) (sub (reg h-sp) 4)) 7929 (set (mem32 SI (reg h-sp)) (reg h-fb)) 7930 (set (reg h-fb) (reg h-sp)) 7931 (set (reg h-sp) (sub (reg h-sp) amt)))) 7932 7933 (define-pmacro (exit32-sem mach) 7934 (sequence ((SI newpc)) 7935 (set (reg h-sp) (reg h-fb)) 7936 (set (reg h-fb) (mem32 SI (reg h-sp))) 7937 (set (reg h-sp) (add (reg h-sp) 4)) 7938 (set newpc (mem32 SI (reg h-sp))) 7939 (set (reg h-sp) (add (reg h-sp) 4)) 7940 (set pc newpc))) 7941 7942 (dni enter16 "enter #Imm-16-QI" ((machine 16)) 7943 ("enter #${Dsp-16-u8}") 7944 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 2) Dsp-16-u8) 7945 (enter16-sem 16 Dsp-16-u8) 7946 ()) 7947 7948 (dni exitd16 "exitd" ((machine 16)) 7949 ("exitd") 7950 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 2)) 7951 (exit16-sem 16) 7952 ()) 7953 7954 (dni enter32 "enter #Imm-8-QI" ((machine 32)) 7955 ("enter #${Dsp-8-u8}") 7956 (+ (f-0-4 #xE) (f-4-4 #xC) Dsp-8-u8) 7957 (enter32-sem 32 Dsp-8-u8) 7958 ()) 7959 7960 (dni exitd32 "exitd" ((machine 32)) 7961 ("exitd") 7962 (+ (f-0-4 #xF) (f-4-4 #xC)) 7963 (exit32-sem 32) 7964 ()) 7965 7966 ;------------------------------------------------------------- 7967 ; fclr - flag register clear 7968 ; fset - flag register set 7969 ;------------------------------------------------------------- 7970 7971 (define-pmacro (set-flags-sem flag) 7972 (sequence ((SI tmp)) 7973 (case DFLT flag 7974 ((#x0) (set cbit 1)) 7975 ((#x1) (set dbit 1)) 7976 ((#x2) (set zbit 1)) 7977 ((#x3) (set sbit 1)) 7978 ((#x4) (set bbit 1)) 7979 ((#x5) (set obit 1)) 7980 ((#x6) (set ibit 1)) 7981 ((#x7) (set ubit 1))) 7982 ) 7983 ) 7984 7985 (define-pmacro (clear-flags-sem flag) 7986 (sequence ((SI tmp)) 7987 (case DFLT flag 7988 ((#x0) (set cbit 0)) 7989 ((#x1) (set dbit 0)) 7990 ((#x2) (set zbit 0)) 7991 ((#x3) (set sbit 0)) 7992 ((#x4) (set bbit 0)) 7993 ((#x5) (set obit 0)) 7994 ((#x6) (set ibit 0)) 7995 ((#x7) (set ubit 0))) 7996 ) 7997 ) 7998 7999 (dni fclr16 "fclr flag" ((machine 16)) 8000 ("fclr ${flags16}") 8001 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) flags16 (f-12-4 5)) 8002 (clear-flags-sem flags16) 8003 ()) 8004 8005 (dni fset16 "fset flag" ((machine 16)) 8006 ("fset ${flags16}") 8007 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) flags16 (f-12-4 4)) 8008 (set-flags-sem flags16) 8009 ()) 8010 8011 (dni fclr "fclr" ((machine 32)) 8012 ("fclr ${flags32}") 8013 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 #xE) (f-12-1 1) flags32) 8014 (clear-flags-sem flags32) 8015 ()) 8016 8017 (dni fset "fset" ((machine 32)) 8018 ("fset ${flags32}") 8019 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 #xE) (f-12-1 1) flags32) 8020 (set-flags-sem flags32) 8021 ()) 8022 8023 ;------------------------------------------------------------- 8024 ; inc - increment 8025 ;------------------------------------------------------------- 8026 8027 (define-pmacro (inc-sem mode dest) 8028 (sequence ((mode result)) 8029 (set result (add mode dest 1)) 8030 (set-z-and-s result) 8031 (set dest result)) 8032 ) 8033 8034 (dni inc16.b 8035 "inc.b Dst16-3-S-8" 8036 ((machine 16)) 8037 "inc.b ${Dst16-3-S-8}" 8038 (+ (f-0-4 #xA) (f-4-1 #x0) Dst16-3-S-8) 8039 (inc-sem QI Dst16-3-S-8) 8040 ()) 8041 8042 (dni inc16.w 8043 "inc.w Dst16An-S" 8044 ((machine 16)) 8045 "inc.w ${Dst16An-S}" 8046 (+ (f-0-4 #xB) (f-5-3 #x2) Dst16An-S) 8047 (inc-sem HI Dst16An-S) 8048 ()) 8049 8050 (unary32-defn QI .b 0 inc #xA #x0 #xE inc-sem) 8051 (unary32-defn HI .w 1 inc #xA #x0 #xE inc-sem) 8052 8053 ;------------------------------------------------------------- 8054 ; freit - fast return from interrupt (m32) 8055 ; int - interrupt 8056 ; into - interrupt on overflow 8057 ;------------------------------------------------------------- 8058 8059 ; ??? semantics 8060 (dni freit32 "FREIT" ((machine 32)) 8061 ("freit") 8062 (+ (f-0-4 9) (f-4-4 #xF)) 8063 (nop) 8064 ()) 8065 8066 (dni int16 "int Dsp-10-u6" ((machine 16)) 8067 ("int #${Dsp-10-u6}") 8068 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-2 3) Dsp-10-u6) 8069 (c-call VOID "do_int" pc Dsp-10-u6) 8070 ()) 8071 8072 (dni into16 "into" ((machine 16)) 8073 ("into") 8074 (+ (f-0-4 #xF) (f-4-4 6)) 8075 (nop) 8076 ()) 8077 8078 (dni int32 "int Dsp-8-u6" ((machine 32)) 8079 ("int #${Dsp-8-u6}") 8080 (+ (f-0-4 #xB) (f-4-4 #xE) Dsp-8-u6 (f-14-2 0)) 8081 (c-call VOID "do_int" pc Dsp-8-u6) 8082 ()) 8083 8084 (dni into32 "into" ((machine 32)) 8085 ("into") 8086 (+ (f-0-4 #xB) (f-4-4 #xF)) 8087 (nop) 8088 ()) 8089 8090 ;------------------------------------------------------------- 8091 ; index (m32c) 8092 ;------------------------------------------------------------- 8093 8094 ; TODO add support to insns allowing index 8095 (define-pmacro (indexb-sem mode d) (set SrcIndex d) (set DstIndex d)) 8096 (define-pmacro (indexbd-sem mode d) (set SrcIndex (const 0)) (set DstIndex d)) 8097 (define-pmacro (indexbs-sem mode d) (set SrcIndex d) (set DstIndex (const 0))) 8098 (define-pmacro (indexw-sem mode d) 8099 (set SrcIndex (sll d (const 2))) (set DstIndex (sll d (const 2)))) 8100 (define-pmacro (indexwd-sem mode d) 8101 (set SrcIndex (const 0)) (set DstIndex (sll d (const 2)))) 8102 (define-pmacro (indexws-sem mode d) 8103 (set SrcIndex (sll d (const 2))) (set DstIndex (const 0))) 8104 (define-pmacro (indexl-sem mode d) 8105 (set SrcIndex d) (set DstIndex (sll d (const 2)))) 8106 (define-pmacro (indexld-sem mode d) 8107 (set SrcIndex (const 0)) (set DstIndex (sll d (const 2)))) 8108 (define-pmacro (indexls-sem mode d) 8109 (set SrcIndex (sll d (const 2))) (set DstIndex (const 0))) 8110 8111 ; Note that "wbit" not where the size bit goes here, hence, it's 8112 ; always 0 in these calls but op2 differs instead. 8113 8114 ; indexb src (index byte) 8115 (unary32-defn QI .b 0 indexb #x8 0 #x3 indexb-sem) 8116 (unary32-defn HI .w 0 indexb #x8 1 #x3 indexb-sem) 8117 ; indexbd src (index byte dest) 8118 (unary32-defn QI .b 0 indexbd #xA 0 3 indexbd-sem) 8119 (unary32-defn HI .w 0 indexbd #xA 1 3 indexbd-sem) 8120 ; indexbs src (index byte src) 8121 (unary32-defn QI .b 0 indexbs #xC 0 3 indexbs-sem) 8122 (unary32-defn HI .w 0 indexbs #xC 1 3 indexbs-sem) 8123 ; indexl src (index long) 8124 (unary32-defn QI .b 0 indexl 9 2 3 indexl-sem) 8125 (unary32-defn HI .w 0 indexl 9 3 3 indexl-sem) 8126 ; indexld src (index long dest) 8127 (unary32-defn QI .b 0 indexld #xB 2 3 indexld-sem) 8128 (unary32-defn HI .w 0 indexld #xB 3 3 indexld-sem) 8129 ; indexls src (index long src) 8130 (unary32-defn QI .b 0 indexls 9 0 3 indexls-sem) 8131 (unary32-defn HI .w 0 indexls 9 1 3 indexls-sem) 8132 ; indexw src (index word) 8133 (unary32-defn QI .b 0 indexw 8 2 3 indexw-sem) 8134 (unary32-defn HI .w 0 indexw 8 3 3 indexw-sem) 8135 ; indexwd src (index word dest) 8136 (unary32-defn QI .b 0 indexwd #xA 2 3 indexwd-sem) 8137 (unary32-defn HI .w 0 indexwd #xA 3 3 indexwd-sem) 8138 ; indexws (index word src) 8139 (unary32-defn QI .b 0 indexws #xC 2 3 indexws-sem) 8140 (unary32-defn HI .w 0 indexws #xC 3 3 indexws-sem) 8141 8142 ;------------------------------------------------------------- 8143 ; jcc - jump on condition 8144 ;------------------------------------------------------------- 8145 8146 (define-pmacro (jcnd32-sem cnd label) 8147 (sequence () 8148 (case DFLT cnd 8149 ((#x00) (if (not cbit) (set pc label))) ;ltu nc 8150 ((#x01) (if (not (and cbit (not zbit))) (set pc label))) ;leu 8151 ((#x02) (if (not zbit) (set pc label))) ;ne nz 8152 ((#x03) (if (not sbit) (set pc label))) ;pz 8153 ((#x04) (if (not obit) (set pc label))) ;no 8154 ((#x05) (if (not (or zbit (xor sbit obit))) (set pc label))) ;gt 8155 ((#x06) (if (not (xor sbit obit)) (set pc label))) ;ge 8156 ((#x08) (if (trunc BI cbit) (set pc label))) ;geu c 8157 ((#x09) (if (and cbit (not zbit)) (set pc label))) ;gtu 8158 ((#x0a) (if (trunc BI zbit) (set pc label))) ;eq z 8159 ((#x0b) (if (trunc BI sbit) (set pc label))) ;n 8160 ((#x0c) (if (trunc BI obit) (set pc label))) ;o 8161 ((#x0d) (if (or zbit (xor sbit obit)) (set pc label))) ;le 8162 ((#x0e) (if (xor sbit obit) (set pc label))) ;lt 8163 ) 8164 ) 8165 ) 8166 8167 (define-pmacro (jcnd16-sem cnd label) 8168 (sequence () 8169 (case DFLT cnd 8170 ((#x00) (if (trunc BI cbit) (set pc label))) ;geu c 8171 ((#x01) (if (and cbit (not zbit)) (set pc label))) ;gtu 8172 ((#x02) (if (trunc BI zbit) (set pc label))) ;eq z 8173 ((#x03) (if (trunc BI sbit) (set pc label))) ;n 8174 ((#x04) (if (not cbit) (set pc label))) ;ltu nc 8175 ((#x05) (if (not (and cbit (not zbit))) (set pc label))) ;leu 8176 ((#x06) (if (not zbit) (set pc label))) ;ne nz 8177 ((#x07) (if (not sbit) (set pc label))) ;pz 8178 ((#x08) (if (or zbit (xor sbit obit)) (set pc label))) ;le 8179 ((#x09) (if (trunc BI obit) (set pc label))) ;o 8180 ((#x0a) (if (not (xor sbit obit)) (set pc label))) ;ge 8181 ((#x0c) (if (not (or zbit (xor sbit obit))) (set pc label))) ;gt 8182 ((#x0d) (if (not obit) (set pc label))) ;no 8183 ((#x0e) (if (xor sbit obit) (set pc label))) ;lt 8184 ) 8185 ) 8186 ) 8187 8188 (dni jcnd16-5 8189 "jCnd label" 8190 (RL_JUMP RELAXABLE (machine 16)) 8191 "j$cond16j5 ${Lab-8-8}" 8192 (+ (f-0-4 #x6) (f-4-1 1) cond16j5 Lab-8-8) 8193 (jcnd16-sem cond16j5 Lab-8-8) 8194 () 8195 ) 8196 8197 (dni jcnd16 8198 "jCnd label" 8199 (RL_JUMP RELAXABLE (machine 16)) 8200 "j$cond16j ${Lab-16-8}" 8201 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xC) cond16j Lab-16-8) 8202 (jcnd16-sem cond16j Lab-16-8) 8203 () 8204 ) 8205 8206 (dni jcnd32 8207 "jCnd label" 8208 (RL_JUMP RELAXABLE (machine 32)) 8209 "j$cond32j ${Lab-8-8}" 8210 (+ (f-0-1 1) (f-4-3 5) cond32j Lab-8-8) 8211 (jcnd32-sem cond32j Lab-8-8) 8212 () 8213 ) 8214 8215 ;------------------------------------------------------------- 8216 ; jmp - jump 8217 ;------------------------------------------------------------- 8218 8219 ; jmp.s label3 (m16 #1) 8220 (dni jmp16.s "jmp.s Lab-5-3" (RL_JUMP RELAXABLE (machine 16)) 8221 ("jmp.s ${Lab-5-3}") 8222 (+ (f-0-4 6) (f-4-1 0) Lab-5-3) 8223 (sequence () (set pc Lab-5-3)) 8224 ()) 8225 ; jmp.b label8 (m16 #2) 8226 (dni jmp16.b "jmp.b Lab-8-8" (RL_JUMP RELAXABLE (machine 16)) 8227 ("jmp.b ${Lab-8-8}") 8228 (+ (f-0-4 #xF) (f-4-4 #xE) Lab-8-8) 8229 (sequence () (set pc Lab-8-8)) 8230 ()) 8231 ; jmp.w label16 (m16 #3) 8232 (dni jmp16.w "jmp.w Lab-8-16" (RL_JUMP RELAXABLE (machine 16)) 8233 ("jmp.w ${Lab-8-16}") 8234 (+ (f-0-4 #xF) (f-4-4 4) Lab-8-16) 8235 (sequence () (set pc Lab-8-16)) 8236 ()) 8237 ; jmp.a label24 (m16 #4) 8238 (dni jmp16.a "jmp.a Lab-8-24" (RL_JUMP RELAXABLE (machine 16)) 8239 ("jmp.a ${Lab-8-24}") 8240 (+ (f-0-4 #xF) (f-4-4 #xC) Lab-8-24) 8241 (sequence () (set pc Lab-8-24)) 8242 ()) 8243 8244 (define-pmacro (jmp16-sem mode dst) 8245 (set pc (and dst #xfffff)) 8246 ) 8247 (define-pmacro (jmp32-sem mode dst) 8248 (set pc dst) 8249 ) 8250 ; jmpi.w dst (m16 #1 m32 #2) 8251 (unary-insn-defn 16 16 HI .w jmpi (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 2) dst16-16-HI) jmp16-sem) 8252 (unary-insn-defn 32 16-Unprefixed HI .w jmpi (+ (f-0-4 #xC) (f-7-1 1) dst32-16-Unprefixed-HI (f-10-2 #x0) (f-12-4 #xF)) jmp32-sem) 8253 ; jmpi.a dst (m16 #2 m32 #2) 8254 (unary-insn-defn 16 16 SI .a jmpi (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 0) dst16-16-SI) jmp16-sem) 8255 (unary-insn-defn 32 16-Unprefixed SI .a jmpi (+ (f-0-4 #x8) (f-7-1 0) dst32-16-Unprefixed-SI (f-10-2 #x0) (f-12-4 1)) jmp32-sem) 8256 ; jmps imm8 (m16 #1) 8257 (dni jmps16 "jmps Imm-8-QI" ((machine 16)) 8258 ("jmps #${Imm-8-QI}") 8259 (+ (f-0-4 #xE) (f-4-4 #xE) Imm-8-QI) 8260 (sequence () (set pc Imm-8-QI)) 8261 ()) 8262 ; jmp.s label3 (m32 #1) 8263 (dni jmp32.s 8264 "jmp.s label" 8265 (RL_JUMP RELAXABLE (machine 32)) 8266 "jmp.s ${Lab32-jmp-s}" 8267 (+ (f-0-2 1) (f-4-3 5) Lab32-jmp-s) 8268 (set pc Lab32-jmp-s) 8269 () 8270 ) 8271 ; jmp.b label8 (m32 #2) 8272 (dni jmp32.b "jmp.b Lab-8-8" (RL_JUMP RELAXABLE (machine 32)) 8273 ("jmp.b ${Lab-8-8}") 8274 (+ (f-0-4 #xB) (f-4-4 #xB) Lab-8-8) 8275 (set pc Lab-8-8) 8276 ()) 8277 ; jmp.w label16 (m32 #3) 8278 (dni jmp32.w "jmp.w Lab-8-16" (RL_JUMP RELAXABLE (machine 32)) 8279 ("jmp.w ${Lab-8-16}") 8280 (+ (f-0-4 #xC) (f-4-4 #xE) Lab-8-16) 8281 (set pc Lab-8-16) 8282 ()) 8283 ; jmp.a label24 (m32 #4) 8284 (dni jmp32.a "jmp.a Lab-8-24" (RL_JUMP RELAXABLE (machine 32)) 8285 ("jmp.a ${Lab-8-24}") 8286 (+ (f-0-4 #xC) (f-4-4 #xC) Lab-8-24) 8287 (set pc Lab-8-24) 8288 ()) 8289 ; jmp.s imm8 (m32 #1) 8290 (dni jmps32 "jmps Imm-8-QI" (RL_JUMP (machine 32)) 8291 ("jmps #${Imm-8-QI}") 8292 (+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI) 8293 (set pc Imm-8-QI) 8294 ()) 8295 8296 ;------------------------------------------------------------- 8297 ; jsr jump subroutine 8298 ;------------------------------------------------------------- 8299 8300 (define-pmacro (jsr16-sem length dst) 8301 (sequence ((SI tpc)) 8302 (set tpc (add pc length)) 8303 (set (reg h-sp) (sub (reg h-sp) 2)) 8304 (set (mem16 HI (reg h-sp)) (srl (and tpc #xffff00) 8)) 8305 (set (reg h-sp) (sub (reg h-sp) 1)) 8306 (set (mem16 QI (reg h-sp)) (and tpc #xff)) 8307 (set pc dst) 8308 ) 8309 ) 8310 (define-pmacro (jsr32-sem length dst) 8311 (sequence ((SI tpc)) 8312 (set tpc (add pc length)) 8313 (set (reg h-sp) (sub (reg h-sp) 2)) 8314 (set (mem32 HI (reg h-sp)) (srl (and tpc #xffff0000) 16)) 8315 (set (reg h-sp) (sub (reg h-sp) 2)) 8316 (set (mem32 HI (reg h-sp)) (and tpc #xffff)) 8317 (set pc dst) 8318 ) 8319 ) 8320 8321 ; jsr.w label16 (m16 #1) 8322 (dni jsr16.w "jsr.w Lab-8-16" (RL_JUMP RELAXABLE (machine 16)) 8323 ("jsr.w ${Lab-8-16}") 8324 (+ (f-0-4 #xF) (f-4-4 5) Lab-8-16) 8325 (jsr16-sem 3 Lab-8-16) 8326 ()) 8327 ; jsr.a label24 (m16 #2) 8328 (dni jsr16.a "jsr.a Lab-8-24" (RL_JUMP RELAXABLE (machine 16)) 8329 ("jsr.a ${Lab-8-24}") 8330 (+ (f-0-4 #xF) (f-4-4 #xD) Lab-8-24) 8331 (jsr16-sem 4 Lab-8-24) 8332 ()) 8333 (define-pmacro (jsri-defn mode op16 op16-1 op16-2 op16-3 op16-sem 8334 op32 op32-1 op32-2 op32-3 op32-4 op32-sem len) 8335 (begin 8336 (dni (.sym jsri16 mode - op16) 8337 (.str "jsri." mode " " op16) 8338 (RL_1ADDR (machine 16)) 8339 (.str "jsri." mode " ${" op16 "}") 8340 (+ op16-1 op16-2 op16-3 op16) 8341 (op16-sem len op16) 8342 ()) 8343 (dni (.sym jsri32 mode - op32) 8344 (.str "jsri." mode " " op32) 8345 (RL_1ADDR (machine 32)) 8346 (.str "jsri." mode " ${" op32 "}") 8347 (+ op32-1 op32-2 op32-3 op32-4 op32) 8348 (op32-sem len op32) 8349 ()) 8350 ) 8351 ) 8352 ; jsri.w dst (m16 #1 m32 #1)) 8353 (jsri-defn w dst16-16-20ar-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem 8354 dst32-16-24-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 4) 8355 (jsri-defn w dst16-16-16sa-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem 8356 dst32-16-16sa-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 4) 8357 (jsri-defn w dst16-16-8-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem 8358 dst32-16-8-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 3) 8359 (jsri-defn w dst16-basic-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem 8360 dst32-basic-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 2) 8361 8362 ; jsri.a (m16 #2 m32 #2) 8363 (jsri-defn a dst16-16-20ar-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem 8364 dst32-16-24-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 4) 8365 (jsri-defn a dst16-16-8-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem 8366 dst32-16-8-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 3) 8367 (jsri-defn a dst16-16-16sa-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem 8368 dst32-16-16sa-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 4) 8369 (jsri-defn a dst16-basic-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem 8370 dst32-basic-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 2) 8371 8372 (dni jsri32.a "jsr.w dst32-16-24-Unprefixed-HI" (RL_1ADDR (machine 32)) 8373 ("jsri.a ${dst32-16-24-Unprefixed-SI}") 8374 (+ (f-0-4 #x9) (f-7-1 0) dst32-16-24-Unprefixed-SI (f-10-2 #x0) (f-12-4 #x1)) 8375 (jsr32-sem 6 dst32-16-24-Unprefixed-SI) 8376 ()) 8377 ; jsr.w label16 (m32 #1) 8378 (dni jsr32.w "jsr.w label" (RL_JUMP RELAXABLE (machine 32)) 8379 ("jsr.w ${Lab-8-16}") 8380 (+ (f-0-4 #xC) (f-4-4 #xF) Lab-8-16) 8381 (jsr32-sem 3 Lab-8-16) 8382 ()) 8383 ; jsr.a label16 (m32 #2) 8384 (dni jsr32.a "jsr.a label" (RL_JUMP (machine 32)) 8385 ("jsr.a ${Lab-8-24}") 8386 (+ (f-0-4 #xC) (f-4-4 #xD) Lab-8-24) 8387 (jsr32-sem 4 Lab-8-24) 8388 ()) 8389 ; jsrs imm8 (m16 #1) 8390 (dni jsrs16 "jsrs Imm-8-QI" ((machine 16)) 8391 ("jsrs #${Imm-8-QI}") 8392 (+ (f-0-4 #xE) (f-4-4 #xF) Imm-8-QI) 8393 (jsr16-sem 2 Imm-8-QI) 8394 ()) 8395 ; jsrs imm8 (m32 #1) 8396 (dni jsrs "jsrs #Imm-8-QI" ((machine 32)) 8397 ("jsrs #${Imm-8-QI}") 8398 (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI) 8399 (jsr32-sem 2 Imm-8-QI) 8400 ()) 8401 8402 ;------------------------------------------------------------- 8403 ; ldc - load control register 8404 ; stc - store control register 8405 ;------------------------------------------------------------- 8406 8407 (define-pmacro (ldc32-cr1-sem src dst) 8408 (sequence () 8409 (case DFLT dst 8410 ((#x0) (set (reg h-dct0) src)) 8411 ((#x1) (set (reg h-dct1) src)) 8412 ((#x2) (sequence ((HI tflag)) 8413 (set tflag src) 8414 (if (and tflag #x1) (set cbit 1)) 8415 (if (and tflag #x2) (set dbit 1)) 8416 (if (and tflag #x4) (set zbit 1)) 8417 (if (and tflag #x8) (set sbit 1)) 8418 (if (and tflag #x10) (set bbit 1)) 8419 (if (and tflag #x20) (set obit 1)) 8420 (if (and tflag #x40) (set ibit 1)) 8421 (if (and tflag #x80) (set ubit 1)))) 8422 ((#x3) (set (reg h-svf) src)) 8423 ((#x4) (set (reg h-drc0) src)) 8424 ((#x5) (set (reg h-drc1) src)) 8425 ((#x6) (set (reg h-dmd0) src)) 8426 ((#x7) (set (reg h-dmd1) src)) 8427 ) 8428 ) 8429 ) 8430 (define-pmacro (ldc32-cr2-sem src dst) 8431 (sequence () 8432 (case DFLT dst 8433 ((#x0) (set (reg h-intb) src)) 8434 ((#x1) (set (reg h-sp) src)) 8435 ((#x2) (set (reg h-sb) src)) 8436 ((#x3) (set (reg h-fb) src)) 8437 ((#x4) (set (reg h-svp) src)) 8438 ((#x5) (set (reg h-vct) src)) 8439 ((#x7) (set (reg h-isp) src)) 8440 ) 8441 ) 8442 ) 8443 (define-pmacro (ldc32-cr3-sem src dst) 8444 (sequence () 8445 (case DFLT dst 8446 ((#x2) (set (reg h-dma0) src)) 8447 ((#x3) (set (reg h-dma1) src)) 8448 ((#x4) (set (reg h-dra0) src)) 8449 ((#x5) (set (reg h-dra1) src)) 8450 ((#x6) (set (reg h-dsa0) src)) 8451 ((#x7) (set (reg h-dsa1) src)) 8452 ) 8453 ) 8454 ) 8455 (define-pmacro (ldc16-sem src dst) 8456 (sequence () 8457 (case DFLT dst 8458 ((#x1) (set (reg h-intb) src)) 8459 ((#x2) (set (reg h-intb) (or (reg h-intb) (sll src (const 16))))) 8460 ((#x3) (sequence ((HI tflag)) 8461 (set tflag src) 8462 (if (and tflag #x1) (set cbit 1)) 8463 (if (and tflag #x2) (set dbit 1)) 8464 (if (and tflag #x4) (set zbit 1)) 8465 (if (and tflag #x8) (set sbit 1)) 8466 (if (and tflag #x10) (set bbit 1)) 8467 (if (and tflag #x20) (set obit 1)) 8468 (if (and tflag #x40) (set ibit 1)) 8469 (if (and tflag #x80) (set ubit 1)))) 8470 ((#x4) (set (reg h-isp) src)) 8471 ((#x5) (set (reg h-sp) src)) 8472 ((#x6) (set (reg h-sb) src)) 8473 ((#x7) (set (reg h-fb) src)) 8474 ) 8475 ) 8476 ) 8477 8478 (define-pmacro (stc32-cr1-sem src dst) 8479 (sequence () 8480 (case DFLT src 8481 ((#x0) (set dst (reg h-dct0))) 8482 ((#x1) (set dst (reg h-dct1))) 8483 ((#x2) (sequence ((HI tflag)) 8484 (set tflag 0) 8485 (if (eq cbit 1) (set tflag (or tflag #x1))) 8486 (if (eq dbit 1) (set tflag (or tflag #x2))) 8487 (if (eq zbit 1) (set tflag (or tflag #x4))) 8488 (if (eq sbit 1) (set tflag (or tflag #x8))) 8489 (if (eq bbit 1) (set tflag (or tflag #x10))) 8490 (if (eq obit 1) (set tflag (or tflag #x20))) 8491 (if (eq ibit 1) (set tflag (or tflag #x40))) 8492 (if (eq ubit 1) (set tflag (or tflag #x80))) 8493 (set dst tflag))) 8494 ((#x3) (set dst (reg h-svf))) 8495 ((#x4) (set dst (reg h-drc0))) 8496 ((#x5) (set dst (reg h-drc1))) 8497 ((#x6) (set dst (reg h-dmd0))) 8498 ((#x7) (set dst (reg h-dmd1))) 8499 ) 8500 ) 8501 ) 8502 (define-pmacro (stc32-cr2-sem src dst) 8503 (sequence () 8504 (case DFLT src 8505 ((#x0) (set dst (reg h-intb))) 8506 ((#x1) (set dst (reg h-sp))) 8507 ((#x2) (set dst (reg h-sb))) 8508 ((#x3) (set dst (reg h-fb))) 8509 ((#x4) (set dst (reg h-svp))) 8510 ((#x5) (set dst (reg h-vct))) 8511 ((#x7) (set dst (reg h-isp))) 8512 ) 8513 ) 8514 ) 8515 (define-pmacro (stc32-cr3-sem src dst) 8516 (sequence () 8517 (case DFLT src 8518 ((#x2) (set dst (reg h-dma0))) 8519 ((#x3) (set dst (reg h-dma1))) 8520 ((#x4) (set dst (reg h-dra0))) 8521 ((#x5) (set dst (reg h-dra1))) 8522 ((#x6) (set dst (reg h-dsa0))) 8523 ((#x7) (set dst (reg h-dsa1))) 8524 ) 8525 ) 8526 ) 8527 (define-pmacro (stc16-sem src dst) 8528 (sequence () 8529 (case DFLT src 8530 ((#x1) (set dst (and (reg h-intb) (const #xffff)))) 8531 ((#x2) (set dst (srl (reg h-intb) (const 16)))) 8532 ((#x3) (sequence ((HI tflag)) 8533 (set tflag 0) 8534 (if (eq cbit 1) (set tflag (or tflag #x1))) 8535 (if (eq dbit 1) (set tflag (or tflag #x2))) 8536 (if (eq zbit 1) (set tflag (or tflag #x4))) 8537 (if (eq sbit 1) (set tflag (or tflag #x8))) 8538 (if (eq bbit 1) (set tflag (or tflag #x10))) 8539 (if (eq obit 1) (set tflag (or tflag #x20))) 8540 (if (eq ibit 1) (set tflag (or tflag #x40))) 8541 (if (eq ubit 1) (set tflag (or tflag #x80))) 8542 (set dst tflag))) 8543 ((#x4) (set dst (reg h-isp))) 8544 ((#x5) (set dst (reg h-sp))) 8545 ((#x6) (set dst (reg h-sb))) 8546 ((#x7) (set dst (reg h-fb))) 8547 ) 8548 ) 8549 ) 8550 8551 (dni ldc16.imm16 "ldc #imm,dst" ((machine 16)) 8552 ("ldc #${Imm-16-HI},${cr16}") 8553 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 0) cr16 Imm-16-HI) 8554 (ldc16-sem Imm-16-HI cr16) 8555 ()) 8556 8557 (dni ldc16.dst "ldc src,dest" ((machine 16)) 8558 ("ldc ${dst16-16-HI},${cr16}") 8559 (+ (f-0-4 7) (f-4-4 #xA) (f-8-1 1) cr16 dst16-16-HI) 8560 (ldc16-sem dst16-16-HI cr16) 8561 ()) 8562 ; ldc src,dest (m32c #4) 8563 (dni ldc32.src-cr1 "ldc src,dst" ((machine 32)) 8564 ("ldc ${dst32-24-Prefixed-HI},${cr1-Prefixed-32}") 8565 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-HI (f-15-1 1) (f-18-2 0) (f-20-1 1) cr1-Prefixed-32) 8566 (ldc32-cr1-sem dst32-24-Prefixed-HI cr1-Prefixed-32) 8567 ()) 8568 ; ldc src,dest (m32c #5) 8569 (dni ldc32.src-cr2 "ldc src,dest" ((machine 32)) 8570 ("ldc ${dst32-16-Unprefixed-SI},${cr2-32}") 8571 (+ (f-0-4 #xD) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 0) (f-12-1 0) cr2-32) 8572 (ldc32-cr2-sem dst32-16-Unprefixed-SI cr2-32) 8573 ()) 8574 ; ldc src,dest (m32c #6) 8575 (dni ldc32.src-cr3 "ldc src,dst" ((machine 32)) 8576 ("ldc ${dst32-24-Prefixed-SI},${cr3-Prefixed-32}") 8577 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-SI (f-15-1 1) (f-18-2 0) (f-20-1 0) cr3-Prefixed-32) 8578 (ldc32-cr3-sem dst32-24-Prefixed-SI cr3-Prefixed-32) 8579 ()) 8580 ; ldc src,dest (m32c #1) 8581 (dni ldc32.imm16-cr1 "ldc #imm,dst" ((machine 32)) 8582 ("ldc #${Imm-16-HI},${cr1-Unprefixed-32}") 8583 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32 Imm-16-HI) 8584 (ldc32-cr1-sem Imm-16-HI cr1-Unprefixed-32) 8585 ()) 8586 ; ldc src,dest (m32c #2) 8587 (dni ldc32.imm16-cr2 "ldc #imm,dst" ((machine 32)) 8588 ("ldc #${Dsp-16-u24},${cr2-32}") 8589 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 2) (f-12-1 1) cr2-32 Dsp-16-u24) 8590 (ldc32-cr2-sem Dsp-16-u24 cr2-32) 8591 ()) 8592 ; ldc src,dest (m32c #3) 8593 (dni ldc32.imm16-cr3 "ldc #imm,dst" ((machine 32)) 8594 ("ldc #${Dsp-16-u24},${cr3-Unprefixed-32}") 8595 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 6) (f-12-1 1) cr3-Unprefixed-32 Dsp-16-u24) 8596 (ldc32-cr3-sem Dsp-16-u24 cr3-Unprefixed-32) 8597 ()) 8598 8599 (dni stc16.src "stc src,dest" ((machine 16)) 8600 ("stc ${cr16},${dst16-16-HI}") 8601 (+ (f-0-4 7) (f-4-4 #xB) (f-8-1 1) cr16 dst16-16-HI) 8602 (stc16-sem cr16 dst16-16-HI ) 8603 ()) 8604 8605 (dni stc16.pc "stc pc,dest" ((machine 16)) 8606 ("stc pc,${dst16-16-HI}") 8607 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xC) dst16-16-HI) 8608 (sequence () (set dst16-16-HI (reg h-pc))) 8609 ()) 8610 8611 (dni stc32.src-cr1 "stc src,dst" ((machine 32)) 8612 ("stc ${cr1-Prefixed-32},${dst32-24-Prefixed-HI}") 8613 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-HI (f-15-1 1) (f-18-2 1) (f-20-1 1) cr1-Prefixed-32) 8614 (stc32-cr1-sem cr1-Prefixed-32 dst32-24-Prefixed-HI ) 8615 ()) 8616 8617 (dni stc32.src-cr2 "stc src,dest" ((machine 32)) 8618 ("stc ${cr2-32},${dst32-16-Unprefixed-SI}") 8619 (+ (f-0-4 #xD) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 0) (f-12-1 2) cr2-32) 8620 (stc32-cr2-sem cr2-32 dst32-16-Unprefixed-SI ) 8621 ()) 8622 8623 (dni stc32.src-cr3 "stc src,dst" ((machine 32)) 8624 ("stc ${cr3-Prefixed-32},${dst32-24-Prefixed-SI}") 8625 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-SI (f-15-1 1) (f-18-2 1) (f-20-1 0) cr3-Prefixed-32) 8626 (stc32-cr3-sem cr3-Prefixed-32 dst32-24-Prefixed-SI ) 8627 ()) 8628 8629 ;------------------------------------------------------------- 8630 ; ldctx - load context 8631 ; stctx - store context 8632 ;------------------------------------------------------------- 8633 8634 ; ??? semantics 8635 (dni ldctx16 "ldctx abs16,abs24" ((machine 16)) 8636 ("ldctx ${Dsp-16-u16},${Dsp-32-u24}") 8637 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 #x0) Dsp-16-u16 Dsp-32-u24) 8638 (nop) 8639 ()) 8640 (dni ldctx32 "ldctx abs16,abs24" ((machine 32)) 8641 ("ldctx ${Dsp-16-u16},${Dsp-32-u24}") 8642 (+ (f-0-4 #xB) (f-4-4 #x6) (f-8-4 #xC) (f-12-4 #x3) Dsp-16-u16 Dsp-32-u24) 8643 (nop) 8644 ()) 8645 (dni stctx16 "stctx abs16,abs24" ((machine 16)) 8646 ("stctx ${Dsp-16-u16},${Dsp-32-u24}") 8647 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 #x0) Dsp-16-u16 Dsp-32-u24) 8648 (nop) 8649 ()) 8650 (dni stctx32 "stctx abs16,abs24" ((machine 32)) 8651 ("stctx ${Dsp-16-u16},${Dsp-32-u24}") 8652 (+ (f-0-4 #xB) (f-4-4 #x6) (f-8-4 #xD) (f-12-4 #x3) Dsp-16-u16 Dsp-32-u24) 8653 (nop) 8654 ()) 8655 8656 ;------------------------------------------------------------- 8657 ; lde - load from extra far data area (m16) 8658 ; ste - store to extra far data area (m16) 8659 ;------------------------------------------------------------- 8660 8661 (lde-dst QI .b 0) 8662 (lde-dst HI .w 1) 8663 8664 (ste-dst QI .b 0) 8665 (ste-dst HI .w 1) 8666 8667 ;------------------------------------------------------------- 8668 ; ldipl - load interrupt permission level 8669 ;------------------------------------------------------------- 8670 8671 ; ??? semantics 8672 ; ldintb <==> ldc #imm,intbh ; ldc #imm,intbl 8673 8674 (dni ldipl16.imm "ldipl #imm" ((machine 16)) 8675 ("ldipl #${Imm-13-u3}") 8676 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xA) (f-12-1 0) Imm-13-u3) 8677 (nop) 8678 ()) 8679 (dni ldipl32.imm "ldipl #imm" ((machine 32)) 8680 ("ldipl #${Imm-13-u3}") 8681 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 #xE) (f-12-1 1) Imm-13-u3) 8682 (nop) 8683 ()) 8684 8685 8686 ;------------------------------------------------------------- 8687 ; max - maximum value 8688 ;------------------------------------------------------------- 8689 8690 ; TODO check semantics for min -1,0 8691 (define-pmacro (max-sem mode src dst) 8692 (sequence () 8693 (if (gt mode src dst) 8694 (set mode dst src))) 8695 ) 8696 8697 ; max.size:G #imm,dst 8698 (binary-arith32-imm-dst-Prefixed QI QI .b 0 max X #x8 #x3 #xF max-sem) 8699 (binary-arith32-imm-dst-Prefixed HI HI .w 1 max X #x8 #x3 #xF max-sem) 8700 8701 ; max.BW:G src,dst 8702 (binary-arith32-src-dst-Prefixed QI QI .b 0 max X #x1 #xD max-sem) 8703 (binary-arith32-src-dst-Prefixed HI HI .w 1 max X #x1 #xD max-sem) 8704 8705 ;------------------------------------------------------------- 8706 ; min - minimum value 8707 ;------------------------------------------------------------- 8708 8709 (define-pmacro (min-sem mode src dst) 8710 (sequence () 8711 (if (lt mode src dst) 8712 (set mode dst src))) 8713 ) 8714 8715 ; min.size:G #imm,dst 8716 (binary-arith32-imm-dst-Prefixed QI QI .b 0 min X #x8 #x2 #xF min-sem) 8717 (binary-arith32-imm-dst-Prefixed HI HI .w 1 min X #x8 #x2 #xF min-sem) 8718 8719 ; min.BW:G src,dst 8720 (binary-arith32-src-dst-Prefixed QI QI .b 0 min X #x1 #xC min-sem) 8721 (binary-arith32-src-dst-Prefixed HI HI .w 1 min X #x1 #xC min-sem) 8722 8723 ;------------------------------------------------------------- 8724 ; mov - move 8725 ;------------------------------------------------------------- 8726 8727 (define-pmacro (mov-sem mode src1 dst) 8728 (sequence ((mode result)) 8729 (set result src1) 8730 (set-z-and-s result) 8731 (set mode dst src1)) 8732 ) 8733 8734 (define-pmacro (mov-dspsp-dst-sem mach mode src1 dst) 8735 (set dst (mem-mach mach mode (add sp src1))) 8736 ) 8737 8738 (define-pmacro (mov-src-dspsp-sem mach mode src dst1) 8739 (set (mem-mach mach mode (add sp dst1)) src) 8740 ) 8741 8742 (define-pmacro (mov16-imm-an-defn size mode imm regn op1 op2) 8743 (dni (.sym mov16. size .S-imm- regn) 8744 (.str "mov." size ":S " imm "," regn) 8745 ((machine 16)) 8746 (.str "mov." size "$S #${" imm "}," regn) 8747 (+ op1 op2 imm) 8748 (mov-sem mode imm (reg (.sym h- regn))) 8749 ()) 8750 ) 8751 ; mov.size:G #imm,dst (m16 #1 m32 #1) 8752 (binary-arith-imm-dst mov G (f-0-4 7) (f-4-3 2) (f-8-4 #xC) #x9 #x2 #xF mov-sem) 8753 ; mov.L:G #imm32,dst (m32 #2) 8754 (binary-arith32-imm-dst-defn SI SI .l 0 mov G #xB #x3 #x1 mov-sem) 8755 ; mov.BW:S #imm,dst2 (m32 #4) 8756 (binary-arith32-s-imm-dst QI .b 0 mov #x0 #x2 mov-sem) 8757 (binary-arith32-s-imm-dst HI .w 1 mov #x0 #x2 mov-sem) 8758 ; mov.b:S #imm8,dst3 (m16 #3) 8759 (binary-arith16-b-S-imm8-dst3 mov ".b" (f-0-4 #xC) (f-4-1 0) mov-sem) 8760 ; mov.b:S #imm8,aN (m16 #4) 8761 (mov16-imm-an-defn b QI Imm-8-QI a0 (f-0-4 #xE) (f-4-4 2)) 8762 (mov16-imm-an-defn b QI Imm-8-QI a1 (f-0-4 #xE) (f-4-4 #xA)) 8763 (mov16-imm-an-defn w HI Imm-8-HI a0 (f-0-4 #xA) (f-4-4 2)) 8764 (mov16-imm-an-defn w HI Imm-8-HI a1 (f-0-4 #xA) (f-4-4 #xA)) 8765 ; mov.WL:S #imm,A0/A1 (m32 #5) 8766 (define-pmacro (mov32-wl-s-defn mode sz op1 imm regn op2) 8767 (dni (.sym mov32- sz - regn) 8768 (.str "mov." sz ":s" imm "," regn) 8769 ((machine 32)) 8770 (.str "mov." sz "$S #${" imm "}," regn) 8771 (+ (f-0-4 op1) (f-4-4 op2) imm) 8772 (mov-sem mode imm (reg (.sym h- regn))) 8773 ()) 8774 ) 8775 (mov32-wl-s-defn HI w #x9 Imm-8-HI a0 #xC) 8776 (mov32-wl-s-defn HI w #x9 Imm-8-HI a1 #xD) 8777 (mov32-wl-s-defn SI l #xB Dsp-8-s24 a0 #xC) 8778 (mov32-wl-s-defn SI l #xB Dsp-8-s24 a1 #xD) 8779 8780 ; mov.size:Q #imm4,dst (m16 #2 m32 #3) 8781 (binary-arith16-imm4-dst-defn QI .b 0 0 mov (f-0-4 #xD) (f-4-3 4) mov-sem) 8782 (binary-arith16-imm4-dst-defn HI .w 0 1 mov (f-0-4 #xD) (f-4-3 4) mov-sem) 8783 (binary-arith32-imm4-dst-defn QI .b 1 0 mov #x7 #x2 mov-sem) 8784 (binary-arith32-imm4-dst-defn HI .w 1 1 mov #x7 #x2 mov-sem) 8785 8786 ; mov.BW:Z #0,dst (m16 #5 m32 #6) 8787 (dni mov16.b-Z-imm8-dst3 8788 "mov.b:Z #0,Dst16-3-S-8" 8789 ((machine 16)) 8790 "mov.b$Z #0,${Dst16-3-S-8}" 8791 (+ (f-0-4 #xB) (f-4-1 #x0) Dst16-3-S-8) 8792 (mov-sem QI (const 0) Dst16-3-S-8) 8793 ()) 8794 ; (binary-arith16-b-Z-imm8-dst3 mov ".b" (f-0-4 #xB) (f-4-1 0) mov-sem) 8795 (binary-arith32-z-imm-dst QI .b 0 mov #x0 #x1 mov-sem) 8796 (binary-arith32-z-imm-dst HI .w 1 mov #x0 #x1 mov-sem) 8797 ; mov.BW:G src,dst (m16 #6 m32 #7) 8798 (binary-arith-src-dst mov G (f-0-4 #x7) (f-4-3 1) #x1 #xB mov-sem) 8799 ; mov.B:S src2,a0/a1 (m16 #7) 8800 (dni (.sym mov 16 .b.S-An) 8801 (.str mov ".b:S src2,a[01]") 8802 ((machine 16)) 8803 (.str mov ".b$S ${src16-2-S},${Dst16AnQI-S}") 8804 (+ (f-0-4 #x3) (f-4-1 0) Dst16AnQI-S src16-2-S) 8805 (mov-sem QI src16-2-S Dst16AnQI-S) 8806 ()) 8807 (define-pmacro (mov16-b-s-an-defn op1 op2 op2c) 8808 (dni (.sym mov16.b.S- op1 - op2) 8809 (.str mov ".b:S " op1 "," op2) 8810 ((machine 16)) 8811 (.str mov ".b$S " op1 "," op2) 8812 (+ (f-0-4 #x3) op2c) 8813 (mov-sem QI (reg (.sym h- op1)) (reg (.sym h- op2))) 8814 ()) 8815 ) 8816 (mov16-b-s-an-defn r0l a1 (f-4-4 #x4)) 8817 (mov16-b-s-an-defn r0h a0 (f-4-4 #x0)) 8818 8819 ; mov.L:G src,dst (m32 #8) 8820 (binary-arith32-src-dst-defn SI SI .l 1 mov G #x1 #x3 mov-sem) 8821 ; mov.B:S r0l/r0h,dst2 (m16 #8) 8822 (dni (.sym mov 16 .b.S-Rn-An) 8823 (.str mov ".b:S r0[lh],src2") 8824 ((machine 16)) 8825 (.str mov ".b$S ${Dst16RnQI-S},${src16-2-S}") 8826 (+ (f-0-4 #x0) (f-4-1 0) Dst16RnQI-S src16-2-S) 8827 (mov-sem QI src16-2-S Dst16RnQI-S) 8828 ()) 8829 8830 ; mov.B.S src2,r0l/r0h (m16 #9) 8831 (binary-arith16-b-S-src2 mov (f-0-4 0) (f-4-1 1) mov-sem) 8832 8833 ; mov.BW:S src2,r0l/r0 (m32 #9) 8834 ; mov.BW:S src2,r1l/r1 (m32 #10) 8835 (define-pmacro (mov32-src-r sz szcode mode src dst opc1 opc2) 8836 (begin 8837 (dni (.sym mov32. sz - src - dst) 8838 (.str "mov." sz "src," dst) 8839 ((machine 32)) 8840 (.str "mov." sz "$S ${" (.sym src - mode) "}," dst) 8841 (+ (f-0-2 opc1) (.sym src - mode) (f-4-3 opc2) (f-7-1 szcode)) 8842 (mov-sem mode (.sym src - mode) (reg (.sym h- dst))) 8843 ()) 8844 ) 8845 ) 8846 (mov32-src-r b 0 QI dst32-2-S-16 r0l 0 4) 8847 (mov32-src-r w 1 HI dst32-2-S-16 r0 0 4) 8848 (mov32-src-r b 0 QI dst32-2-S-8 r0l 0 4) 8849 (mov32-src-r w 1 HI dst32-2-S-8 r0 0 4) 8850 (mov32-src-r b 0 QI dst32-2-S-basic r1l 1 7) 8851 (mov32-src-r w 1 HI dst32-2-S-basic r1 1 7) 8852 (mov32-src-r b 0 QI dst32-2-S-16 r1l 1 7) 8853 (mov32-src-r w 1 HI dst32-2-S-16 r1 1 7) 8854 (mov32-src-r b 0 QI dst32-2-S-8 r1l 1 7) 8855 (mov32-src-r w 1 HI dst32-2-S-8 r1 1 7) 8856 8857 ; mov.BW:S r0l/r0,dst2 (m32 #11) 8858 (define-pmacro (mov32-r-dest sz szcode mode src dst opc1 opc2) 8859 (begin 8860 (dni (.sym mov32. sz - src - dst) 8861 (.str "mov." sz "src," dst) 8862 ((machine 32)) 8863 (.str "mov." sz "$S " src ",${" (.sym dst - mode) "}") 8864 (+ (f-0-2 opc1) (.sym dst - mode) (f-4-3 opc2) (f-7-1 szcode)) 8865 (mov-sem mode (reg (.sym h- src)) (.sym dst - mode)) 8866 ()) 8867 ) 8868 ) 8869 (mov32-r-dest b 0 QI r0l dst32-2-S-16 0 0) 8870 (mov32-r-dest w 1 HI r0 dst32-2-S-16 0 0) 8871 (mov32-r-dest b 0 QI r0l dst32-2-S-8 0 0) 8872 (mov32-r-dest w 1 HI r0 dst32-2-S-8 0 0) 8873 8874 ; mov.L:S src,A0/A1 (m32 #12) 8875 (define-pmacro (mov32-src-a src dst dstcode opc1 opc2) 8876 (begin 8877 (dni (.sym mov32. sz - src - dst) 8878 (.str "mov." sz "src," dst) 8879 ((machine 32)) 8880 (.str "mov.l" "$S ${" (.sym src - SI) "}," dst) 8881 (+ (f-0-2 opc1) (.sym src - SI) (f-4-3 opc2) (f-7-1 dstcode)) 8882 (mov-sem SI (.sym src - SI) (reg (.sym h- dst))) 8883 ()) 8884 ) 8885 ) 8886 (mov32-src-a dst32-2-S-16 a0 0 1 4) 8887 (mov32-src-a dst32-2-S-16 a1 1 1 4) 8888 (mov32-src-a dst32-2-S-8 a0 0 1 4) 8889 (mov32-src-a dst32-2-S-8 a1 1 1 4) 8890 8891 ; mov.BW:G dsp8[sp],dst (m16 #10 m32 #13) 8892 ; mov.BW:G src,dsp8[sp] (m16 #11 m32 #14) 8893 (mov-dspsp-dst mov (f-0-4 #x7) (f-4-3 2) (f-8-4 #xB) #xB #x0 #xF mov-dspsp-dst-sem) 8894 (mov-src-dspsp mov (f-0-4 #x7) (f-4-3 2) (f-8-4 #x3) #xA #x0 #xF mov-src-dspsp-sem) 8895 8896 ;------------------------------------------------------------- 8897 ; mova - move effective address 8898 ;------------------------------------------------------------- 8899 8900 (define-pmacro (mov16a-defn dst dstop dstcode) 8901 (dni (.sym mova16. src - dst) 8902 (.str "mova src," dst) 8903 ((machine 16)) 8904 (.str "mova ${dst16-16-Mova-HI}," dst) 8905 (+ (f-0-4 #xE) (f-4-4 #xB) dst16-16-Mova-HI (f-8-4 dstcode)) 8906 (sequence () (set HI (reg dstop) dst16-16-Mova-HI)) 8907 ()) 8908 ) 8909 (mov16a-defn r0 h-r0 0) 8910 (mov16a-defn r1 h-r1 1) 8911 (mov16a-defn r2 h-r2 2) 8912 (mov16a-defn r3 h-r3 3) 8913 (mov16a-defn a0 h-a0 4) 8914 (mov16a-defn a1 h-a1 5) 8915 8916 (define-pmacro (mov32a-defn dst dstop dstcode) 8917 (dni (.sym mova32. src - dst) 8918 (.str "mova src," dst) 8919 ((machine 32)) 8920 (.str "mova ${dst32-16-Unprefixed-Mova-SI}," dst) 8921 (+ (f-0-4 #xD) dst32-16-Unprefixed-Mova-SI (f-7-1 1) (f-10-2 1) (f-12-1 1) (f-13-3 dstcode)) 8922 (sequence () (set SI (reg dstop) dst32-16-Unprefixed-Mova-SI)) 8923 ()) 8924 ) 8925 (mov32a-defn r2r0 h-r2r0 0) 8926 (mov32a-defn r3r1 h-r3r1 1) 8927 (mov32a-defn a0 h-a0 2) 8928 (mov32a-defn a1 h-a1 3) 8929 8930 ;------------------------------------------------------------- 8931 ; movDir - move nibble 8932 ;------------------------------------------------------------- 8933 8934 (define-pmacro (movdir-sem nib src dst) 8935 (sequence ((SI tmp)) 8936 (case DFLT nib 8937 ((0) (set dst (or (and dst #xf0) (and src #xf)))) 8938 ((1) (set dst (or (and dst #x0f) (sll (and src #xf) 4)))) 8939 ((2) (set dst (or (and dst #xf0) (srl (and src #xf0) 4)))) 8940 ((3) (set dst (or (and dst #x0f) (and src #xf0)))) 8941 ) 8942 ) 8943 ) 8944 ; movDir src,dst 8945 (define-pmacro (mov16dir-1-defn nib dircode dir) 8946 (dni (.sym mov nib 16 ".r0l-dst") 8947 (.str "mov" nib " r0l,dst") 8948 ((machine 16)) 8949 (.str "mov" nib " r0l,${dst16-16-QI}") 8950 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 dir) dst16-16-QI) 8951 (movdir-sem dircode (reg h-r0l) dst16-16-QI) 8952 ()) 8953 ) 8954 (mov16dir-1-defn ll 0 8) 8955 (mov16dir-1-defn lh 1 #xA) 8956 (mov16dir-1-defn hl 2 9) 8957 (mov16dir-1-defn hh 3 #xB) 8958 (define-pmacro (mov16dir-2-defn nib dircode dir) 8959 (dni (.sym mov nib 16 ".src-r0l") 8960 (.str "mov" nib " src,r0l") 8961 ((machine 16)) 8962 (.str "mov" nib " ${dst16-16-QI},r0l") 8963 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 dir) dst16-16-QI) 8964 (movdir-sem dircode dst16-16-QI (reg h-r0l)) 8965 ()) 8966 ) 8967 (mov16dir-2-defn ll 0 0) 8968 (mov16dir-2-defn lh 1 2) 8969 (mov16dir-2-defn hl 2 1) 8970 (mov16dir-2-defn hh 3 3) 8971 8972 (define-pmacro (mov32dir-1-defn nib o1o0) 8973 (dni (.sym mov nib 32 ".r0l-dst") 8974 (.str "mov" nib " r0l,dst") 8975 ((machine 32)) 8976 (.str "mov" nib " r0l,${dst32-24-Prefixed-QI}") 8977 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #xB) dst32-24-Prefixed-QI (f-15-1 0) (f-18-2 o1o0) (f-20-4 #xE)) 8978 (movdir-sem o1o0 (reg h-r0l) dst32-24-Prefixed-QI) 8979 ()) 8980 ) 8981 (mov32dir-1-defn ll 0) 8982 (mov32dir-1-defn lh 1) 8983 (mov32dir-1-defn hl 2) 8984 (mov32dir-1-defn hh 3) 8985 (define-pmacro (mov32dir-2-defn nib o1o0) 8986 (dni (.sym mov nib 32 ".src-r0l") 8987 (.str "mov" nib " src,r0l") 8988 ((machine 32)) 8989 (.str "mov" nib " ${dst32-24-Prefixed-QI},r0l") 8990 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #xA) dst32-24-Prefixed-QI (f-15-1 0) (f-18-2 o1o0) (f-20-4 #xE)) 8991 (movdir-sem o1o0 dst32-24-Prefixed-QI (reg h-r0l)) 8992 ()) 8993 ) 8994 (mov32dir-2-defn ll 0) 8995 (mov32dir-2-defn lh 1) 8996 (mov32dir-2-defn hl 2) 8997 (mov32dir-2-defn hh 3) 8998 8999 ;------------------------------------------------------------- 9000 ; movx - move extend sign (m32) 9001 ;------------------------------------------------------------- 9002 9003 (define-pmacro (movx-sem mode src dst) 9004 (sequence ((SI source) (SI result)) 9005 (set SI result src) 9006 (set-z-and-s result) 9007 (set dst result)) 9008 ) 9009 9010 ; movx #imm,dst 9011 (binary-arith32-imm-dst-defn QI SI "" 0 movx X #xB #x1 #x1 movx-sem) 9012 9013 ;------------------------------------------------------------- 9014 ; mul - multiply 9015 ;------------------------------------------------------------- 9016 9017 (define-pmacro (mul-sem mode src1 dst) 9018 (sequence ((mode result)) 9019 (set obit (add-oflag mode src1 dst 0)) 9020 (set result (mul mode src1 dst)) 9021 (set dst result)) 9022 ) 9023 9024 ; mul.BW #imm,dst 9025 (binary-arith-imm-dst mul G (f-0-4 7) (f-4-3 6) (f-8-4 5) #x8 #x1 #xF mul-sem) 9026 ; mul.BW src,dst 9027 (binary-arith-src-dst mul G (f-0-4 #x7) (f-4-3 4) #x1 #xC mul-sem) 9028 9029 (dni mul_l "mul.l src,r2r0" ((machine 32)) 9030 ("mul.l ${dst32-24-Prefixed-SI},r2r0") 9031 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #x8) (f-15-1 #x1) (f-18-2 #x1) (f-20-4 #xf) 9032 dst32-24-Prefixed-SI) 9033 () ()) 9034 9035 (dni mulu_l "mulu.l src,r2r0" ((machine 32)) 9036 ("mulu.l ${dst32-24-Prefixed-SI},r2r0") 9037 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #x8) (f-15-1 #x1) (f-18-2 #x0) (f-20-4 #xf) 9038 dst32-24-Prefixed-SI) 9039 () ()) 9040 ;------------------------------------------------------------- 9041 ; mulex - multiple extend sign (m32) 9042 ;------------------------------------------------------------- 9043 9044 ; mulex src,dst 9045 ; (dni mulex-absolute-indirect "mulex [src]" ((machine 32)) 9046 ; ("mulex ${dst32-24-absolute-indirect-HI}") 9047 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 #xC) dst32-24-absolute-indirect-HI (f-15-1 1) (f-18-2 3) (f-20-4 #xE)) 9048 ; (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-24-absolute-indirect-HI))) 9049 ; ()) 9050 (dni mulex "mulex src" ((machine 32)) 9051 ("mulex ${dst32-16-Unprefixed-Mulex-HI}") 9052 (+ (f-0-4 #xC) dst32-16-Unprefixed-Mulex-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE)) 9053 (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-16-Unprefixed-Mulex-HI))) 9054 ()) 9055 ; (dni mulex-indirect "mulex [src]" ((machine 32)) 9056 ; ("mulex ${dst32-24-indirect-HI}") 9057 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 #xC) dst32-24-indirect-HI (f-15-1 1) (f-18-2 3) (f-20-4 #xE)) 9058 ; (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-24-indirect-HI))) 9059 ; ()) 9060 9061 ;------------------------------------------------------------- 9062 ; mulu - multiply unsigned 9063 ;------------------------------------------------------------- 9064 9065 (define-pmacro (mulu-sem mode src1 dst) 9066 (sequence ((mode result)) 9067 (set obit (add-oflag mode src1 dst 0)) 9068 (set result (mul mode src1 dst)) 9069 (set dst result)) 9070 ) 9071 9072 ; mulu.BW #imm,dst 9073 (binary-arith-imm-dst mulu G (f-0-4 7) (f-4-3 6) (f-8-4 4) #x8 #x0 #xF mulu-sem) 9074 ; mulu.BW src,dst 9075 (binary-arith-src-dst mulu G (f-0-4 #x7) (f-4-3 0) #x1 #x4 mulu-sem) 9076 9077 ;------------------------------------------------------------- 9078 ; neg - twos complement 9079 ;------------------------------------------------------------- 9080 9081 (define-pmacro (neg-sem mode dst) 9082 (sequence ((mode result)) 9083 (set result (neg mode dst)) 9084 (set-z-and-s result) 9085 (set dst result)) 9086 ) 9087 9088 ; neg.BW:G 9089 (unary-insn neg (f-0-4 7) (f-4-3 2) (f-8-4 #x5) #xA #x2 #xF neg-sem) 9090 9091 ;------------------------------------------------------------- 9092 ; not - twos complement 9093 ;------------------------------------------------------------- 9094 9095 (define-pmacro (not-sem mode dst) 9096 (sequence ((mode result)) 9097 (set result (not mode dst)) 9098 (set-z-and-s result) 9099 (set dst result)) 9100 ) 9101 9102 ; not.BW:G 9103 (unary-insn-g not (f-0-4 7) (f-4-3 2) (f-8-4 #x7) #xA #x1 #xE not-sem) 9104 9105 (dni not16.b.s 9106 "not.b:s Dst16-3-S-8" 9107 ((machine 16)) 9108 "not.b:s ${Dst16-3-S-8}" 9109 (+ (f-0-4 #xb) (f-4-1 #x1) Dst16-3-S-8) 9110 (not-sem QI Dst16-3-S-8) 9111 ()) 9112 9113 ;------------------------------------------------------------- 9114 ; nop 9115 ;------------------------------------------------------------- 9116 9117 (dni nop16 9118 "nop" 9119 ((machine 16)) 9120 "nop" 9121 (+ (f-0-4 #x0) (f-4-4 #x4)) 9122 (nop) 9123 ()) 9124 9125 (dni nop32 9126 "nop" 9127 ((machine 32)) 9128 "nop" 9129 (+ (f-0-4 #xD) (f-4-4 #xE)) 9130 (nop) 9131 ()) 9132 9133 ;------------------------------------------------------------- 9134 ; or - logical or 9135 ;------------------------------------------------------------- 9136 9137 (define-pmacro (or-sem mode src1 dst) 9138 (sequence ((mode result)) 9139 (set result (or mode src1 dst)) 9140 (set-z-and-s result) 9141 (set dst result)) 9142 ) 9143 9144 ; or.BW #imm,dst (m16 #1 m32 #1) 9145 (binary-arith-imm-dst or G (f-0-4 7) (f-4-3 3) (f-8-4 3) #x8 #x2 #xF or-sem) 9146 ; or.b:S #imm8,dst3 (m16 #2 m32 #2) 9147 (binary-arith16-b-S-imm8-dst3 or ".b" (f-0-4 9) (f-4-1 1) or-sem) 9148 (binary-arith32-s-imm-dst QI .b 0 or #x1 #x2 or-sem) 9149 (binary-arith32-s-imm-dst HI .w 1 or #x1 #x2 or-sem) 9150 ; or.BW src,dst (m16 #3 m32 #3) 9151 (binary-arith-src-dst or G (f-0-4 #x9) (f-4-3 4) #x1 #x5 or-sem) 9152 ; or.b:S src,r0[lh] (m16) 9153 (binary-arith16-b-S-src2 or (f-0-4 1) (f-4-1 1) or-sem) 9154 9155 ;------------------------------------------------------------- 9156 ; pop - restore register/memory 9157 ;------------------------------------------------------------- 9158 9159 ; TODO future: split this into .b and .w semantics 9160 (define-pmacro (pop-sem-mach mach mode dst) 9161 (sequence ((mode b_or_w) (SI length)) 9162 (set b_or_w -1) 9163 (set b_or_w (srl b_or_w #x8)) 9164 (if (eq b_or_w #x0) 9165 (set length 1) ; .b 9166 (set length 2)) ; .w 9167 9168 (case DFLT length 9169 ((1) (set dst (mem-mach mach QI (reg h-sp)))) 9170 ((2) (set dst (mem-mach mach HI (reg h-sp))))) 9171 (set (reg h-sp) (add (reg h-sp) length)) 9172 ) 9173 ) 9174 9175 (define-pmacro (pop-sem16 mode dest) (pop-sem-mach 16 mode dest)) 9176 (define-pmacro (pop-sem32 mode dest) (pop-sem-mach 32 mode dest)) 9177 9178 ; pop.BW:G (m16 #1) 9179 (unary-insn-mach-g 16 pop (f-0-4 7) (f-4-3 2) (f-8-4 #xD) pop-sem16 $G) 9180 ; pop.BW:G (m32 #1) 9181 (unary-insn-mach 32 pop #xB #x2 #xF pop-sem32) 9182 9183 ; pop.b:S r0l/r0h 9184 (dni pop16.b-s-rn "pop.b:S r0[lh]" ((machine 16)) 9185 "pop.b$S ${Rn16-push-S-anyof}" 9186 (+ (f-0-4 #x9) Rn16-push-S-anyof (f-5-3 #x2)) 9187 (pop-sem16 QI Rn16-push-S-anyof) 9188 ()) 9189 ; pop.w:S a0/a1 9190 (dni pop16.b-s-an "pop.w:S a[01]" ((machine 16)) 9191 "pop.w$S ${An16-push-S-anyof}" 9192 (+ (f-0-4 #xD) An16-push-S-anyof (f-5-3 #x2)) 9193 (pop-sem16 HI An16-push-S-anyof) 9194 ()) 9195 9196 ;------------------------------------------------------------- 9197 ; popc - pop control register 9198 ; pushc - push control register 9199 ;------------------------------------------------------------- 9200 9201 (define-pmacro (popc32-cr1-sem mode dst) 9202 (sequence () 9203 (case DFLT dst 9204 ((#x0) (set (reg h-dct0) (mem32 mode (reg h-sp)))) 9205 ((#x1) (set (reg h-dct1) (mem32 mode (reg h-sp)))) 9206 ((#x2) (sequence ((HI tflag)) 9207 (set tflag (mem32 mode (reg h-sp))) 9208 (if (and tflag #x1) (set cbit 1)) 9209 (if (and tflag #x2) (set dbit 1)) 9210 (if (and tflag #x4) (set zbit 1)) 9211 (if (and tflag #x8) (set sbit 1)) 9212 (if (and tflag #x10) (set bbit 1)) 9213 (if (and tflag #x20) (set obit 1)) 9214 (if (and tflag #x40) (set ibit 1)) 9215 (if (and tflag #x80) (set ubit 1)))) 9216 ((#x3) (set (reg h-svf) (mem32 mode (reg h-sp)))) 9217 ((#x4) (set (reg h-drc0) (mem32 mode (reg h-sp)))) 9218 ((#x5) (set (reg h-drc1) (mem32 mode (reg h-sp)))) 9219 ((#x6) (set (reg h-dmd0) (mem32 mode (reg h-sp)))) 9220 ((#x7) (set (reg h-dmd1) (mem32 mode (reg h-sp)))) 9221 ) 9222 (set (reg h-sp) (add (reg h-sp) 2)) 9223 ) 9224 ) 9225 (define-pmacro (popc32-cr2-sem mode dst) 9226 (sequence () 9227 (case DFLT dst 9228 ((#x0) (set (reg h-intb) (mem32 mode (reg h-sp)))) 9229 ((#x1) (set (reg h-sp) (mem32 mode (reg h-sp)))) 9230 ((#x2) (set (reg h-sb) (mem32 mode (reg h-sp)))) 9231 ((#x3) (set (reg h-fb) (mem32 mode (reg h-sp)))) 9232 ((#x7) (set (reg h-isp) (mem32 mode (reg h-sp)))) 9233 ) 9234 (set (reg h-sp) (add (reg h-sp) 4)) 9235 ) 9236 ) 9237 (define-pmacro (popc16-sem mode dst) 9238 (sequence () 9239 (case DFLT dst 9240 ((#x1) (set (reg h-intb) (or (and (reg h-intb) #x0000) 9241 (mem16 mode (reg h-sp))))) 9242 ((#x2) (set (reg h-intb) (or (and (reg h-intb) #xffff0000) 9243 (mem16 mode (reg h-sp))))) 9244 ((#x3) (sequence ((HI tflag)) 9245 (set tflag (mem16 mode (reg h-sp))) 9246 (if (and tflag #x1) (set cbit 1)) 9247 (if (and tflag #x2) (set dbit 1)) 9248 (if (and tflag #x4) (set zbit 1)) 9249 (if (and tflag #x8) (set sbit 1)) 9250 (if (and tflag #x10) (set bbit 1)) 9251 (if (and tflag #x20) (set obit 1)) 9252 (if (and tflag #x40) (set ibit 1)) 9253 (if (and tflag #x80) (set ubit 1)))) 9254 ((#x4) (set (reg h-isp) (mem16 mode (reg h-sp)))) 9255 ((#x5) (set (reg h-sp) (mem16 mode (reg h-sp)))) 9256 ((#x6) (set (reg h-sb) (mem16 mode (reg h-sp)))) 9257 ((#x7) (set (reg h-fb) (mem16 mode (reg h-sp)))) 9258 ) 9259 (set (reg h-sp) (add (reg h-sp) 2)) 9260 ) 9261 ) 9262 ; popc dest (m16c #1) 9263 (dni popc16.imm16 "popc dst" ((machine 16)) 9264 ("popc ${cr16}") 9265 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 3) cr16) 9266 (popc16-sem HI cr16) 9267 ()) 9268 ; popc dest (m32c #1) 9269 (dni popc32.imm16-cr1 "popc dst" ((machine 32)) 9270 ("popc ${cr1-Unprefixed-32}") 9271 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32) 9272 (popc32-cr1-sem HI cr1-Unprefixed-32) 9273 ()) 9274 ; popc dest (m32c #2) 9275 (dni popc32.imm16-cr2 "popc dst" ((machine 32)) 9276 ("popc ${cr2-32}") 9277 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 2) (f-12-1 1) cr2-32) 9278 (popc32-cr2-sem SI cr2-32) 9279 ()) 9280 9281 (define-pmacro (pushc32-cr1-sem mode dst) 9282 (sequence () 9283 (set (reg h-sp) (sub (reg h-sp) 2)) 9284 (case DFLT dst 9285 ((#x0) (set (mem32 mode (reg h-sp)) (reg h-dct0))) 9286 ((#x1) (set (mem32 mode (reg h-sp)) (reg h-dct1))) 9287 ((#x2) (sequence ((HI tflag)) 9288 (set tflag 0) 9289 (if (eq cbit 1) (set tflag (or tflag #x1))) 9290 (if (eq dbit 1) (set tflag (or tflag #x2))) 9291 (if (eq zbit 1) (set tflag (or tflag #x4))) 9292 (if (eq sbit 1) (set tflag (or tflag #x8))) 9293 (if (eq bbit 1) (set tflag (or tflag #x10))) 9294 (if (eq obit 1) (set tflag (or tflag #x20))) 9295 (if (eq ibit 1) (set tflag (or tflag #x40))) 9296 (if (eq ubit 1) (set tflag (or tflag #x80))) 9297 (set (mem32 mode (reg h-sp)) tflag))) 9298 ((#x3) (set (mem32 mode (reg h-sp)) (reg h-svf))) 9299 ((#x4) (set (mem32 mode (reg h-sp)) (reg h-drc0))) 9300 ((#x5) (set (mem32 mode (reg h-sp)) (reg h-drc1))) 9301 ((#x6) (set (mem32 mode (reg h-sp)) (reg h-dmd0))) 9302 ((#x7) (set (mem32 mode (reg h-sp)) (reg h-dmd1))) 9303 ) 9304 ) 9305 ) 9306 (define-pmacro (pushc32-cr2-sem mode dst) 9307 (sequence () 9308 (set (reg h-sp) (sub (reg h-sp) 4)) 9309 (case DFLT dst 9310 ((#x0) (set (mem32 mode (reg h-sp)) (reg h-intb))) 9311 ((#x1) (set (mem32 mode (reg h-sp)) (reg h-sp))) 9312 ((#x2) (set (mem32 mode (reg h-sp)) (reg h-sb))) 9313 ((#x3) (set (mem32 mode (reg h-sp)) (reg h-fb))) 9314 ((#x7) (set (mem32 mode (reg h-sp)) (reg h-isp))) 9315 ) 9316 ) 9317 ) 9318 (define-pmacro (pushc16-sem mode dst) 9319 (sequence () 9320 (set (reg h-sp) (sub (reg h-sp) 2)) 9321 (case DFLT dst 9322 ((#x1) (set (mem16 mode (reg h-sp)) (and (reg h-intb) #xffff))) 9323 ((#x2) (set (mem16 mode (reg h-sp)) (and (reg h-intb) #xffff0000))) 9324 ((#x3) (sequence ((HI tflag)) 9325 (if (eq cbit 1) (set tflag (or tflag #x1))) 9326 (if (eq dbit 1) (set tflag (or tflag #x2))) 9327 (if (eq zbit 1) (set tflag (or tflag #x4))) 9328 (if (eq sbit 1) (set tflag (or tflag #x8))) 9329 (if (eq bbit 1) (set tflag (or tflag #x10))) 9330 (if (eq obit 1) (set tflag (or tflag #x20))) 9331 (if (eq ibit 1) (set tflag (or tflag #x40))) 9332 (if (eq ubit 1) (set tflag (or tflag #x80))) 9333 (set (mem16 mode (reg h-sp)) tflag))) 9334 9335 ((#x4) (set (mem16 mode (reg h-sp)) (reg h-isp))) 9336 ((#x5) (set (mem16 mode (reg h-sp)) (reg h-sp))) 9337 ((#x6) (set (mem16 mode (reg h-sp)) (reg h-sb))) 9338 ((#x7) (set (mem16 mode (reg h-sp)) (reg h-fb))) 9339 ) 9340 ) 9341 ) 9342 ; pushc src (m16c) 9343 (dni pushc16.imm16 "pushc dst" ((machine 16)) 9344 ("pushc ${cr16}") 9345 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 2) cr16) 9346 (pushc16-sem HI cr16) 9347 ()) 9348 ; pushc src (m32c #1) 9349 (dni pushc32.imm16-cr1 "pushc dst" ((machine 32)) 9350 ("pushc ${cr1-Unprefixed-32}") 9351 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32) 9352 (pushc32-cr1-sem HI cr1-Unprefixed-32) 9353 ()) 9354 ; pushc src (m32c #2) 9355 (dni pushc32.imm16-cr2 "pushc dst" ((machine 32)) 9356 ("pushc ${cr2-32}") 9357 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 2) (f-12-1 1) cr2-32) 9358 (pushc32-cr2-sem SI cr2-32) 9359 ()) 9360 9361 ;------------------------------------------------------------- 9362 ; popm - pop multiple 9363 ; pushm - push multiple 9364 ;------------------------------------------------------------- 9365 9366 (define-pmacro (popm-sem machine dst) 9367 (sequence ((SI addrlen)) 9368 (if (eq machine 16) 9369 (set addrlen 2) 9370 (set addrlen 4)) 9371 (if (and dst 1) 9372 (sequence () (set R0 (mem-mach machine HI (reg h-sp))) 9373 (set (reg h-sp) (add (reg h-sp) 2)))) 9374 (if (and dst 2) 9375 (sequence () (set R1 (mem-mach machine HI (reg h-sp))) 9376 (set (reg h-sp) (add (reg h-sp) 2)))) 9377 (if (and dst 4) 9378 (sequence () (set R2 (mem-mach machine HI (reg h-sp))) 9379 (set (reg h-sp) (add (reg h-sp) 2)))) 9380 (if (and dst 8) 9381 (sequence () (set R3 (mem-mach machine HI (reg h-sp))) 9382 (set (reg h-sp) (add (reg h-sp) 2)))) 9383 (if (and dst 16) 9384 (sequence () (set A0 (mem-mach machine HI (reg h-sp))) 9385 (set (reg h-sp) (add (reg h-sp) addrlen)))) 9386 (if (and dst 32) 9387 (sequence () (set A1 (mem-mach machine HI (reg h-sp))) 9388 (set (reg h-sp) (add (reg h-sp) addrlen)))) 9389 (if (and dst 64) 9390 (sequence () (set (reg h-sb) (mem-mach machine HI (reg h-sp))) 9391 (set (reg h-sp) (add (reg h-sp) addrlen)))) 9392 (if (eq dst 128) 9393 (sequence () (set (reg h-fb) (mem-mach machine HI (reg h-sp))) 9394 (set (reg h-sp) (add (reg h-sp) addrlen)))) 9395 ) 9396 ) 9397 9398 (define-pmacro (pushm-sem machine dst) 9399 (sequence ((SI count) (SI addrlen)) 9400 (if (eq machine 16) 9401 (set addrlen 2) 9402 (set addrlen 4)) 9403 (if (eq dst 1) 9404 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen)) 9405 (set (mem-mach machine HI (reg h-sp)) (reg h-fb)))) 9406 (if (and dst 2) 9407 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen)) 9408 (set (mem-mach machine HI (reg h-sp)) (reg h-sb)))) 9409 (if (and dst 4) 9410 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen)) 9411 (set (mem-mach machine HI (reg h-sp)) A1))) 9412 (if (and dst 8) 9413 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen)) 9414 (set (mem-mach machine HI (reg h-sp)) A0))) 9415 (if (and dst 16) 9416 (sequence () (set (reg h-sp) (sub (reg h-sp) 2)) 9417 (set (mem-mach machine HI (reg h-sp)) R3))) 9418 (if (and dst 32) 9419 (sequence () (set (reg h-sp) (sub (reg h-sp) 2)) 9420 (set (mem-mach machine HI (reg h-sp)) R2))) 9421 (if (and dst 64) 9422 (sequence () (set (reg h-sp) (sub (reg h-sp) 2)) 9423 (set (mem-mach machine HI (reg h-sp)) R1))) 9424 (if (and dst 128) 9425 (sequence () (set (reg h-sp) (sub (reg h-sp) 2)) 9426 (set (mem-mach machine HI (reg h-sp)) R0))) 9427 ) 9428 ) 9429 9430 (dni popm16 "popm regs" ((machine 16)) 9431 ("popm ${Regsetpop}") 9432 (+ (f-0-4 #xE) (f-4-4 #xD) Regsetpop) 9433 (popm-sem 16 Regsetpop) 9434 ()) 9435 (dni pushm16 "pushm regs" ((machine 16)) 9436 ("pushm ${Regsetpush}") 9437 (+ (f-0-4 #xE) (f-4-4 #xC) Regsetpush) 9438 (pushm-sem 16 Regsetpush) 9439 ()) 9440 (dni popm "popm regs" ((machine 32)) 9441 ("popm ${Regsetpop}") 9442 (+ (f-0-4 #x8) (f-4-4 #xE) Regsetpop) 9443 (popm-sem 32 Regsetpop) 9444 ()) 9445 (dni pushm "pushm regs" ((machine 32)) 9446 ("pushm ${Regsetpush}") 9447 (+ (f-0-4 #x8) (f-4-4 #xF) Regsetpush) 9448 (pushm-sem 32 Regsetpush) 9449 ()) 9450 9451 ;------------------------------------------------------------- 9452 ; push - Save register/memory/immediate data 9453 ;------------------------------------------------------------- 9454 9455 ; TODO future: split this into .b and .w semantics 9456 (define-pmacro (push-sem-mach mach mode dst) 9457 (sequence ((mode b_or_w) (SI length)) 9458 (set b_or_w -1) 9459 (set b_or_w (srl b_or_w #x8)) 9460 (if (eq b_or_w #x0) 9461 (set length 1) ; .b 9462 (if (eq b_or_w #xff) 9463 (set length 2) ; .w 9464 (set length 4))) ; .l 9465 (set (reg h-sp) (sub (reg h-sp) length)) 9466 (case DFLT length 9467 ((1) (set (mem-mach mach QI (reg h-sp)) dst)) 9468 ((2) (set (mem-mach mach HI (reg h-sp)) dst)) 9469 ((4) (set (mem-mach mach SI (reg h-sp)) dst))) 9470 ) 9471 ) 9472 9473 (define-pmacro (push-sem16 mode dst) (push-sem-mach 16 mode dst)) 9474 (define-pmacro (push-sem32 mode dst) (push-sem-mach 32 mode dst)) 9475 9476 ; push.BW:G imm (m16 #1 m32 #1) 9477 (dni push16.b.G-imm "push.b:G #Imm-16-QI" ((machine 16)) 9478 ("push.b$G #${Imm-16-QI}") 9479 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 2) Imm-16-QI) 9480 (push-sem16 QI Imm-16-QI) 9481 ()) 9482 9483 (dni push16.w.G-imm "push.w:G #Imm-16-HI" ((machine 16)) 9484 ("push.w$G #${Imm-16-HI}") 9485 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 2) Imm-16-HI) 9486 (push-sem16 HI Imm-16-HI) 9487 ()) 9488 9489 (dni push32.b.imm "push.b #Imm-8-QI" ((machine 32)) 9490 ("push.b #${Imm-8-QI}") 9491 (+ (f-0-4 #xA) (f-4-4 #xE) Imm-8-QI) 9492 (push-sem32 QI Imm-8-QI) 9493 ()) 9494 9495 (dni push32.w.imm "push.w #Imm-8-HI" ((machine 32)) 9496 ("push.w #${Imm-8-HI}") 9497 (+ (f-0-4 #xA) (f-4-4 #xF) Imm-8-HI) 9498 (push-sem32 HI Imm-8-HI) 9499 ()) 9500 9501 ; push.BW:G src (m16 #2) 9502 (unary-insn-mach-g 16 push (f-0-4 7) (f-4-3 2) (f-8-4 #x4) push-sem16 $G) 9503 ; push.BW:G src (m32 #2) 9504 (unary-insn-mach 32 push #xC #x0 #xE push-sem32) 9505 9506 9507 ; push.b:S r0l/r0h (m16 #3) 9508 (dni push16.b-s-rn "push.b:S r0[lh]" ((machine 16)) 9509 "push.b$S ${Rn16-push-S-anyof}" 9510 (+ (f-0-4 #x8) Rn16-push-S-anyof (f-5-3 #x2)) 9511 (push-sem16 QI Rn16-push-S-anyof) 9512 ()) 9513 ; push.w:S a0/a1 (m16 #4) 9514 (dni push16.b-s-an "push.w:S a[01]" ((machine 16)) 9515 "push.w$S ${An16-push-S-anyof}" 9516 (+ (f-0-4 #xC) An16-push-S-anyof (f-5-3 #x2)) 9517 (push-sem16 HI An16-push-S-anyof) 9518 ()) 9519 9520 ; push.l imm32 (m32 #3) 9521 (dni push32.l.imm "push.l #Imm-16-SI" ((machine 32)) 9522 ("push.l #${Imm-16-SI}") 9523 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 5) (f-12-4 3) Imm-16-SI) 9524 (push-sem32 SI Imm-16-SI) 9525 ()) 9526 ; push.l src (m32 #4) 9527 (unary-insn-defn 32 16-Unprefixed SI .l push (+ (f-0-4 #xA) (f-7-1 0) dst32-16-Unprefixed-SI (f-10-2 0) (f-12-4 1)) push-sem32) 9528 9529 ;------------------------------------------------------------- 9530 ; pusha - push effective address 9531 ;------------------------------------------------------------ 9532 9533 (define-pmacro (push16a-sem mode dst) 9534 (sequence () 9535 (set (reg h-sp) (sub (reg h-sp) 2)) 9536 (set (mem16 HI (reg h-sp)) dst)) 9537 ) 9538 (define-pmacro (push32a-sem mode dst) 9539 (sequence () 9540 (set (reg h-sp) (sub (reg h-sp) 4)) 9541 (set (mem32 SI (reg h-sp)) dst)) 9542 ) 9543 (unary-insn-defn 16 16-Mova HI "" pusha (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 9) dst16-16-Mova-HI) push16a-sem) 9544 (unary-insn-defn 32 16-Unprefixed-Mova SI "" pusha (+ (f-0-4 #xB) (f-7-1 0) dst32-16-Unprefixed-Mova-SI (f-10-2 0) (f-12-4 1)) push32a-sem) 9545 9546 ;------------------------------------------------------------- 9547 ; reit - return from interrupt 9548 ;------------------------------------------------------------- 9549 9550 ; ??? semantics 9551 (dni reit16 "REIT" ((machine 16)) 9552 ("reit") 9553 (+ (f-0-4 #xF) (f-4-4 #xB)) 9554 (nop) 9555 ()) 9556 (dni reit32 "REIT" ((machine 32)) 9557 ("reit") 9558 (+ (f-0-4 9) (f-4-4 #xE)) 9559 (nop) 9560 ()) 9561 9562 ;------------------------------------------------------------- 9563 ; rmpa - repeat multiple and addition 9564 ;------------------------------------------------------------- 9565 9566 ; TODO semantics 9567 (dni rmpa16.b "rmpa.size" ((machine 16)) 9568 ("rmpa.b") 9569 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 1)) 9570 (nop) 9571 ()) 9572 (dni rmpa16.w "rmpa.size" ((machine 16)) 9573 ("rmpa.w") 9574 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 1)) 9575 (nop) 9576 ()) 9577 (dni rmpa32.b "rmpa.size" ((machine 32)) 9578 ("rmpa.b") 9579 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 4) (f-12-4 3)) 9580 (nop) 9581 ()) 9582 9583 (dni rmpa32.w "rmpa.size" ((machine 32)) 9584 ("rmpa.w") 9585 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 5) (f-12-4 3)) 9586 (nop) 9587 ()) 9588 9589 ;------------------------------------------------------------- 9590 ; rolc - rotate left with carry 9591 ;------------------------------------------------------------- 9592 9593 ; TODO check semantics 9594 ; TODO future: split this into .b and .w semantics 9595 (define-pmacro (rolc-sem mode dst) 9596 (sequence ((mode result) (SI ocbit) (mode b_or_w) (USI mask)) 9597 (set b_or_w -1) 9598 (set b_or_w (srl b_or_w #x8)) 9599 (if (eq b_or_w #x0) 9600 (set mask #x8000) ; .b 9601 (set mask #x80000000)) ; .w 9602 (set ocbit cbit) 9603 (set cbit (and dst mask)) 9604 (set result (sll mode dst 1)) 9605 (set result (or result ocbit)) 9606 (set-z-and-s result) 9607 (set dst result)) 9608 ) 9609 ; rolc.BW src,dst 9610 (unary-insn rolc (f-0-4 7) (f-4-3 3) (f-8-4 #xA) #xB #x2 #xE rolc-sem) 9611 9612 ;------------------------------------------------------------- 9613 ; rorc - rotate right with carry 9614 ;------------------------------------------------------------- 9615 9616 ; TODO check semantics 9617 ; TODO future: split this into .b and .w semantics 9618 (define-pmacro (rorc-sem mode dst) 9619 (sequence ((mode result) (SI ocbit) (mode b_or_w) (USI mask) (SI shamt)) 9620 (set b_or_w -1) 9621 (set b_or_w (srl b_or_w #x8)) 9622 (if (eq b_or_w #x0) 9623 (sequence () (set mask #x7fff) (set shamt 15)) ; .b 9624 (sequence () (set mask #x7fffffff) (set shamt 31))) ; .w 9625 (set ocbit cbit) 9626 (set cbit (and dst #x1)) 9627 (set result (srl mode dst (const 1))) 9628 (set result (or (and result mask) (sll ocbit shamt))) 9629 (set-z-and-s result) 9630 (set dst result)) 9631 ) 9632 ; rorc.BW src,dst 9633 (unary-insn rorc (f-0-4 7) (f-4-3 3) (f-8-4 #xB) #xA #x2 #xE rorc-sem) 9634 9635 ;------------------------------------------------------------- 9636 ; rot - rotate 9637 ;------------------------------------------------------------- 9638 9639 ; TODO future: split this into .b and .w semantics 9640 (define-pmacro (rot-1-sem mode src1 dst) 9641 (sequence ((mode tmp) (mode b_or_w) (USI mask) (SI shift)) 9642 (case DFLT src1 9643 ((#x0) (set shift 1)) 9644 ((#x1) (set shift 2)) 9645 ((#x2) (set shift 3)) 9646 ((#x3) (set shift 4)) 9647 ((#x4) (set shift 5)) 9648 ((#x5) (set shift 6)) 9649 ((#x6) (set shift 7)) 9650 ((#x7) (set shift 8)) 9651 ((-8) (set shift -1)) 9652 ((-7) (set shift -2)) 9653 ((-6) (set shift -3)) 9654 ((-5) (set shift -4)) 9655 ((-4) (set shift -5)) 9656 ((-3) (set shift -6)) 9657 ((-2) (set shift -7)) 9658 ((-1) (set shift -8)) 9659 (else (set shift 0)) 9660 ) 9661 (set b_or_w -1) 9662 (set b_or_w (srl b_or_w #x8)) 9663 (if (eq b_or_w #x0) 9664 (set mask #x7fff) ; .b 9665 (set mask #x7fffffff)) ; .w 9666 (set tmp dst) 9667 (if (gt mode shift 0) 9668 (sequence () 9669 (set tmp (rol mode tmp shift)) 9670 (set cbit (and tmp #x1))) 9671 (sequence () 9672 (set tmp (ror mode tmp (mul shift -1))) 9673 (set cbit (and tmp mask)))) 9674 (set-z-and-s tmp) 9675 (set dst tmp)) 9676 ) 9677 (define-pmacro (rot-2-sem mode dst) 9678 (sequence ((mode tmp) (mode b_or_w) (USI mask)) 9679 (set b_or_w -1) 9680 (set b_or_w (srl b_or_w #x8)) 9681 (if (eq b_or_w #x0) 9682 (set mask #x7fff) ; .b 9683 (set mask #x7fffffff)) ; .w 9684 (set tmp dst) 9685 (if (gt mode (reg h-r1h) 0) 9686 (sequence () 9687 (set tmp (rol mode tmp (reg h-r1h))) 9688 (set cbit (and tmp #x1))) 9689 (sequence () 9690 (set tmp (ror mode tmp (reg h-r1h))) 9691 (set cbit (and tmp mask)))) 9692 (set-z-and-s tmp) 9693 (set dst tmp)) 9694 ) 9695 9696 ; rot.BW #imm4,dst 9697 (binary-arith16-shimm4-dst-defn QI .b 0 0 rot (f-0-4 #xE) (f-4-3 0) rot-1-sem) 9698 (binary-arith16-shimm4-dst-defn HI .w 0 1 rot (f-0-4 #xE) (f-4-3 0) rot-1-sem) 9699 (binary-arith32-shimm4-dst-defn QI .b 0 0 rot #x7 #x2 rot-1-sem) 9700 (binary-arith32-shimm4-dst-defn HI .w 0 1 rot #x7 #x2 rot-1-sem) 9701 ; rot.BW src,dst 9702 9703 (dni rot16.b-dst "rot r1h,dest" ((machine 16)) 9704 ("rot.b r1h,${dst16-16-QI}") 9705 (+ (f-0-4 7) (f-4-4 #x4) (f-8-4 #x6) dst16-16-QI) 9706 (rot-2-sem QI dst16-16-QI) 9707 ()) 9708 (dni rot16.w-dst "rot r1h,dest" ((machine 16)) 9709 ("rot.w r1h,${dst16-16-HI}") 9710 (+ (f-0-4 7) (f-4-4 #x5) (f-8-4 #x6) dst16-16-HI) 9711 (rot-2-sem HI dst16-16-HI) 9712 ()) 9713 9714 (dni rot32.b-dst "rot r1h,dest" ((machine 32)) 9715 ("rot.b r1h,${dst32-16-Unprefixed-QI}") 9716 (+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xF)) 9717 (rot-2-sem QI dst32-16-Unprefixed-QI) 9718 ()) 9719 (dni rot32.w-dst "rot r1h,dest" ((machine 32)) 9720 ("rot.w r1h,${dst32-16-Unprefixed-HI}") 9721 (+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xF)) 9722 (rot-2-sem HI dst32-16-Unprefixed-HI) 9723 ()) 9724 9725 ;------------------------------------------------------------- 9726 ; rts - return from subroutine 9727 ;------------------------------------------------------------- 9728 9729 (define-pmacro (rts16-sem) 9730 (sequence ((SI tpc)) 9731 (set tpc (mem16 HI (reg h-sp))) 9732 (set (reg h-sp) (add (reg h-sp) 2)) 9733 (set tpc (or tpc (sll (mem16 QI (reg h-sp)) 16))) 9734 (set (reg h-sp) (add (reg h-sp) 1)) 9735 (set pc tpc) 9736 ) 9737 ) 9738 (define-pmacro (rts32-sem) 9739 (sequence ((SI tpc)) 9740 (set tpc (mem32 HI (reg h-sp))) 9741 (set (reg h-sp) (add (reg h-sp) 2)) 9742 (set tpc (or tpc (sll (mem32 HI (reg h-sp)) 16))) 9743 (set (reg h-sp) (add (reg h-sp) 2)) 9744 (set pc tpc) 9745 ) 9746 ) 9747 9748 (dni rts16 "rts" ((machine 16)) 9749 ("rts") 9750 (+ (f-0-4 #xF) (f-4-4 3)) 9751 (rts16-sem) 9752 ()) 9753 9754 (dni rts32 "rts" ((machine 32)) 9755 ("rts") 9756 (+ (f-0-4 #xD) (f-4-4 #xF)) 9757 (rts32-sem) 9758 ()) 9759 9760 ;------------------------------------------------------------- 9761 ; sbb - subtract with borrow 9762 ;------------------------------------------------------------- 9763 9764 (define-pmacro (sbb-sem mode src dst) 9765 (sequence ((mode result)) 9766 (set result (subc mode dst src cbit)) 9767 (set obit (add-oflag mode dst src cbit)) 9768 (set cbit (add-oflag mode dst src cbit)) 9769 (set-z-and-s result) 9770 (set dst result)) 9771 ) 9772 9773 ; sbb.size:G #imm,dst 9774 (binary-arith16-imm-dst-defn QI QI .b 0 sbb X (f-0-4 7) (f-4-3 3) (f-8-4 7) sbb-sem) 9775 (binary-arith16-imm-dst-defn HI HI .w 1 sbb X (f-0-4 7) (f-4-3 3) (f-8-4 7) sbb-sem) 9776 (binary-arith32-imm-dst-Prefixed QI QI .b 0 sbb X #x9 #x2 #xE sbb-sem) 9777 (binary-arith32-imm-dst-Prefixed HI HI .w 1 sbb X #x9 #x2 #xE sbb-sem) 9778 9779 ; sbb.BW:G src,dst 9780 (binary-arith16-src-dst-defn QI QI .b 0 sbb X (f-0-4 #xB) (f-4-3 4) sbb-sem) 9781 (binary-arith16-src-dst-defn HI HI .w 1 sbb X (f-0-4 #xB) (f-4-3 4) sbb-sem) 9782 (binary-arith32-src-dst-Prefixed QI QI .b 0 sbb X #x1 #x6 sbb-sem) 9783 (binary-arith32-src-dst-Prefixed HI HI .w 1 sbb X #x1 #x6 sbb-sem) 9784 9785 ;------------------------------------------------------------- 9786 ; sbjnz - subtract then jump on not zero 9787 ;------------------------------------------------------------- 9788 9789 (define-pmacro (sub-jnz-sem mode src dst label) 9790 (sequence ((mode result)) 9791 (set result (sub mode dst src)) 9792 (set dst result) 9793 (if (ne result 0) 9794 (set pc label))) 9795 ) 9796 9797 ; sbjnz.size #imm4,dst,label 9798 (arith-jnz-imm4-dst sbjnz s4n (f-0-4 #xF) (f-4-3 4) #xf #x1 sub-jnz-sem) 9799 9800 ;------------------------------------------------------------- 9801 ; sccnd - store condition on condition (m32) 9802 ;------------------------------------------------------------- 9803 9804 (define-pmacro (sccnd-sem cnd dst) 9805 (sequence () 9806 (set dst 0) 9807 (case DFLT cnd 9808 ((#x00) (if (not cbit) (set dst 1))) ;ltu nc 9809 ((#x01) (if (or cbit zbit) (set dst 1))) ;leu 9810 ((#x02) (if (not zbit) (set dst 1))) ;ne nz 9811 ((#x03) (if (not sbit) (set dst 1))) ;pz 9812 ((#x04) (if (not obit) (set dst 1))) ;no 9813 ((#x05) (if (not (or zbit (xor sbit obit))) (set dst 1))) ;gt 9814 ((#x06) (if (xor sbit obit) (set dst 1))) ;ge 9815 ((#x08) (if (trunc BI cbit) (set dst 1))) ;geu c 9816 ((#x09) (if (not (or cbit zbit)) (set dst 1))) ;gtu 9817 ((#x0a) (if (trunc BI zbit) (set dst 1))) ;eq z 9818 ((#x0b) (if (trunc BI sbit) (set dst 1))) ;n 9819 ((#x0c) (if (trunc BI obit) (set dst 1))) ;o 9820 ((#x0d) (if (or zbit (xor sbit obit)) (set dst 1))) ;le 9821 ((#x0e) (if (xor sbit obit) (set dst 1))) ;lt 9822 ) 9823 ) 9824 ) 9825 9826 ; scCND dst 9827 (dni sccnd 9828 "sccnd dst" 9829 ((machine 32)) 9830 "sc$sccond32 ${dst32-16-Unprefixed-HI}" 9831 (+ (f-0-4 #xD) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) sccond32) 9832 (sccnd-sem sccond32 dst32-16-Unprefixed-HI) 9833 ()) 9834 9835 ;------------------------------------------------------------- 9836 ; scmpu - string compare unequal (m32) 9837 ;------------------------------------------------------------- 9838 9839 ; TODO semantics 9840 (dni scmpu.b "scmpu.b" ((machine 32)) 9841 ("scmpu.b") 9842 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 #xC) (f-12-4 3)) 9843 (c-call VOID "scmpu_QI_semantics") 9844 ()) 9845 9846 (dni scmpu.w "scmpu.w" ((machine 32)) 9847 ("scmpu.w") 9848 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 #xD) (f-12-4 3)) 9849 (c-call VOID "scmpu_HI_semantics") 9850 ()) 9851 9852 ;------------------------------------------------------------- 9853 ; sha - shift arithmetic 9854 ;------------------------------------------------------------- 9855 9856 ; TODO future: split this into .b and .w semantics 9857 (define-pmacro (sha-sem mode src1 dst) 9858 (sequence ((mode result)(mode shift)(mode shmode)) 9859 (case DFLT src1 9860 ((#x0) (set shift 1)) 9861 ((#x1) (set shift 2)) 9862 ((#x2) (set shift 3)) 9863 ((#x3) (set shift 4)) 9864 ((#x4) (set shift 5)) 9865 ((#x5) (set shift 6)) 9866 ((#x6) (set shift 7)) 9867 ((#x7) (set shift 8)) 9868 ((-8) (set shift -1)) 9869 ((-7) (set shift -2)) 9870 ((-6) (set shift -3)) 9871 ((-5) (set shift -4)) 9872 ((-4) (set shift -5)) 9873 ((-3) (set shift -6)) 9874 ((-2) (set shift -7)) 9875 ((-1) (set shift -8)) 9876 (else (set shift 0)) 9877 ) 9878 (set shmode -1) 9879 (set shmode (srl shmode #x8)) 9880 (if (lt mode shift #x0) (set result (sra mode dst (mul shift -1)))) 9881 (if (gt mode shift 0) (set result (sll mode dst shift))) 9882 (if (eq shmode #x0) ; QI 9883 (sequence 9884 ((mode cbitamt)) 9885 (if (lt mode shift #x0) 9886 (set cbitamt (sub #x8 shift)) ; sra 9887 (set cbitamt (sub shift 1))) ; sll 9888 (set cbit (srl (and (sll dst cbitamt) #x80) #x7)) 9889 (set obit (ne (and dst #x80) (and result #x80))) 9890 )) 9891 (if (eq shmode #xff) ; HI 9892 (sequence 9893 ((mode cbitamt)) 9894 (if (lt mode shift #x0) 9895 (set cbitamt (sub 16 shift)) ; sra 9896 (set cbitamt (sub shift 1))) ; sll 9897 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf)) 9898 (set obit (ne (and dst #x8000) (and result #x8000))) 9899 )) 9900 (set-z-and-s result) 9901 (set dst result)) 9902 ) 9903 (define-pmacro (shar1h-sem mode dst) 9904 (sequence ((mode result)(mode shmode)) 9905 (set shmode -1) 9906 (set shmode (srl shmode #x8)) 9907 (if (lt mode (reg h-r1h) 0) (set result (sra mode dst (reg h-r1h)))) 9908 (if (gt mode (reg h-r1h) 0) (set result (sll mode dst (reg h-r1h)))) 9909 (if (eq shmode #x0) ; QI 9910 (sequence 9911 ((mode cbitamt)) 9912 (if (lt mode (reg h-r1h) #x0) 9913 (set cbitamt (sub #x8 (reg h-r1h))) ; sra 9914 (set cbitamt (sub (reg h-r1h) 1))) ; sll 9915 (set cbit (srl (and (sll dst cbitamt) #x80) #x7)) 9916 (set obit (ne (and dst #x80) (and result #x80))) 9917 )) 9918 (if (eq shmode #xff) ; HI 9919 (sequence 9920 ((mode cbitamt)) 9921 (if (lt mode (reg h-r1h) #x0) 9922 (set cbitamt (sub 16 (reg h-r1h))) ; sra 9923 (set cbitamt (sub (reg h-r1h) 1))) ; sll 9924 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf)) 9925 (set obit (ne (and dst #x8000) (and result #x8000))) 9926 )) 9927 (set-z-and-s result) 9928 (set dst result)) 9929 ) 9930 ; sha.BW #imm4,dst (m16 #1 m32 #1) 9931 (binary-arith16-shimm4-dst-defn QI .b 0 0 sha (f-0-4 #xF) (f-4-3 0) sha-sem) 9932 (binary-arith16-shimm4-dst-defn HI .w 0 1 sha (f-0-4 #xF) (f-4-3 0) sha-sem) 9933 (binary-arith32-shimm4-dst-defn QI .b 1 0 sha #x7 #x0 sha-sem) 9934 (binary-arith32-shimm4-dst-defn HI .w 1 1 sha #x7 #x0 sha-sem) 9935 ; sha.BW r1h,dst (m16 #2 m32 #3) 9936 (dni sha16.b-dst "sha.b r1h,dest" ((machine 16)) 9937 ("sha.b r1h,${dst16-16-QI}") 9938 (+ (f-0-4 7) (f-4-4 4) (f-8-4 #xF) dst16-16-QI) 9939 (shar1h-sem HI dst16-16-QI) 9940 ()) 9941 (dni sha16.w-dst "sha.w r1h,dest" ((machine 16)) 9942 ("sha.w r1h,${dst16-16-HI}") 9943 (+ (f-0-4 7) (f-4-4 5) (f-8-4 #xF) dst16-16-HI) 9944 (shar1h-sem HI dst16-16-HI) 9945 ()) 9946 (dni sha32.b-dst "sha.b r1h,dest" ((machine 32)) 9947 ("sha.b r1h,${dst32-16-Unprefixed-QI}") 9948 (+ (f-0-4 #xB) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xE)) 9949 (shar1h-sem QI dst32-16-Unprefixed-QI) 9950 ()) 9951 (dni sha32.w-dst "sha.w r1h,dest" ((machine 32)) 9952 ("sha.w r1h,${dst32-16-Unprefixed-HI}") 9953 (+ (f-0-4 #xB) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE)) 9954 (shar1h-sem HI dst32-16-Unprefixed-HI) 9955 ()) 9956 ; sha.L #imm,dst (m16 #3) 9957 (dni sha16-L-imm-r2r0 "sha.L #Imm-sh-12-s4,r2r0" ((machine 16)) 9958 "sha.l #${Imm-sh-12-s4},r2r0" 9959 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #xA) Imm-sh-12-s4) 9960 (sha-sem SI Imm-sh-12-s4 (reg h-r2r0)) 9961 ()) 9962 (dni sha16-L-imm-r3r1 "sha.L #Imm-sh-12-s4,r3r1" ((machine 16)) 9963 "sha.l #${Imm-sh-12-s4},r3r1" 9964 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #xB) Imm-sh-12-s4) 9965 (sha-sem SI Imm-sh-12-s4 (reg h-r3r1)) 9966 ()) 9967 ; sha.L r1h,dst (m16 #4) 9968 (dni sha16-L-r1h-r2r0 "sha.L r1h,r2r0" ((machine 16)) 9969 "sha.l r1h,r2r0" 9970 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 2) (f-12-4 1)) 9971 (sha-sem SI (reg h-r1h) (reg h-r2r0)) 9972 ()) 9973 (dni sha16-L-r1h-r3r1 "sha.L r1h,r3r1" ((machine 16)) 9974 "sha.l r1h,r3r1" 9975 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 3) (f-12-4 1)) 9976 (sha-sem SI (reg h-r1h) (reg h-r3r1)) 9977 ()) 9978 ; sha.L #imm8,dst (m32 #2) 9979 (binary-arith32-imm-dst-defn QI SI .l 0 sha X #xA #x2 #x1 sha-sem) 9980 ; sha.L r1h,dst (m32 #4) 9981 (dni sha32.l-dst "sha.l r1h,dest" ((machine 32)) 9982 ("sha.l r1h,${dst32-16-Unprefixed-SI}") 9983 (+ (f-0-4 #xC) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 1) (f-12-4 1)) 9984 (shar1h-sem QI dst32-16-Unprefixed-SI) 9985 ()) 9986 9987 ;------------------------------------------------------------- 9988 ; shanc - shift arithmetic non carry (m32) 9989 ;------------------------------------------------------------- 9990 9991 ; TODO check semantics 9992 ; shanc.L #imm8,dst 9993 (binary-arith32-imm-dst-defn QI SI .l 0 shanc X #xC #x2 #x1 sha-sem) 9994 9995 ;------------------------------------------------------------- 9996 ; shl - shift logical 9997 ;------------------------------------------------------------- 9998 9999 ; TODO future: split this into .b and .w semantics 10000 (define-pmacro (shl-sem mode src1 dst) 10001 (sequence ((mode result)(mode shift)(mode shmode)) 10002 (case DFLT src1 10003 ((#x0) (set shift 1)) 10004 ((#x1) (set shift 2)) 10005 ((#x2) (set shift 3)) 10006 ((#x3) (set shift 4)) 10007 ((#x4) (set shift 5)) 10008 ((#x5) (set shift 6)) 10009 ((#x6) (set shift 7)) 10010 ((#x7) (set shift 8)) 10011 ((-8) (set shift -1)) 10012 ((-7) (set shift -2)) 10013 ((-6) (set shift -3)) 10014 ((-5) (set shift -4)) 10015 ((-4) (set shift -5)) 10016 ((-3) (set shift -6)) 10017 ((-2) (set shift -7)) 10018 ((-1) (set shift -8)) 10019 (else (set shift 0)) 10020 ) 10021 (set shmode -1) 10022 (set shmode (srl shmode #x8)) 10023 (if (lt mode shift #x0) (set result (srl mode dst (mul shift -1)))) 10024 (if (gt mode shift 0) (set result (sll mode dst shift))) 10025 (if (eq shmode #x0) ; QI 10026 (sequence 10027 ((mode cbitamt)) 10028 (if (lt mode shift #x0) 10029 (set cbitamt (sub #x8 shift)); srl 10030 (set cbitamt (sub shift 1))) ; sll 10031 (set cbit (srl (and (sll dst cbitamt) #x80) #x7)) 10032 (set obit (ne (and dst #x80) (and result #x80))) 10033 )) 10034 (if (eq shmode #xff) ; HI 10035 (sequence 10036 ((mode cbitamt)) 10037 (if (lt mode shift #x0) 10038 (set cbitamt (sub 16 shift)) ; srl 10039 (set cbitamt (sub shift 1))) ; sll 10040 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf)) 10041 (set obit (ne (and dst #x8000) (and result #x8000))) 10042 )) 10043 (set-z-and-s result) 10044 (set dst result)) 10045 ) 10046 (define-pmacro (shlr1h-sem mode dst) 10047 (sequence ((mode result)(mode shmode)) 10048 (set shmode -1) 10049 (set shmode (srl shmode #x8)) 10050 (if (lt mode (reg h-r1h) 0) (set result (srl mode dst (reg h-r1h)))) 10051 (if (gt mode (reg h-r1h) 0) (set result (sll mode dst (reg h-r1h)))) 10052 (if (eq shmode #x0) ; QI 10053 (sequence 10054 ((mode cbitamt)) 10055 (if (lt mode (reg h-r1h) #x0) 10056 (set cbitamt (sub #x8 (reg h-r1h))) ; srl 10057 (set cbitamt (sub (reg h-r1h) 1))) ; sll 10058 (set cbit (srl (and (sll dst cbitamt) #x80) #x7)) 10059 (set obit (ne (and dst #x80) (and result #x80))) 10060 )) 10061 (if (eq shmode #xff) ; HI 10062 (sequence 10063 ((mode cbitamt)) 10064 (if (lt mode (reg h-r1h) #x0) 10065 (set cbitamt (sub 16 (reg h-r1h))) ; srl 10066 (set cbitamt (sub (reg h-r1h) 1))) ; sll 10067 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf)) 10068 (set obit (ne (and dst #x8000) (and result #x8000))) 10069 )) 10070 (set-z-and-s result) 10071 (set dst result)) 10072 ) 10073 ; shl.BW #imm4,dst (m16 #1 m32 #1) 10074 (binary-arith16-shimm4-dst-defn QI .b 0 0 shl (f-0-4 #xE) (f-4-3 4) shl-sem) 10075 (binary-arith16-shimm4-dst-defn HI .w 0 1 shl (f-0-4 #xE) (f-4-3 4) shl-sem) 10076 (binary-arith32-shimm4-dst-defn QI .b 0 0 shl #x7 #x0 shl-sem) 10077 (binary-arith32-shimm4-dst-defn HI .w 0 1 shl #x7 #x0 shl-sem) 10078 ; shl.BW r1h,dst (m16 #2 m32 #3) 10079 (dni shl16.b-dst "shl.b r1h,dest" ((machine 16)) 10080 ("shl.b r1h,${dst16-16-QI}") 10081 (+ (f-0-4 7) (f-4-4 4) (f-8-4 #xE) dst16-16-QI) 10082 (shlr1h-sem HI dst16-16-QI) 10083 ()) 10084 (dni shl16.w-dst "shl.w r1h,dest" ((machine 16)) 10085 ("shl.w r1h,${dst16-16-HI}") 10086 (+ (f-0-4 7) (f-4-4 5) (f-8-4 #xE) dst16-16-HI) 10087 (shlr1h-sem HI dst16-16-HI) 10088 ()) 10089 (dni shl32.b-dst "shl.b r1h,dest" ((machine 32)) 10090 ("shl.b r1h,${dst32-16-Unprefixed-QI}") 10091 (+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xE)) 10092 (shlr1h-sem QI dst32-16-Unprefixed-QI) 10093 ()) 10094 (dni shl32.w-dst "shl.w r1h,dest" ((machine 32)) 10095 ("shl.w r1h,${dst32-16-Unprefixed-HI}") 10096 (+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE)) 10097 (shlr1h-sem HI dst32-16-Unprefixed-HI) 10098 ()) 10099 ; shl.L #imm,dst (m16 #3) 10100 (dni shl16-L-imm-r2r0 "shl.L #Imm-sh-12-s4,r2r0" ((machine 16)) 10101 "shl.l #${Imm-sh-12-s4},r2r0" 10102 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #x8) Imm-sh-12-s4) 10103 (shl-sem SI Imm-sh-12-s4 (reg h-r2r0)) 10104 ()) 10105 (dni shl16-L-imm-r3r1 "shl.L #Imm-sh-12-s4,r3r1" ((machine 16)) 10106 "shl.l #${Imm-sh-12-s4},r3r1" 10107 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #x9) Imm-sh-12-s4) 10108 (shl-sem SI Imm-sh-12-s4 (reg h-r3r1)) 10109 ()) 10110 ; shl.L r1h,dst (m16 #4) 10111 (dni shl16-L-r1h-r2r0 "shl.L r1h,r2r0" ((machine 16)) 10112 "shl.l r1h,r2r0" 10113 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 0) (f-12-4 1)) 10114 (shl-sem SI (reg h-r1h) (reg h-r2r0)) 10115 ()) 10116 (dni shl16-L-r1h-r3r1 "shl.L r1h,r3r1" ((machine 16)) 10117 "shl.l r1h,r3r1" 10118 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 1) (f-12-4 1)) 10119 (shl-sem SI (reg h-r1h) (reg h-r3r1)) 10120 ()) 10121 ; shl.L #imm8,dst (m32 #2) 10122 (binary-arith32-imm-dst-defn QI SI .l 0 shl X #x9 #x2 #x1 shl-sem) 10123 ; shl.L r1h,dst (m32 #4) 10124 (dni shl32.l-dst "shl.l r1h,dest" ((machine 32)) 10125 ("shl.l r1h,${dst32-16-Unprefixed-SI}") 10126 (+ (f-0-4 #xC) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 0) (f-12-4 1)) 10127 (shlr1h-sem QI dst32-16-Unprefixed-SI) 10128 ()) 10129 10130 ;------------------------------------------------------------- 10131 ; shlnc - shift logical non carry 10132 ;------------------------------------------------------------- 10133 10134 ; TODO check semantics 10135 ; shlnc.L #imm8,dst 10136 (binary-arith32-imm-dst-defn QI SI .l 0 shlnc X #x8 #x2 #x1 shl-sem) 10137 10138 ;------------------------------------------------------------- 10139 ; sin - string input (m32) 10140 ;------------------------------------------------------------- 10141 10142 ; TODO semantics 10143 (dni sin32.b "sin" ((machine 32)) 10144 ("sin.b") 10145 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 8) (f-12-4 3)) 10146 (c-call VOID "sin_QI_semantics") 10147 ()) 10148 10149 (dni sin32.w "sin" ((machine 32)) 10150 ("sin.w") 10151 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 9) (f-12-4 3)) 10152 (c-call VOID "sin_HI_semantics") 10153 ()) 10154 10155 ;------------------------------------------------------------- 10156 ; smovb - string move backward 10157 ;------------------------------------------------------------- 10158 10159 ; TODO semantics 10160 (dni smovb16.b "smovb.b" ((machine 16)) 10161 ("smovb.b") 10162 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 9)) 10163 (c-call VOID "smovb_QI_semantics") 10164 ()) 10165 10166 (dni smovb16.w "smovb.w" ((machine 16)) 10167 ("smovb.w") 10168 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 9)) 10169 (c-call VOID "smovb_HI_semantics") 10170 ()) 10171 10172 (dni smovb32.b "smovb.b" ((machine 32)) 10173 ("smovb.b") 10174 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 8) (f-12-4 3)) 10175 (c-call VOID "smovb_QI_semantics") 10176 ()) 10177 10178 (dni smovb32.w "smovb.w" ((machine 32)) 10179 ("smovb.w") 10180 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 9) (f-12-4 3)) 10181 (c-call VOID "smovb_HI_semantics") 10182 ()) 10183 10184 ;------------------------------------------------------------- 10185 ; smovf - string move forward (m32) 10186 ;------------------------------------------------------------- 10187 10188 ; TODO semantics 10189 (dni smovf16.b "smovf.b" ((machine 16)) 10190 ("smovf.b") 10191 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 8)) 10192 (c-call VOID "smovf_QI_semantics") 10193 ()) 10194 10195 (dni smovf16.w "smovf.w" ((machine 16)) 10196 ("smovf.w") 10197 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 8)) 10198 (c-call VOID "smovf_HI_semantics") 10199 ()) 10200 10201 (dni smovf32.b "smovf.b" ((machine 32)) 10202 ("smovf.b") 10203 (+ (f-0-4 #xB) (f-4-4 0) (f-8-4 8) (f-12-4 3)) 10204 (c-call VOID "smovf_QI_semantics") 10205 ()) 10206 10207 (dni smovf32.w "smovf.w" ((machine 32)) 10208 ("smovf.w") 10209 (+ (f-0-4 #xB) (f-4-4 0) (f-8-4 9) (f-12-4 3)) 10210 (c-call VOID "smovf_HI_semantics") 10211 ()) 10212 10213 ;------------------------------------------------------------- 10214 ; smovu - string move unequal (m32) 10215 ;------------------------------------------------------------- 10216 10217 ; TODO semantics 10218 (dni smovu.b "smovu.b" ((machine 32)) 10219 ("smovu.b") 10220 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 8) (f-12-4 3)) 10221 (c-call VOID "smovu_QI_semantics") 10222 ()) 10223 10224 (dni smovu.w "smovu.w" ((machine 32)) 10225 ("smovu.w") 10226 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 9) (f-12-4 3)) 10227 (c-call VOID "smovu_HI_semantics") 10228 ()) 10229 10230 ;------------------------------------------------------------- 10231 ; sout - string output (m32) 10232 ;------------------------------------------------------------- 10233 10234 ; TODO semantics 10235 (dni sout.b "sout.b" ((machine 32)) 10236 ("sout.b") 10237 (+ (f-0-4 #xB) (f-4-4 4) (f-8-4 8) (f-12-4 3)) 10238 (c-call VOID "sout_QI_semantics") 10239 ()) 10240 10241 (dni sout.w "sout" ((machine 32)) 10242 ("sout.w") 10243 (+ (f-0-4 #xB) (f-4-4 4) (f-8-4 9) (f-12-4 3)) 10244 (c-call VOID "sout_HI_semantics") 10245 ()) 10246 10247 ;------------------------------------------------------------- 10248 ; sstr - string store 10249 ;------------------------------------------------------------- 10250 10251 ; TODO semantics 10252 (dni sstr16.b "sstr.b" ((machine 16)) 10253 ("sstr.b") 10254 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 #xA)) 10255 (c-call VOID "sstr_QI_semantics") 10256 ()) 10257 10258 (dni sstr16.w "sstr.w" ((machine 16)) 10259 ("sstr.w") 10260 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 #xA)) 10261 (c-call VOID "sstr_HI_semantics") 10262 ()) 10263 10264 (dni sstr.b "sstr" ((machine 32)) 10265 ("sstr.b") 10266 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 0) (f-12-4 3)) 10267 (c-call VOID "sstr_QI_semantics") 10268 ()) 10269 10270 (dni sstr.w "sstr" ((machine 32)) 10271 ("sstr.w") 10272 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 1) (f-12-4 3)) 10273 (c-call VOID "sstr_HI_semantics") 10274 ()) 10275 10276 ;------------------------------------------------------------- 10277 ; stnz - store on not zero 10278 ;------------------------------------------------------------- 10279 10280 (define-pmacro (stnz-sem mode src dst) 10281 (sequence () 10282 (if (ne zbit (const 1)) 10283 (set dst src))) 10284 ) 10285 ; stnz #imm8,dst3 (m16) 10286 (binary-arith16-b-S-imm8-dst3 stnz "" (f-0-4 #xD) (f-4-1 0) stnz-sem) 10287 ; stnz.BW #imm,dst (m32) 10288 (binary-arith32-imm-dst-defn QI QI .b 0 stnz X #x9 #x1 #xF stnz-sem) 10289 (binary-arith32-imm-dst-defn HI HI .w 1 stnz X #x9 #x1 #xF stnz-sem) 10290 10291 ;------------------------------------------------------------- 10292 ; stz - store on zero 10293 ;------------------------------------------------------------- 10294 10295 (define-pmacro (stz-sem mode src dst) 10296 (sequence () 10297 (if (eq zbit (const 1)) 10298 (set dst src))) 10299 ) 10300 ; stz #imm8,dst3 (m16) 10301 (binary-arith16-b-S-imm8-dst3 stz "" (f-0-4 #xC) (f-4-1 1) stz-sem) 10302 ; stz.BW #imm,dst (m32) 10303 (binary-arith32-imm-dst-defn QI QI .b 0 stz X #x9 #x0 #xF stz-sem) 10304 (binary-arith32-imm-dst-defn HI HI .w 1 stz X #x9 #x0 #xF stz-sem) 10305 10306 ;------------------------------------------------------------- 10307 ; stzx - store on zero extention 10308 ;------------------------------------------------------------- 10309 10310 (define-pmacro (stzx-sem mode src1 src2 dst) 10311 (sequence () 10312 (if (eq zbit (const 1)) 10313 (set dst src1) 10314 (set dst src2))) 10315 ) 10316 ; stzx #imm8,dst3 (m16) 10317 (dni stzx16-imm8-imm8-r0h "stzx #Imm8,#Imm8,r0h" ((machine 16)) 10318 ("stzx #${Imm-8-QI},#${Imm-16-QI},r0h") 10319 (+ (f-0-4 #xD) (f-4-4 #xB) Imm-8-QI Imm-16-QI) 10320 (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0h)) 10321 ()) 10322 (dni stzx16-imm8-imm8-r0l "stzx #Imm8,#Imm8,r0l" ((machine 16)) 10323 ("stzx #${Imm-8-QI},#${Imm-16-QI},r0l") 10324 (+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI Imm-16-QI) 10325 (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0l)) 10326 ()) 10327 (dni stzx16-imm8-imm8-dsp8sb "stzx #Imm8,#Imm8,dsp8[sb]" ((machine 16)) 10328 ("stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-u8}[sb]") 10329 (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI Dsp-16-u8 Imm-24-QI) 10330 (stzx-sem QI Imm-8-QI Imm-16-QI (mem16 QI (add (reg h-sb) Dsp-24-u8))) 10331 ()) 10332 (dni stzx16-imm8-imm8-dsp8fb "stzx #Imm8,#Imm8,dsp8[fb]" ((machine 16)) 10333 ("stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-s8}[fb]") 10334 (+ (f-0-4 #xD) (f-4-4 #xE) Imm-8-QI Dsp-16-s8 Imm-24-QI) 10335 (stzx-sem QI Imm-8-QI Imm-24-QI (mem16 QI (add (reg h-fb) Dsp-16-s8))) 10336 ()) 10337 (dni stzx16-imm8-imm8-abs16 "stzx #Imm8,#Imm8,abs16" ((machine 16)) 10338 ("stzx #${Imm-8-QI},#${Imm-32-QI},${Dsp-16-u16}") 10339 (+ (f-0-4 #xD) (f-4-4 #xF) Imm-8-QI Dsp-16-u16 Imm-32-QI) 10340 (stzx-sem QI Imm-8-QI Imm-32-QI (mem16 QI Dsp-16-u16)) 10341 ()) 10342 ; stzx.BW #imm,dst (m32) 10343 (insn-imm1-imm2-dst-Unprefixed stzx #x9 #x3 #xF stzx-sem) 10344 10345 ;------------------------------------------------------------- 10346 ; subx - subtract extend (m32) 10347 ;------------------------------------------------------------- 10348 10349 (define-pmacro (subx-sem mode src1 dst) 10350 (sequence ((mode result)) 10351 (set result (sub mode dst (ext mode src1))) 10352 (set obit (sub-oflag mode dst (ext mode src1) 0)) 10353 (set cbit (sub-cflag mode dst (ext mode src1) 0)) 10354 (set dst result) 10355 (set-z-and-s result))) 10356 ; subx #imm8,dst 10357 (binary-arith32-imm-dst-defn QI SI "" 0 subx G #x9 #x1 #x1 subx-sem) 10358 ; subx src,dst 10359 (binary-arith32-src-dst-defn QI SI "" 0 subx G #x1 #x0 subx-sem) 10360 10361 ;------------------------------------------------------------- 10362 ; tst - test 10363 ;------------------------------------------------------------- 10364 10365 (define-pmacro (tst-sem mode src1 dst) 10366 (sequence ((mode result)) 10367 (set result (and mode dst src1)) 10368 (set-z-and-s result)) 10369 ) 10370 10371 ; tst.BW #imm,dst (m16 #1 m32 #1) 10372 (binary-arith-imm-dst tst G (f-0-4 7) (f-4-3 3) (f-8-4 0) #x9 #x3 #xE tst-sem) 10373 ; tst.BW src,dst (m16 #2 m32 #3) 10374 (binary-arith16-src-dst-defn QI QI .b 0 tst X (f-0-4 #x8) (f-4-3 0) tst-sem) 10375 (binary-arith16-src-dst-defn HI HI .w 1 tst X (f-0-4 #x8) (f-4-3 0) tst-sem) 10376 (binary-arith32-src-dst-Prefixed QI QI .b 0 tst G #x1 #x9 tst-sem) 10377 (binary-arith32-src-dst-Prefixed HI HI .w 1 tst G #x1 #x9 tst-sem) 10378 ; tst.BW:S #imm,dst2 (m32 #2) 10379 (binary-arith32-s-imm-dst QI .b 0 tst #x0 #x6 tst-sem) 10380 (binary-arith32-s-imm-dst HI .w 1 tst #x0 #x6 tst-sem) 10381 10382 ;------------------------------------------------------------- 10383 ; und - undefined 10384 ;------------------------------------------------------------- 10385 10386 (dni und16 "und" ((machine 16)) 10387 ("und") 10388 (+ (f-0-4 #xF) (f-4-4 #xF)) 10389 (nop) 10390 ()) 10391 10392 (dni und32 "und" ((machine 32)) 10393 ("und") 10394 (+ (f-0-4 #xF) (f-4-4 #xF)) 10395 (nop) 10396 ()) 10397 10398 ;------------------------------------------------------------- 10399 ; wait 10400 ;------------------------------------------------------------- 10401 10402 ; ??? semantics 10403 (dni wait16 "wait" ((machine 16)) 10404 ("wait") 10405 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 3)) 10406 (nop) 10407 ()) 10408 10409 (dni wait "wait" ((machine 32)) 10410 ("wait") 10411 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 0) (f-12-4 3)) 10412 (nop) 10413 ()) 10414 10415 ;------------------------------------------------------------- 10416 ; xchg - exchange 10417 ;------------------------------------------------------------- 10418 10419 (define-pmacro (xchg-sem mode src dst) 10420 (sequence ((mode result)) 10421 (set result src) 10422 (set src dst) 10423 (set dst result)) 10424 ) 10425 (define-pmacro (xchg16-defn mode sz szc src srcreg) 10426 (dni (.sym xchg16 sz - srcreg) 10427 (.str "xchg" sz "-" srcreg ",dst16-16-" mode) 10428 ((machine 16)) 10429 (.str "xchg." sz " " srcreg ",${dst16-16-" mode "}") 10430 (+ (f-0-4 #x7) (f-4-3 #x5) (f-7-1 szc) (f-8-2 0) (f-10-2 src) (.sym dst16-16- mode)) 10431 (xchg-sem mode (reg (.sym h- srcreg)) (.sym dst16-16- mode)) 10432 ()) 10433 ) 10434 (xchg16-defn QI b 0 0 r0l) 10435 (xchg16-defn QI b 0 1 r0h) 10436 (xchg16-defn QI b 0 2 r1l) 10437 (xchg16-defn QI b 0 3 r1h) 10438 (xchg16-defn HI w 1 0 r0) 10439 (xchg16-defn HI w 1 1 r1) 10440 (xchg16-defn HI w 1 2 r2) 10441 (xchg16-defn HI w 1 3 r3) 10442 (define-pmacro (xchg32-defn mode sz szc src srcreg) 10443 (dni (.sym xchg32 sz - srcreg) 10444 (.str "xchg" sz "-" srcreg ",dst32-16-Unprefixed-" mode) 10445 ((machine 32)) 10446 (.str "xchg." sz " " srcreg ",${dst32-16-Unprefixed-" mode "}") 10447 (+ (f-0-4 #xD) (.sym dst32-16-Unprefixed- mode) (f-7-1 szc) (f-10-2 0) (f-12-1 1) (f-13-3 src)) 10448 (xchg-sem mode (reg (.sym h- srcreg)) (.sym dst32-16-Unprefixed- mode)) 10449 ()) 10450 ) 10451 (xchg32-defn QI b 0 0 r0l) 10452 (xchg32-defn QI b 0 1 r1l) 10453 (xchg32-defn QI b 0 2 a0) 10454 (xchg32-defn QI b 0 3 a1) 10455 (xchg32-defn QI b 0 4 r0h) 10456 (xchg32-defn QI b 0 5 r1h) 10457 (xchg32-defn HI w 1 0 r0) 10458 (xchg32-defn HI w 1 1 r1) 10459 (xchg32-defn HI w 1 2 a0) 10460 (xchg32-defn HI w 1 3 a1) 10461 (xchg32-defn HI w 1 4 r2) 10462 (xchg32-defn HI w 1 5 r3) 10463 10464 ;------------------------------------------------------------- 10465 ; xor - exclusive or 10466 ;------------------------------------------------------------- 10467 10468 (define-pmacro (xor-sem mode src1 dst) 10469 (sequence ((mode result)) 10470 (set result (xor mode src1 dst)) 10471 (set-z-and-s result) 10472 (set dst result)) 10473 ) 10474 10475 ; xor.BW #imm,dst (m16 #1 m32 #1) 10476 (binary-arith-imm-dst xor G (f-0-4 7) (f-4-3 3) (f-8-4 1) #x9 #x0 #xE xor-sem) 10477 ; xor.BW src,dst (m16 #3 m32 #3) 10478 (binary-arith-src-dst xor G (f-0-4 #x8) (f-4-3 4) #x1 #x9 xor-sem) 10479 10480 ;------------------------------------------------------------- 10481 ; Widening 10482 ;------------------------------------------------------------- 10483 10484 (define-pmacro (exts-sem smode dmode src dst) 10485 (set dst (ext dmode (trunc smode src))) 10486 ) 10487 (define-pmacro (extz-sem smode dmode src dst) 10488 (set dst (zext dmode (trunc smode src))) 10489 ) 10490 10491 ; exts.b dst for m16c 10492 (ext16-defn QI HI .b 0 exts (f-0-4 7) (f-4-3 6) (f-8-4 6) exts-sem) 10493 10494 ; exts.w r0 for m16c 10495 (dni exts16.w-r0 10496 "exts.w r0" 10497 ((machine 16)) 10498 "exts.w r0" 10499 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 3)) 10500 (exts-sem HI SI R0 R2R0) 10501 ()) 10502 10503 ; exts.size dst for m32c 10504 (ext32-defn QI HI .b 0 exts (f-0-4 #xC) (f-10-2 1) (f-12-4 #xE) exts-sem) 10505 (ext32-defn HI SI .w 1 exts (f-0-4 #xC) (f-10-2 1) (f-12-4 #xE) exts-sem) 10506 ; exts.b src,dst for m32c 10507 (ext32-binary-defn exts .b #x1 #x7 exts-sem) 10508 10509 ; extz.b src,dst for m32c 10510 (ext32-binary-defn extz "" #x1 #xB extz-sem) 10511 10512 ;------------------------------------------------------------- 10513 ; Indirect 10514 ;------------------------------------------------------------- 10515 10516 ; TODO semantics 10517 (dni srcind "SRC-INDIRECT" ((machine 32)) 10518 ("src-indirect") 10519 (+ (f-0-4 4) (f-4-4 1)) 10520 (set (reg h-src-indirect) 1) 10521 ()) 10522 10523 (dni destind "DEST-INDIRECT" ((machine 32)) 10524 ("dest-indirect") 10525 (+ (f-0-4 0) (f-4-4 9)) 10526 (set (reg h-dst-indirect) 1) 10527 ()) 10528 10529 (dni srcdestind "SRC-DEST-INDIRECT" ((machine 32)) 10530 ("src-dest-indirect") 10531 (+ (f-0-4 4) (f-4-4 9)) 10532 (sequence () (set (reg h-src-indirect) 1) (set (reg h-dst-indirect) 1)) 10533 ()) 10534
Indexes created Sun Mar 01 05:31:48 UTC 2026