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      1 //Original:/testcases/core/c_dsp32alu_r_negneg/c_dsp32alu_r_negneg.dsp
      2 // Spec Reference: dsp32alu dregs = neg / neg dregs
      3 # mach: bfin
      4 
      5 .include "testutils.inc"
      6 	start
      7 
      8 
      9 
     10 
     11 imm32 r0, 0xa5678911;
     12 imm32 r1, 0x2789ab1d;
     13 imm32 r2, 0x3b44b515;
     14 imm32 r3, 0x46667717;
     15 imm32 r4, 0x5567891b;
     16 imm32 r5, 0x6789ab1d;
     17 imm32 r6, 0x74445515;
     18 imm32 r7, 0x86667777;
     19 R0 = - R0 (V);
     20 R1 = - R1 (V);
     21 R2 = - R2 (V);
     22 R3 = - R3 (V);
     23 R4 = - R4 (V);
     24 R5 = - R5 (V);
     25 R6 = - R6 (V);
     26 R7 = - R7 (V);
     27 CHECKREG r0, 0x5A9976EF;
     28 CHECKREG r1, 0xD87754E3;
     29 CHECKREG r2, 0xC4BC4AEB;
     30 CHECKREG r3, 0xB99A88E9;
     31 CHECKREG r4, 0xAA9976E5;
     32 CHECKREG r5, 0x987754E3;
     33 CHECKREG r6, 0x8BBCAAEB;
     34 CHECKREG r7, 0x799A8889;
     35 
     36 imm32 r0, 0xa567892b;
     37 imm32 r1, 0x2789ab2d;
     38 imm32 r2, 0x344d5525;
     39 imm32 r3, 0xd6667727;
     40 imm32 r4, 0x58889929;
     41 imm32 r5, 0x6aaabb2b;
     42 imm32 r6, 0x7ccfdd2d;
     43 imm32 r7, 0x8eeeffff;
     44 R1 = - R0 (V);
     45 R2 = - R1 (V);
     46 R3 = - R2 (V);
     47 R4 = - R3 (V);
     48 R5 = - R4 (V);
     49 R6 = - R5 (V);
     50 R7 = - R6 (V);
     51 R0 = - R7 (V);
     52 CHECKREG r0, 0xA567892B;
     53 CHECKREG r1, 0x5A9976D5;
     54 CHECKREG r2, 0xA567892B;
     55 CHECKREG r3, 0x5A9976D5;
     56 CHECKREG r4, 0xA567892B;
     57 CHECKREG r5, 0x5A9976D5;
     58 CHECKREG r6, 0xA567892B;
     59 CHECKREG r7, 0x5A9976D5;
     60 
     61 imm32 r0, 0xb5678941;
     62 imm32 r1, 0x2789ab5d;
     63 imm32 r2, 0x34445565;
     64 imm32 r3, 0xe6667777;
     65 imm32 r4, 0x5567898b;
     66 imm32 r5, 0x6789ab9d;
     67 imm32 r6, 0xc4445505;
     68 imm32 r7, 0x8666b777;
     69 R2 = - R0 (V);
     70 R3 = - R1 (V);
     71 R4 = - R2 (V);
     72 R5 = - R3 (V);
     73 R6 = - R4 (V);
     74 R7 = - R5 (V);
     75 R0 = - R6 (V);
     76 R1 = - R7 (V);
     77 CHECKREG r0, 0xB5678941;
     78 CHECKREG r1, 0x2789AB5D;
     79 CHECKREG r2, 0x4A9976BF;
     80 CHECKREG r3, 0xD87754A3;
     81 CHECKREG r4, 0xB5678941;
     82 CHECKREG r5, 0x2789AB5D;
     83 CHECKREG r6, 0x4A9976BF;
     84 CHECKREG r7, 0xD87754A3;
     85 
     86 
     87 
     88 pass
     89