1 //Original:/testcases/core/c_dsp32alu_rrpm_aa/c_dsp32alu_rrpm_aa.dsp 2 // Spec Reference: dsp32alu (dregs, dregs) = +/- (a, a) amod1 3 # mach: bfin 4 5 .include "testutils.inc" 6 start 7 8 9 10 A1 = A0 = 0; 11 12 imm32 r0, 0x75678911; 13 imm32 r1, 0xa789ab2d; 14 imm32 r2, 0x34745515; 15 imm32 r3, 0x46677757; 16 imm32 r4, 0xb567a96b; 17 imm32 r5, 0x6789aa1d; 18 imm32 r6, 0x744455a5; 19 imm32 r7, 0x8666777a; 20 A0 = R0; 21 A1 = R1; 22 23 R0 = A1 + A0, R7 = A1 - A0 (NS); 24 R1 = A0 + A1, R6 = A0 - A1 (NS); 25 R2 = A1 + A0, R5 = A1 - A0 (NS); 26 R3 = A0 + A1, R4 = A0 - A1 (NS); 27 R4 = A1 + A0, R0 = A1 - A0 (NS); 28 R5 = A0 + A1, R1 = A0 - A1 (NS); 29 R6 = A0 + A1, R2 = A0 - A1 (NS); 30 R7 = A1 + A0, R3 = A1 - A0 (NS); 31 CHECKREG r0, 0x3222221C; 32 CHECKREG r1, 0xCDDDDDE4; 33 CHECKREG r2, 0xCDDDDDE4; 34 CHECKREG r3, 0x3222221C; 35 CHECKREG r4, 0x1CF1343E; 36 CHECKREG r5, 0x1CF1343E; 37 CHECKREG r6, 0x1CF1343E; 38 CHECKREG r7, 0x1CF1343E; 39 40 imm32 r0, 0x8537891b; 41 imm32 r1, 0x3759ab2d; 42 imm32 r2, 0x4e555535; 43 imm32 r3, 0x16e65747; 44 imm32 r4, 0x687e9565; 45 imm32 r5, 0x7a8aeb5b; 46 imm32 r6, 0x8c9cdd85; 47 imm32 r7, 0x9eaefe9f; 48 A0 = R0; 49 A1 = R1; 50 R3 = A1 + A0, R7 = A1 - A0 (S); 51 R4 = A0 + A1, R6 = A0 - A1 (S); 52 R5 = A1 + A0, R4 = A1 - A0 (S); 53 R6 = A0 + A1, R5 = A0 - A1 (S); 54 R7 = A1 + A0, R3 = A1 - A0 (S); 55 R0 = A0 + A1, R2 = A0 - A1 (S); 56 R1 = A0 + A1, R0 = A0 - A1 (S); 57 R2 = A1 + A0, R1 = A1 - A0 (S); 58 CHECKREG r0, 0x80000000; 59 CHECKREG r1, 0x7FFFFFFF; 60 CHECKREG r2, 0xBC913448; 61 CHECKREG r3, 0x7FFFFFFF; 62 CHECKREG r4, 0x7FFFFFFF; 63 CHECKREG r5, 0x80000000; 64 CHECKREG r6, 0xBC913448; 65 CHECKREG r7, 0xBC913448; 66 67 68 69 70 pass 71