1 //Original:/proj/frio/dv/testcases/core/c_dsp32alu_rrppmm_sft_x/c_dsp32alu_rrppmm_sft_x.dsp 2 // Spec Reference: dsp32alu (dreg, dreg) = +/+, -/- (dreg, dreg) >>, << X 3 # mach: bfin 4 5 .include "testutils.inc" 6 start 7 8 R0 = 0; 9 ASTAT = R0; 10 11 imm32 r0, 0x95679911; 12 imm32 r1, 0x2789ab1d; 13 imm32 r2, 0x34945515; 14 imm32 r3, 0x46967717; 15 imm32 r4, 0x5597891b; 16 imm32 r5, 0x6989ab1d; 17 imm32 r6, 0x94445515; 18 imm32 r7, 0x96667777; 19 R0 = R0 +|+ R0, R7 = R0 -|- R0 (CO , ASR); 20 R1 = R0 +|+ R1, R6 = R0 -|- R1 (CO , ASL); 21 R2 = R0 +|+ R2, R5 = R0 -|- R2 (CO , ASR); 22 R3 = R0 +|+ R3, R4 = R0 -|- R3 (CO , ASR); 23 R4 = R0 +|+ R4, R3 = R0 -|- R4 (CO , ASL); 24 R5 = R0 +|+ R5, R2 = R0 -|- R5 (CO , ASR); 25 R6 = R0 +|+ R6, R1 = R0 -|- R6 (CO , ASL); 26 R7 = R0 +|+ R7, R0 = R0 -|- R7 (CO , ASR); 27 CHECKREG r0, 0xcC88cAB3; 28 CHECKREG r1, 0x7AAA72FE; 29 CHECKREG r2, 0xf454f9B4; 30 CHECKREG r3, 0xe35208D4; 31 CHECKREG r4, 0x4CC880F2; 32 CHECKREG r5, 0x9BB2a4BD; 33 CHECKREG r6, 0xE29EE99A; 34 CHECKREG r7, 0xcAB3cC88; 35 36 imm32 r0, 0x11678911; 37 imm32 r1, 0xa719ab1d; 38 imm32 r2, 0x3a415515; 39 imm32 r3, 0x46a67717; 40 imm32 r4, 0x556a891b; 41 imm32 r5, 0x6789ab1d; 42 imm32 r6, 0x74445a15; 43 imm32 r7, 0x866677a7; 44 R0 = R1 +|+ R0, R7 = R1 -|- R0 (CO , ASR); 45 R1 = R1 +|+ R1, R6 = R1 -|- R1 (CO , ASR); 46 R2 = R1 +|+ R2, R5 = R1 -|- R2 (CO , ASL); 47 R3 = R1 +|+ R3, R4 = R1 -|- R3 (CO , ASR); 48 R4 = R1 +|+ R4, R3 = R1 -|- R4 (CO , ASR); 49 R5 = R1 +|+ R5, R2 = R1 -|- R5 (CO , ASR); 50 R6 = R1 +|+ R6, R1 = R1 -|- R6 (CO , ASL); 51 R7 = R1 +|+ R7, R0 = R1 -|- R7 (CO , ASR); 52 CHECKREG r0, 0x41AC229A; 53 CHECKREG r1, 0x563A4E32; 54 CHECKREG r2, 0xe8B6fD84; 55 CHECKREG r3, 0xfD72068B; 56 CHECKREG r4, 0xa08EaDAB; 57 CHECKREG r5, 0xa994c266; 58 CHECKREG r6, 0x4E32563A; 59 CHECKREG r7, 0x33A00C85; 60 61 imm32 r0, 0xb567891b; 62 imm32 r1, 0x2b89abbd; 63 imm32 r2, 0x34b45b15; 64 imm32 r3, 0x466bb717; 65 imm32 r4, 0x556bb91b; 66 imm32 r5, 0x67b9ab1d; 67 imm32 r6, 0x7b4455b5; 68 imm32 r7, 0xb666777b; 69 R0 = R2 +|+ R0, R7 = R2 -|- R0 (CO , ASR); 70 R1 = R2 +|+ R1, R6 = R2 -|- R1 (CO , ASR); 71 R2 = R2 +|+ R2, R5 = R2 -|- R2 (CO , ASR); 72 R3 = R2 +|+ R3, R4 = R2 -|- R3 (CO , ASL); 73 R4 = R2 +|+ R4, R3 = R2 -|- R4 (CO , ASR); 74 R5 = R2 +|+ R5, R2 = R2 -|- R5 (CO , ASR); 75 R6 = R2 +|+ R6, R1 = R2 -|- R6 (CO , ASL); 76 R7 = R2 +|+ R7, R0 = R2 -|- R7 (CO , ASR); 77 CHECKREG r0, 0xED5Ae246; 78 CHECKREG r1, 0x2B8AaBBC; 79 CHECKREG r2, 0x2D8A1A5A; 80 CHECKREG r3, 0x3F41F65C; 81 CHECKREG r4, 0x3E581BD3; 82 CHECKREG r5, 0x1A5A2D8A; 83 CHECKREG r6, 0x0A6C3DDE; 84 CHECKREG r7, 0x4B432D00; 85 86 imm32 r0, 0xbc678c11; 87 imm32 r1, 0x27c9cb1d; 88 imm32 r2, 0x344c5515; 89 imm32 r3, 0x46c6c717; 90 imm32 r4, 0x55678c1b; 91 imm32 r5, 0x6c89abcd; 92 imm32 r6, 0x7444551c; 93 imm32 r7, 0x8c667777; 94 R0 = R3 +|+ R0, R7 = R3 -|- R0 (CO , ASL); 95 R1 = R3 +|+ R1, R6 = R3 -|- R1 (CO , ASR); 96 R2 = R3 +|+ R2, R5 = R3 -|- R2 (CO , ASR); 97 R3 = R3 +|+ R3, R4 = R3 -|- R3 (CO , ASR); 98 R4 = R3 +|+ R4, R3 = R3 -|- R4 (CO , ASL); 99 R5 = R3 +|+ R5, R2 = R3 -|- R5 (CO , ASR); 100 R6 = R3 +|+ R6, R1 = R3 -|- R6 (CO , ASR); 101 R7 = R3 +|+ R7, R0 = R3 -|- R7 (CO , ASL); 102 CHECKREG r0, 0xF19C3044; 103 CHECKREG r1, 0xbF07C818; 104 CHECKREG r2, 0xC227eA96; 105 CHECKREG r3, 0x8E2E8D8C; 106 CHECKREG r4, 0x8D8C8E2E; 107 CHECKREG r5, 0xa397CB64; 108 CHECKREG r6, 0xC615CE85; 109 CHECKREG r7, 0x08744494; 110 111 imm32 r0, 0xd56789d1; 112 imm32 r1, 0x2d89abdd; 113 imm32 r2, 0x34d455d5; 114 imm32 r3, 0x4d667717; 115 imm32 r4, 0x5dd7891b; 116 imm32 r5, 0x6789ab1d; 117 imm32 r6, 0xd44d5515; 118 imm32 r7, 0xd666d777; 119 R0 = R4 +|+ R0, R7 = R4 -|- R0 (CO , ASR); 120 R1 = R4 +|+ R1, R6 = R4 -|- R1 (CO , ASR); 121 R2 = R4 +|+ R2, R5 = R4 -|- R2 (CO , ASR); 122 R3 = R4 +|+ R3, R4 = R4 -|- R3 (CO , ASL); 123 R4 = R4 +|+ R4, R3 = R4 -|- R4 (CO , ASR); 124 R5 = R4 +|+ R5, R2 = R4 -|- R5 (CO , ASL); 125 R6 = R4 +|+ R6, R1 = R4 -|- R6 (CO , ASR); 126 R7 = R4 +|+ R7, R0 = R4 -|- R7 (CO , ASR); 127 CHECKREG r0, 0xeE551231; 128 CHECKREG r1, 0x045D1AB4; 129 CHECKREG r2, 0x18C214CA; 130 CHECKREG r3, 0x00000000; 131 CHECKREG r4, 0x240820E2; 132 CHECKREG r5, 0x7B566AC6; 133 CHECKREG r6, 0x09531C84; 134 CHECKREG r7, 0x11D6328D; 135 136 imm32 r0, 0xc567a911; 137 imm32 r1, 0x278aab1d; 138 imm32 r2, 0x3c445515; 139 imm32 r3, 0x46a67717; 140 imm32 r4, 0x55c7891b; 141 imm32 r5, 0x6a8cab1d; 142 imm32 r6, 0x7444c515; 143 imm32 r7, 0xa6667c77; 144 R0 = R5 +|+ R0, R7 = R5 -|- R0 (CO , ASR); 145 R1 = R5 +|+ R1, R6 = R5 -|- R1 (CO , ASL); 146 R2 = R5 +|+ R2, R5 = R5 -|- R2 (CO , ASR); 147 R3 = R5 +|+ R3, R4 = R5 -|- R3 (CO , ASR); 148 R4 = R5 +|+ R4, R3 = R5 -|- R4 (CO , ASR); 149 R5 = R5 +|+ R5, R2 = R5 -|- R5 (CO , ASL); 150 R6 = R5 +|+ R6, R1 = R5 -|- R6 (CO , ASR); 151 R7 = R5 +|+ R7, R0 = R5 -|- R7 (CO , ASR); 152 CHECKREG r0, 0x04FFD585; 153 CHECKREG r1, 0x6B46D608; 154 CHECKREG r2, 0x00000000; 155 CHECKREG r3, 0x327AeD7F; 156 CHECKREG r4, 0xbD85e4A9; 157 CHECKREG r5, 0xAC105C90; 158 CHECKREG r6, 0xD608F14A; 159 CHECKREG r7, 0xD68B5791; 160 161 imm32 r0, 0xd5678911; 162 imm32 r1, 0x2ddddd1d; 163 imm32 r2, 0x34ddd515; 164 imm32 r3, 0x46d67717; 165 imm32 r4, 0x5d6d891b; 166 imm32 r5, 0x6789db1d; 167 imm32 r6, 0x74445d15; 168 imm32 r7, 0xd66677d7; 169 R0 = R6 +|+ R0, R7 = R6 -|- R0 (CO , ASR); 170 R1 = R6 +|+ R1, R6 = R6 -|- R1 (CO , ASR); 171 R2 = R6 +|+ R2, R5 = R6 -|- R2 (CO , ASR); 172 R3 = R6 +|+ R3, R4 = R6 -|- R3 (CO , ASL); 173 R4 = R6 +|+ R4, R3 = R6 -|- R4 (CO , ASR); 174 R5 = R6 +|+ R5, R2 = R6 -|- R5 (CO , ASR); 175 R6 = R6 +|+ R6, R1 = R6 -|- R6 (CO , ASL); 176 R7 = R6 +|+ R7, R0 = R6 -|- R7 (CO , ASR); 177 CHECKREG r0, 0x9EAFcAF7; 178 CHECKREG r1, 0x00000000; 179 CHECKREG r2, 0x0ED20C76; 180 CHECKREG r3, 0x1873F3E2; 181 CHECKREG r4, 0x4C1A0ABF; 182 CHECKREG r5, 0x33851461; 183 CHECKREG r6, 0xFFF08CCC; 184 CHECKREG r7, 0x34F9eE1D; 185 186 imm32 r0, 0xf567a911; 187 imm32 r1, 0x2f8aab1d; 188 imm32 r2, 0x34a45515; 189 imm32 r3, 0x4a6f7717; 190 imm32 r4, 0x5567f91b; 191 imm32 r5, 0xa789af1d; 192 imm32 r6, 0x74445515; 193 imm32 r7, 0x866677f7; 194 R0 = R7 +|+ R0, R7 = R7 -|- R0 (CO , ASR); 195 R1 = R7 +|+ R1, R6 = R7 -|- R1 (CO , ASL); 196 R2 = R7 +|+ R2, R5 = R7 -|- R2 (CO , ASR); 197 R3 = R7 +|+ R3, R4 = R7 -|- R3 (CO , ASR); 198 R4 = R7 +|+ R4, R3 = R7 -|- R4 (CO , ASL); 199 R5 = R7 +|+ R5, R2 = R7 -|- R5 (CO , ASL); 200 R6 = R7 +|+ R6, R1 = R7 -|- R6 (CO , ASR); 201 R7 = R7 +|+ R7, R0 = R7 -|- R7 (CO , ASL); 202 CHECKREG r0, 0x00000000; 203 CHECKREG r1, 0xaC561657; 204 CHECKREG r2, 0x5E305B7C; 205 CHECKREG r3, 0x73FA7D7E; 206 CHECKREG r4, 0x204EaE02; 207 CHECKREG r5, 0x4250c3CC; 208 CHECKREG r6, 0x511B1C28; 209 CHECKREG r7, 0x9DCC21FC; 210 211 imm32 r0, 0xe5678911; 212 imm32 r1, 0x2e89ab1d; 213 imm32 r2, 0x34e45515; 214 imm32 r3, 0x46667717; 215 imm32 r4, 0x556e891b; 216 imm32 r5, 0x6789ab1d; 217 imm32 r6, 0x7444e515; 218 imm32 r7, 0x86667e77; 219 R4 = R2 +|+ R5, R3 = R2 -|- R5 (CO , ASR); 220 R0 = R5 +|+ R3, R5 = R5 -|- R3 (CO , ASL); 221 R2 = R6 +|+ R2, R0 = R6 -|- R2 (CO , ASL); 222 R3 = R4 +|+ R0, R2 = R4 -|- R0 (CO , ASR); 223 R7 = R7 +|+ R6, R6 = R7 -|- R6 (CO , ASL); 224 R6 = R1 +|+ R7, R1 = R1 -|- R7 (CO , ASL); 225 R5 = R0 +|+ R4, R7 = R0 -|- R4 (CO , ASR); 226 R1 = R3 +|+ R1, R4 = R3 -|- R1 (CO , ASR); 227 CHECKREG r0, 0x20007EC0; 228 CHECKREG r1, 0xfF9258EB; 229 CHECKREG r2, 0xC0AC171B; 230 CHECKREG r3, 0x371B3F6C; 231 CHECKREG r4, 0xE6813788; 232 CHECKREG r5, 0x371B3F6C; 233 CHECKREG r6, 0x47BAE46A; 234 CHECKREG r7, 0x3F53e8E5; 235 236 imm32 r0, 0xd5678911; 237 imm32 r1, 0xff89ab1d; 238 imm32 r2, 0x34f45515; 239 imm32 r3, 0x46667717; 240 imm32 r4, 0x556f891b; 241 imm32 r5, 0x6789fb1d; 242 imm32 r6, 0x74445f15; 243 imm32 r7, 0x866677f7; 244 R4 = R3 +|+ R3, R5 = R3 -|- R3 (CO , ASR); 245 R1 = R6 +|+ R1, R6 = R6 -|- R1 (CO , ASL); 246 R6 = R1 +|+ R4, R4 = R1 -|- R4 (CO , ASL); 247 R7 = R4 +|+ R2, R0 = R4 -|- R2 (CO , ASR); 248 R2 = R2 +|+ R6, R1 = R2 -|- R6 (CO , ASR); 249 R3 = R5 +|+ R5, R7 = R5 -|- R5 (CO , ASL); 250 R5 = R7 +|+ R7, R3 = R7 -|- R7 (CO , ASL); 251 R0 = R0 +|+ R0, R2 = R0 -|- R0 (CO , ASR); 252 CHECKREG r0, 0xF6A902D3; 253 CHECKREG r1, 0x1F0FEC7A; 254 CHECKREG r2, 0x00000000; 255 CHECKREG r3, 0x00000000; 256 CHECKREG r4, 0x3A9A4268; 257 CHECKREG r5, 0x00000000; 258 CHECKREG r6, 0x5C0016F6; 259 CHECKREG r7, 0x00000000; 260 261 pass 262
Indexes created Fri Jun 26 00:24:39 UTC 2026