1 //Original:/proj/frio/dv/testcases/core/c_dsp32alu_saa/c_dsp32alu_saa.dsp 2 // Spec Reference: dsp32alu saa 3 # mach: bfin 4 5 .include "testutils.inc" 6 start 7 8 A1 = 0; 9 A0 = 0; 10 11 imm32 r0, 0x15678911; 12 imm32 r1, 0x2789ab1d; 13 imm32 r2, 0x34445515; 14 imm32 r3, 0x46667717; 15 imm32 r4, 0x5567891b; 16 imm32 r5, 0x6789ab1d; 17 imm32 r6, 0x74445515; 18 imm32 r7, 0x86667777; 19 A0 = 0; 20 A1 = 0; 21 SAA ( R1:0 , R3:2 ); 22 R4 = A0.w; 23 R5 = A1.w; 24 CHECKREG r4, 0x00340004; 25 CHECKREG r5, 0x001F0023; 26 SAA ( R3:2 , R1:0 ); 27 R6 = A0.w; 28 R7 = A1.w; 29 CHECKREG r6, 0x00680008; 30 CHECKREG r7, 0x003E0046; 31 32 imm32 r0, 0x1567892b; 33 imm32 r1, 0x2789ab2d; 34 imm32 r2, 0x34445525; 35 imm32 r3, 0x46667727; 36 imm32 r4, 0x00340004; 37 imm32 r5, 0x001F0023; 38 imm32 r6, 0x00680008; 39 imm32 r7, 0x003E0046; 40 SAA ( R1:0 , R3:2 ); 41 R0 = A0.w; 42 R1 = A1.w; 43 CHECKREG r0, 0x009C000E; 44 CHECKREG r1, 0x005D0069; 45 SAA ( R3:2 , R1:0 ); 46 R2 = A0.w; 47 R3 = A1.w; 48 CHECKREG r2, 0x00F10025; 49 CHECKREG r3, 0x009100C1; 50 51 imm32 r0, 0x496789ab; 52 imm32 r1, 0x6489abcd; 53 imm32 r2, 0x4b445555; 54 imm32 r3, 0x6c647777; 55 imm32 r4, 0x8d889999; 56 imm32 r5, 0xaeaa4bbb; 57 imm32 r6, 0xcfccd44d; 58 imm32 r7, 0xe1eefff4; 59 SAA ( R3:2 , R1:0 ) (R); 60 R0 = A0.w; 61 R1 = A1.w; 62 CHECKREG r0, 0x0125007B; 63 CHECKREG r1, 0x009900E6; 64 SAA ( R1:0 , R3:2 ) (R); 65 R6 = A0.w; 66 R7 = A1.w; 67 CHECKREG r6, 0x019C00EA; 68 CHECKREG r7, 0x0105011B; 69 70 pass 71
Indexes created Wed Aug 12 00:25:48 UTC 2026