1 //Original:/testcases/core/c_dsp32mult_pair_m_i/c_dsp32mult_pair_m_i.dsp 2 // Spec Reference: dsp32mult pair MUNOP i 3 # mach: bfin 4 5 .include "testutils.inc" 6 start 7 8 imm32 r0, 0x34235625; 9 imm32 r1, 0x9f7a5127; 10 imm32 r2, 0xa3286725; 11 imm32 r3, 0x00069027; 12 imm32 r4, 0xb0abc029; 13 imm32 r5, 0x10acef2b; 14 imm32 r6, 0xc00c00de; 15 imm32 r7, 0xd246712f; 16 R0 = R0.L * R0.L (IS); 17 R2 = R0.L * R1.H (IS); 18 R4 = R1.H * R1.H (IS); 19 R6 = R0.L * R0.L (IS); 20 CHECKREG r0, 0x1CFCE159; 21 CHECKREG r1, 0x9F7A5127; 22 CHECKREG r2, 0x0B8EAB6A; 23 CHECKREG r3, 0x00069027; 24 CHECKREG r4, 0x2464C624; 25 CHECKREG r5, 0x10ACEF2B; 26 CHECKREG r6, 0x03AB90F1; 27 CHECKREG r7, 0xD246712F; 28 29 imm32 r0, 0x5b23a635; 30 imm32 r1, 0x6fba5137; 31 imm32 r2, 0x1324b735; 32 imm32 r3, 0x90060037; 33 imm32 r4, 0x80abcd39; 34 imm32 r5, 0xb0acef3b; 35 imm32 r6, 0xa00c003d; 36 imm32 r7, 0x12467003; 37 R0 = R2.L * R2.L (IS); 38 R2 = R2.L * R3.H (IS); 39 R4 = R3.H * R2.H (IS); 40 R6 = R2.L * R3.L (IS); 41 CHECKREG r0, 0x14B2D0F9; 42 CHECKREG r1, 0x6FBA5137; 43 CHECKREG r2, 0x1FD71B3E; 44 CHECKREG r3, 0x90060037; 45 CHECKREG r4, 0xF212AF0A; 46 CHECKREG r5, 0xB0ACEF3B; 47 CHECKREG r6, 0x0005DA52; 48 CHECKREG r7, 0x12467003; 49 50 imm32 r0, 0x1b235655; 51 imm32 r1, 0xc4ba5157; 52 imm32 r2, 0x43246755; 53 imm32 r3, 0x05060055; 54 imm32 r4, 0x906bc509; 55 imm32 r5, 0x10a7ef5b; 56 imm32 r6, 0xb00c805d; 57 imm32 r7, 0x1246795f; 58 R0 = R4.L * R4.L (IS); 59 R2 = R4.L * R5.H (IS); 60 R4 = R5.H * R5.H (IS); 61 R6 = R4.L * R5.L (IS); 62 CHECKREG r0, 0x0D94DA51; 63 CHECKREG r1, 0xC4BA5157; 64 CHECKREG r2, 0xFC2A18DF; 65 CHECKREG r3, 0x05060055; 66 CHECKREG r4, 0x01154CF1; 67 CHECKREG r5, 0x10A7EF5B; 68 CHECKREG r6, 0xFAFF58AB; 69 CHECKREG r7, 0x1246795F; 70 71 imm32 r0, 0xbb235666; 72 imm32 r1, 0xefba5166; 73 imm32 r2, 0x13248766; 74 imm32 r3, 0xf0060066; 75 imm32 r4, 0x90ab9d69; 76 imm32 r5, 0x10acef6b; 77 imm32 r6, 0x800cb06d; 78 imm32 r7, 0x1246706f; 79 R0 = R6.L * R6.L (IS); 80 R2 = R6.L * R7.H (IS); 81 R4 = R7.H * R7.H (IS); 82 R6 = R6.L * R7.L (IS); 83 CHECKREG r0, 0x18BC0E69; 84 CHECKREG r1, 0xEFBA5166; 85 CHECKREG r2, 0xFA51E7CE; 86 CHECKREG r3, 0xF0060066; 87 CHECKREG r4, 0x014DEB24; 88 CHECKREG r5, 0x10ACEF6B; 89 CHECKREG r6, 0xDD0D2F43; 90 CHECKREG r7, 0x1246706F; 91 92 // mix order 93 imm32 r0, 0xab23a675; 94 imm32 r1, 0xcfba5127; 95 imm32 r2, 0x13246705; 96 imm32 r3, 0x00060007; 97 imm32 r4, 0x90abcd09; 98 imm32 r5, 0x10acdfdb; 99 imm32 r6, 0x000c000d; 100 imm32 r7, 0x1246f00f; 101 R0 = R0.L * R7.L (IS); 102 R2 = R1.L * R6.H (IS); 103 R4 = R3.H * R4.H (IS); 104 R6 = R4.L * R3.L (IS); 105 CHECKREG r0, 0x059370DB; 106 CHECKREG r1, 0xCFBA5127; 107 CHECKREG r2, 0x0003CDD4; 108 CHECKREG r3, 0x00060007; 109 CHECKREG r4, 0xFFFD6402; 110 CHECKREG r5, 0x10ACDFDB; 111 CHECKREG r6, 0x0002BC0E; 112 CHECKREG r7, 0x1246F00F; 113 114 imm32 r0, 0xab235a75; 115 imm32 r1, 0xcfba5127; 116 imm32 r2, 0x13246905; 117 imm32 r3, 0x00060007; 118 imm32 r4, 0x90abcd09; 119 imm32 r5, 0x10ace9db; 120 imm32 r6, 0x000c0d0d; 121 imm32 r7, 0x1246700f; 122 R1 = R7.H * R0.H (IS); 123 R3 = R6.H * R1.H (IS); 124 R5 = R5.H * R2.L (IS); 125 R7 = R4.L * R3.H (IS); 126 CHECKREG r0, 0xAB235A75; 127 CHECKREG r1, 0xF9F14192; 128 CHECKREG r2, 0x13246905; 129 CHECKREG r3, 0xFFFFB74C; 130 CHECKREG r4, 0x90ABCD09; 131 CHECKREG r5, 0x06D6DF5C; 132 CHECKREG r6, 0x000C0D0D; 133 CHECKREG r7, 0x000032F7; 134 135 imm32 r0, 0x9b235675; 136 imm32 r1, 0xc9ba5127; 137 imm32 r2, 0x13946705; 138 imm32 r3, 0x00090007; 139 imm32 r4, 0x90ab9d09; 140 imm32 r5, 0x10ace9db; 141 imm32 r6, 0x000c009d; 142 imm32 r7, 0x12467009; 143 R1 = R6.H * R4.L (IS); 144 R3 = R5.L * R3.H (IS); 145 R5 = R3.H * R1.L (IS); 146 R7 = R1.H * R2.H (IS); 147 CHECKREG r0, 0x9B235675; 148 CHECKREG r1, 0xFFFB5C6C; 149 CHECKREG r2, 0x13946705; 150 CHECKREG r3, 0xFFFF38B3; 151 CHECKREG r4, 0x90AB9D09; 152 CHECKREG r5, 0xFFFFA394; 153 CHECKREG r6, 0x000C009D; 154 CHECKREG r7, 0xFFFF9E1C; 155 156 imm32 r0, 0xeb235675; 157 imm32 r1, 0xceba5127; 158 imm32 r2, 0x13e46705; 159 imm32 r3, 0x000e0007; 160 imm32 r4, 0x90abed09; 161 imm32 r5, 0x10aceedb; 162 imm32 r6, 0x000c00ed; 163 imm32 r7, 0x1246700e; 164 R1 = R4.L * R0.H (IS); 165 R3 = R6.H * R1.H (IS); 166 R5 = R1.L * R2.L (IS); 167 R7 = R4.H * R2.L (IS); 168 CHECKREG r0, 0xEB235675; 169 CHECKREG r1, 0x018BAB3B; 170 CHECKREG r2, 0x13E46705; 171 CHECKREG r3, 0x00001284; 172 CHECKREG r4, 0x90ABED09; 173 CHECKREG r5, 0xDDE31527; 174 CHECKREG r6, 0x000C00ED; 175 CHECKREG r7, 0xD332A057; 176 177 178 pass 179