1 //Original:/testcases/core/c_dsp32mult_pair_s/c_dsp32mult_pair_s.dsp 2 // Spec Reference: dsp32mult pair s 3 # mach: bfin 4 5 .include "testutils.inc" 6 start 7 8 imm32 r0, 0x8b235625; 9 imm32 r1, 0x93ba5127; 10 imm32 r2, 0xa3446725; 11 imm32 r3, 0x00050027; 12 imm32 r4, 0xb0ab6d29; 13 imm32 r5, 0x10ace72b; 14 imm32 r6, 0xc00c008d; 15 imm32 r7, 0xd2467029; 16 R1 = R0.L * R0.L, R0 = R0.L * R0.L (S2RND); 17 R3 = R0.L * R1.L, R2 = R0.L * R1.H (S2RND); 18 R5 = R1.L * R0.L, R4 = R1.H * R0.L (S2RND); 19 R7 = R1.L * R1.L, R6 = R1.H * R1.H (S2RND); 20 CHECKREG r0, 0x73F38564; 21 CHECKREG r1, 0x73F38564; 22 CHECKREG r2, 0x80000000; 23 CHECKREG r3, 0x7FFFFFFF; 24 CHECKREG r4, 0x80000000; 25 CHECKREG r5, 0x7FFFFFFF; 26 CHECKREG r6, 0x7FFFFFFF; 27 CHECKREG r7, 0x7FFFFFFF; 28 29 imm32 r0, 0x5b33a635; 30 imm32 r1, 0x6fbe5137; 31 imm32 r2, 0x1324b735; 32 imm32 r3, 0x9006d037; 33 imm32 r4, 0x80abcb39; 34 imm32 r5, 0xb0acef3b; 35 imm32 r6, 0xa00c00dd; 36 imm32 r7, 0x12469003; 37 R1 = R2.L * R2.L, R0 = R2.L * R2.L (S2RND); 38 R3 = R2.L * R3.L, R2 = R2.L * R3.H (S2RND); 39 R5 = R3.L * R2.L, R4 = R3.H * R2.L (S2RND); 40 R7 = R3.L * R3.L, R6 = R3.H * R3.H (S2RND); 41 CHECKREG r0, 0x52CB43E4; 42 CHECKREG r1, 0x52CB43E4; 43 CHECKREG r2, 0x7F5C6CF8; 44 CHECKREG r3, 0x3659B18C; 45 CHECKREG r4, 0x5C88C8E0; 46 CHECKREG r5, 0x80000000; 47 CHECKREG r6, 0x2E26ABC4; 48 CHECKREG r7, 0x602B9240; 49 50 imm32 r0, 0x1b235655; 51 imm32 r1, 0xc4ba5157; 52 imm32 r2, 0x63246755; 53 imm32 r3, 0x00060055; 54 imm32 r4, 0x90abc509; 55 imm32 r5, 0x10acef5b; 56 imm32 r6, 0xb00c005d; 57 imm32 r7, 0x1246705f; 58 R1 = R4.L * R4.L, R0 = R4.L * R4.L (S2RND); 59 R3 = R4.L * R5.L, R2 = R4.L * R5.H (S2RND); 60 R5 = R5.L * R4.L, R4 = R5.H * R4.L (S2RND); 61 R7 = R5.L * R5.L, R6 = R5.H * R5.H (S2RND); 62 CHECKREG r0, 0x36536944; 63 CHECKREG r1, 0x36536944; 64 CHECKREG r2, 0xF0A3C830; 65 CHECKREG r3, 0x0F55C4CC; 66 CHECKREG r4, 0xF0A3C830; 67 CHECKREG r5, 0x0F55C4CC; 68 CHECKREG r6, 0x03AC48E4; 69 CHECKREG r7, 0x36C40A40; 70 71 imm32 r0, 0xab235666; 72 imm32 r1, 0xeaba5166; 73 imm32 r2, 0x13d48766; 74 imm32 r3, 0xf00b0066; 75 imm32 r4, 0x90ab9d69; 76 imm32 r5, 0x10ac5f6b; 77 imm32 r6, 0x800cb66d; 78 imm32 r7, 0x1246707f; 79 R1 = R6.L * R6.L, R0 = R6.L * R6.L (S2RND); 80 R3 = R6.L * R7.L, R2 = R6.L * R7.H (S2RND); 81 R5 = R7.L * R6.L, R4 = R7.H * R6.L (S2RND); 82 R7 = R7.L * R7.L, R6 = R7.H * R7.H (S2RND); 83 CHECKREG r0, 0x5494A9A4; 84 CHECKREG r1, 0x5494A9A4; 85 CHECKREG r2, 0xEAFE2F38; 86 CHECKREG r3, 0x80000000; 87 CHECKREG r4, 0xEAFE2F38; 88 CHECKREG r5, 0x80000000; 89 CHECKREG r6, 0x0537AC90; 90 CHECKREG r7, 0x7FFFFFFF; 91 92 93 // mix order 94 imm32 r0, 0xab23a675; 95 imm32 r1, 0xcfba5127; 96 imm32 r2, 0x13246705; 97 imm32 r3, 0x00060007; 98 imm32 r4, 0x90abcd09; 99 imm32 r5, 0x10acdfdb; 100 imm32 r6, 0x000c000d; 101 imm32 r7, 0x1246f00f; 102 R1 = R3.L * R2.L (M), R0 = R3.L * R2.H (S2RND); 103 R3 = R1.L * R0.H, R2 = R1.H * R0.L (S2RND); 104 R5 = R7.H * R4.L, R4 = R7.H * R4.L (S2RND); 105 R7 = R5.L * R6.L (M), R6 = R5.H * R6.L (S2RND); 106 CHECKREG r0, 0x000217F0; 107 CHECKREG r1, 0x0005A246; 108 CHECKREG r2, 0x0001DEC0; 109 CHECKREG r3, 0xFFFD1230; 110 CHECKREG r4, 0xF172C9D8; 111 CHECKREG r5, 0xF172C9D8; 112 CHECKREG r6, 0xFFFD0B28; 113 CHECKREG r7, 0xFFFA7FF0; 114 115 imm32 r0, 0x9b235a75; 116 imm32 r1, 0xc9ba5127; 117 imm32 r2, 0x13946905; 118 imm32 r3, 0x00090007; 119 imm32 r4, 0x90ab9d09; 120 imm32 r5, 0x10ace9db; 121 imm32 r6, 0x000c0d9d; 122 imm32 r7, 0x12467009; 123 R3 = R6.L * R5.L, R2 = R6.L * R5.H (S2RND); 124 R1 = R3.L * R0.H (M), R0 = R3.H * R0.L (S2RND); 125 R5 = R1.L * R4.L (M), R4 = R1.H * R4.L (S2RND); 126 R7 = R2.H * R7.L, R6 = R2.H * R7.L (S2RND); 127 CHECKREG r0, 0xF9577348; 128 CHECKREG r1, 0x31F9EE68; 129 CHECKREG r2, 0x038BD5F0; 130 CHECKREG r3, 0xFB4A293C; 131 CHECKREG r4, 0xB2B9DB04; 132 CHECKREG r5, 0xEA6A5350; 133 CHECKREG r6, 0x0633BF8C; 134 CHECKREG r7, 0x0633BF8C; 135 136 imm32 r0, 0x8b235675; 137 imm32 r1, 0xc8ba5127; 138 imm32 r2, 0x13846705; 139 imm32 r3, 0x00080007; 140 imm32 r4, 0x90ab8d09; 141 imm32 r5, 0x10ace8db; 142 imm32 r6, 0x000c008d; 143 imm32 r7, 0x12467008; 144 R3 = R6.H * R5.L, R2 = R6.L * R5.H (S2RND); 145 R7 = R2.L * R0.H (M), R6 = R2.H * R0.L (S2RND); 146 R5 = R1.L * R3.L (M), R4 = R1.H * R3.L (S2RND); 147 R1 = R2.H * R7.L, R0 = R2.L * R7.H (S2RND); 148 CHECKREG r0, 0x510340C0; 149 CHECKREG r1, 0xFFDAAA00; 150 CHECKREG r2, 0x0024BAF0; 151 CHECKREG r3, 0xFFFBA910; 152 CHECKREG r4, 0x4B155680; 153 CHECKREG r5, 0x6B2FA2E0; 154 CHECKREG r6, 0x0030A1D0; 155 CHECKREG r7, 0xB4EDBDA0; 156 157 imm32 r0, 0xeb235675; 158 imm32 r1, 0xceba5127; 159 imm32 r2, 0x13e46705; 160 imm32 r3, 0x000e0007; 161 imm32 r4, 0x90abed09; 162 imm32 r5, 0x10aceedb; 163 imm32 r6, 0x000c00ed; 164 imm32 r7, 0x1246700e; 165 R1 = R1.H * R4.L, R0 = R1.H * R4.L (S2RND); 166 R3 = R2.L * R5.L, R2 = R2.L * R5.H (S2RND); 167 R5 = R3.H * R6.L, R4 = R3.L * R6.L (S2RND); 168 R7 = R4.L * R0.H, R6 = R4.H * R0.L (S2RND); 169 CHECKREG r0, 0x0E99DA28; 170 CHECKREG r1, 0x0E99DA28; 171 CHECKREG r2, 0x1AD61D70; 172 CHECKREG r3, 0xE4671D1C; 173 CHECKREG r4, 0x006BCBB0; 174 CHECKREG r5, 0xFF99CD6C; 175 CHECKREG r6, 0xFFC0BAE0; 176 CHECKREG r7, 0xF41170C0; 177 178 179 180 pass 181
Indexes created Tue Aug 11 00:25:38 UTC 2026