1 //Original:/testcases/core/c_dspldst_ld_drlo_ipp/c_dspldst_ld_drlo_ipp.dsp 2 // Spec Reference: c_dspldst ld_drlo_i++/-- 3 # mach: bfin 4 5 .include "testutils.inc" 6 start 7 8 INIT_R_REGS 0; 9 10 loadsym i0, DATA_ADDR_3; 11 loadsym i1, DATA_ADDR_4; 12 loadsym i2, DATA_ADDR_5; 13 loadsym i3, DATA_ADDR_6; 14 15 // Load Lower half of Dregs 16 R0.L = W [ I0 ++ ]; 17 R1.L = W [ I1 ++ ]; 18 R2.L = W [ I2 ++ ]; 19 R3.L = W [ I3 ++ ]; 20 R4.L = W [ I0 ++ ]; 21 R5.L = W [ I1 ++ ]; 22 R6.L = W [ I2 ++ ]; 23 R7.L = W [ I3 ++ ]; 24 CHECKREG r0, 0x00000203; 25 CHECKREG r1, 0x00002223; 26 CHECKREG r2, 0x00004243; 27 CHECKREG r3, 0x00006263; 28 CHECKREG r4, 0x00000001; 29 CHECKREG r5, 0x00002021; 30 CHECKREG r6, 0x00004041; 31 CHECKREG r7, 0x00006061; 32 33 R1.L = W [ I0 ++ ]; 34 R2.L = W [ I1 ++ ]; 35 R3.L = W [ I2 ++ ]; 36 R4.L = W [ I3 ++ ]; 37 R5.L = W [ I0 ++ ]; 38 R6.L = W [ I1 ++ ]; 39 R7.L = W [ I2 ++ ]; 40 R0.L = W [ I3 ++ ]; 41 CHECKREG r0, 0x00006465; 42 CHECKREG r1, 0x00000607; 43 CHECKREG r2, 0x00002627; 44 CHECKREG r3, 0x00004647; 45 CHECKREG r4, 0x00006667; 46 CHECKREG r5, 0x00000405; 47 CHECKREG r6, 0x00002425; 48 CHECKREG r7, 0x00004445; 49 50 R2.L = W [ I0 ++ ]; 51 R3.L = W [ I1 ++ ]; 52 R4.L = W [ I2 ++ ]; 53 R5.L = W [ I3 ++ ]; 54 R6.L = W [ I0 ++ ]; 55 R7.L = W [ I1 ++ ]; 56 R0.L = W [ I2 ++ ]; 57 R1.L = W [ I3 ++ ]; 58 CHECKREG r0, 0x00004849; 59 CHECKREG r1, 0x00006869; 60 CHECKREG r2, 0x00000A0B; 61 CHECKREG r3, 0x00002A2B; 62 CHECKREG r4, 0x00004A4B; 63 CHECKREG r5, 0x00006A6B; 64 CHECKREG r6, 0x00000809; 65 CHECKREG r7, 0x00002829; 66 67 R3.L = W [ I0 ++ ]; 68 R4.L = W [ I1 ++ ]; 69 R5.L = W [ I2 ++ ]; 70 R6.L = W [ I3 ++ ]; 71 R7.L = W [ I0 ++ ]; 72 R0.L = W [ I1 ++ ]; 73 R1.L = W [ I2 ++ ]; 74 R2.L = W [ I3 ++ ]; 75 CHECKREG r0, 0x00002C2D; 76 CHECKREG r1, 0x00004C4D; 77 CHECKREG r2, 0x00006C6D; 78 CHECKREG r3, 0x00000E0F; 79 CHECKREG r4, 0x00002E2F; 80 CHECKREG r5, 0x00004E4F; 81 CHECKREG r6, 0x00006E6F; 82 CHECKREG r7, 0x00000C0D; 83 84 // reverse to minus mninus i-- 85 86 // Load Lower half of Dregs 87 R0.L = W [ I0 -- ]; 88 R1.L = W [ I1 -- ]; 89 R2.L = W [ I2 -- ]; 90 R3.L = W [ I3 -- ]; 91 R4.L = W [ I0 -- ]; 92 R5.L = W [ I1 -- ]; 93 R6.L = W [ I2 -- ]; 94 R7.L = W [ I3 -- ]; 95 CHECKREG r0, 0x00001213; 96 CHECKREG r1, 0x00003233; 97 CHECKREG r2, 0x00005253; 98 CHECKREG r3, 0x00007273; 99 CHECKREG r4, 0x00000C0D; 100 CHECKREG r5, 0x00002C2D; 101 CHECKREG r6, 0x00004C4D; 102 CHECKREG r7, 0x00006C6D; 103 104 R1.L = W [ I0 -- ]; 105 R2.L = W [ I1 -- ]; 106 R3.L = W [ I2 -- ]; 107 R4.L = W [ I3 -- ]; 108 R5.L = W [ I0 -- ]; 109 R6.L = W [ I1 -- ]; 110 R7.L = W [ I2 -- ]; 111 R0.L = W [ I3 -- ]; 112 CHECKREG r0, 0x00006869; 113 CHECKREG r1, 0x00000E0F; 114 CHECKREG r2, 0x00002E2F; 115 CHECKREG r3, 0x00004E4F; 116 CHECKREG r4, 0x00006E6F; 117 CHECKREG r5, 0x00000809; 118 CHECKREG r6, 0x00002829; 119 CHECKREG r7, 0x00004849; 120 121 R2.L = W [ I0 -- ]; 122 R3.L = W [ I1 -- ]; 123 R4.L = W [ I2 -- ]; 124 R5.L = W [ I3 -- ]; 125 R6.L = W [ I0 -- ]; 126 R7.L = W [ I1 -- ]; 127 R0.L = W [ I2 -- ]; 128 R1.L = W [ I3 -- ]; 129 CHECKREG r0, 0x00004445; 130 CHECKREG r1, 0x00006465; 131 CHECKREG r2, 0x00000A0B; 132 CHECKREG r3, 0x00002A2B; 133 CHECKREG r4, 0x00004A4B; 134 CHECKREG r5, 0x00006A6B; 135 CHECKREG r6, 0x00000405; 136 CHECKREG r7, 0x00002425; 137 138 R3.L = W [ I0 -- ]; 139 R4.L = W [ I1 -- ]; 140 R5.L = W [ I2 -- ]; 141 R6.L = W [ I3 -- ]; 142 R7.L = W [ I0 -- ]; 143 R0.L = W [ I1 -- ]; 144 R1.L = W [ I2 -- ]; 145 R2.L = W [ I3 -- ]; 146 CHECKREG r0, 0x00002021; 147 CHECKREG r1, 0x00004041; 148 CHECKREG r2, 0x00006061; 149 CHECKREG r3, 0x00000607; 150 CHECKREG r4, 0x00002627; 151 CHECKREG r5, 0x00004647; 152 CHECKREG r6, 0x00006667; 153 CHECKREG r7, 0x00000001; 154 155 pass 156 157 // Pre-load memory with known data 158 // More data is defined than will actually be used 159 160 .data 161 DATA_ADDR_3: 162 .dd 0x00010203 163 .dd 0x04050607 164 .dd 0x08090A0B 165 .dd 0x0C0D0E0F 166 .dd 0x10111213 167 .dd 0x14151617 168 .dd 0x18191A1B 169 .dd 0x1C1D1E1F 170 .dd 0x11223344 171 .dd 0x55667788 172 .dd 0x99717273 173 .dd 0x74757677 174 .dd 0x82838485 175 .dd 0x86878889 176 .dd 0x80818283 177 .dd 0x84858687 178 .dd 0x01020304 179 .dd 0x05060708 180 .dd 0x09101112 181 .dd 0x14151617 182 .dd 0x18192021 183 .dd 0x22232425 184 .dd 0x26272829 185 .dd 0x30313233 186 .dd 0x34353637 187 .dd 0x38394041 188 .dd 0x42434445 189 .dd 0x46474849 190 .dd 0x50515253 191 .dd 0x54555657 192 .dd 0x58596061 193 .dd 0x62636465 194 .dd 0x66676869 195 196 DATA_ADDR_4: 197 .dd 0x20212223 198 .dd 0x24252627 199 .dd 0x28292A2B 200 .dd 0x2C2D2E2F 201 .dd 0x30313233 202 .dd 0x34353637 203 .dd 0x38393A3B 204 .dd 0x3C3D3E3F 205 .dd 0x91929394 206 .dd 0x95969798 207 .dd 0x99A1A2A3 208 .dd 0xA5A6A7A8 209 .dd 0xA9B0B1B2 210 .dd 0xB3B4B5B6 211 .dd 0xB7B8B9C0 212 .dd 0x70717273 213 .dd 0x74757677 214 .dd 0x78798081 215 .dd 0x82838485 216 .dd 0x86C283C4 217 .dd 0x81C283C4 218 .dd 0x82C283C4 219 .dd 0x83C283C4 220 .dd 0x84C283C4 221 .dd 0x85C283C4 222 .dd 0x86C283C4 223 .dd 0x87C288C4 224 .dd 0x88C283C4 225 .dd 0x89C283C4 226 .dd 0x80C283C4 227 .dd 0x81C283C4 228 .dd 0x82C288C4 229 230 DATA_ADDR_5: 231 .dd 0x40414243 232 .dd 0x44454647 233 .dd 0x48494A4B 234 .dd 0x4C4D4E4F 235 .dd 0x50515253 236 .dd 0x54555657 237 .dd 0x58595A5B 238 .dd 0xC5C6C7C8 239 .dd 0xC9CACBCD 240 .dd 0xCFD0D1D2 241 .dd 0xD3D4D5D6 242 .dd 0xD7D8D9DA 243 .dd 0xDBDCDDDE 244 .dd 0xDFE0E1E2 245 .dd 0xE3E4E5E6 246 .dd 0x91E899EA 247 .dd 0x92E899EA 248 .dd 0x93E899EA 249 .dd 0x94E899EA 250 .dd 0x95E899EA 251 .dd 0x96E899EA 252 .dd 0x97E899EA 253 .dd 0x98E899EA 254 .dd 0x99E899EA 255 .dd 0x91E899EA 256 .dd 0x92E899EA 257 .dd 0x93E899EA 258 .dd 0x94E899EA 259 .dd 0x95E899EA 260 .dd 0x96E899EA 261 .dd 0x977899EA 262 263 DATA_ADDR_6: 264 .dd 0x60616263 265 .dd 0x64656667 266 .dd 0x68696A6B 267 .dd 0x6C6D6E6F 268 .dd 0x70717273 269 .dd 0x74757677 270 .dd 0x78797A7B 271 .dd 0x7C7D7E7F 272 .dd 0xEBECEDEE 273 .dd 0xF3F4F5F6 274 .dd 0xF7F8F9FA 275 .dd 0xFBFCFDFE 276 .dd 0xFF000102 277 .dd 0x03040506 278 .dd 0x0708090A 279 .dd 0x0B0CAD0E 280 .dd 0xAB0CAD01 281 .dd 0xAB0CAD02 282 .dd 0xAB0CAD03 283 .dd 0xAB0CAD04 284 .dd 0xAB0CAD05 285 .dd 0xAB0CAD06 286 .dd 0xAB0CAA07 287 .dd 0xAB0CAD08 288 .dd 0xAB0CAD09 289 .dd 0xAB0CAD0E 290 .dd 0xAB0CAD0E 291 .dd 0xAB0CAD0E 292 .dd 0xAB0CAD0E 293 .dd 0xAB0CAD0E 294 .dd 0xAB0CAD0E 295 .dd 0xAB0CAD0E 296 297 DATA_ADDR_7: 298 .dd 0x80818283 299 .dd 0x84858687 300 .dd 0x88898A8B 301 .dd 0x8C8D8E8F 302 .dd 0x90919293 303 .dd 0x94959697 304 .dd 0x98999A9B 305 .dd 0x9C9D9E9F 306 .dd 0x0F101213 307 .dd 0x14151617 308 .dd 0x18191A1B 309 .dd 0x1C1D1E1F 310 .dd 0x20212223 311 .dd 0x24252627 312 .dd 0x28292A2B 313 .dd 0x2C2D2E2F 314 .dd 0xBC0DBE21 315 .dd 0xBC1DBE22 316 .dd 0xBC2DBE23 317 .dd 0xBC3DBE24 318 .dd 0xBC4DBE65 319 .dd 0xBC5DBE27 320 .dd 0xBC6DBE28 321 .dd 0xBC7DBE29 322 .dd 0xBC8DBE2F 323 .dd 0xBC9DBE20 324 .dd 0xBCADBE21 325 .dd 0xBCBDBE2F 326 .dd 0xBCCDBE23 327 .dd 0xBCDDBE24 328 .dd 0xBCFDBE25 329 .dd 0xBC0DBE26 330 331 DATA_ADDR_8: 332 .dd 0xA0A1A2A3 333 .dd 0xA4A5A6A7 334 .dd 0xA8A9AAAB 335 .dd 0xACADAEAF 336 .dd 0xB0B1B2B3 337 .dd 0xB4B5B6B7 338 .dd 0xB8B9BABB 339 .dd 0xBCBDBEBF 340 .dd 0xC0C1C2C3 341 .dd 0xC4C5C6C7 342 .dd 0xC8C9CACB 343 .dd 0xCCCDCECF 344 .dd 0xD0D1D2D3 345 .dd 0xD4D5D6D7 346 .dd 0xD8D9DADB 347 .dd 0xDCDDDEDF 348 .dd 0xE0E1E2E3 349 .dd 0xE4E5E6E7 350 .dd 0xE8E9EAEB 351 .dd 0xECEDEEEF 352 .dd 0xF0F1F2F3 353 .dd 0xF4F5F6F7 354 .dd 0xF8F9FAFB 355 .dd 0xFCFDFEFF 356
Indexes created Tue Aug 11 00:25:38 UTC 2026