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      1 divert(-1)
      2 
      3 dnl  m4 macros for Alpha assembler.
      4 
      5 dnl  Copyright 2003, 2004 Free Software Foundation, Inc.
      6 
      7 dnl  This file is part of the GNU MP Library.
      8 dnl
      9 dnl  The GNU MP Library is free software; you can redistribute it and/or modify
     10 dnl  it under the terms of either:
     11 dnl
     12 dnl    * the GNU Lesser General Public License as published by the Free
     13 dnl      Software Foundation; either version 3 of the License, or (at your
     14 dnl      option) any later version.
     15 dnl
     16 dnl  or
     17 dnl
     18 dnl    * the GNU General Public License as published by the Free Software
     19 dnl      Foundation; either version 2 of the License, or (at your option) any
     20 dnl      later version.
     21 dnl
     22 dnl  or both in parallel, as here.
     23 dnl
     24 dnl  The GNU MP Library is distributed in the hope that it will be useful, but
     25 dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
     26 dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
     27 dnl  for more details.
     28 dnl
     29 dnl  You should have received copies of the GNU General Public License and the
     30 dnl  GNU Lesser General Public License along with the GNU MP Library.  If not,
     31 dnl  see https://www.gnu.org/licenses/.
     32 
     33 
     34 dnl  Usage: ASSERT([reg] [,code])
     35 dnl
     36 dnl  Require that the given reg is non-zero after executing the test code.
     37 dnl  For example,
     38 dnl
     39 dnl         ASSERT(r8,
     40 dnl         `       cmpult r16, r17, r8')
     41 dnl
     42 dnl  If the register argument is empty then nothing is tested, the code is
     43 dnl  just executed.  This can be used for setups required by later ASSERTs.
     44 dnl  If the code argument is omitted then the register is just tested, with
     45 dnl  no special setup code.
     46 
     47 define(ASSERT,
     48 m4_assert_numargs_range(1,2)
     49 m4_assert_defined(`WANT_ASSERT')
     50 `ifelse(WANT_ASSERT,1,
     51 `ifelse(`$2',,,`$2')
     52 ifelse(`$1',,,
     53 `	bne	$1, L(ASSERTok`'ASSERT_label_counter)
     54 	.long	0	C halt
     55 L(ASSERTok`'ASSERT_label_counter):
     56 define(`ASSERT_label_counter',eval(ASSERT_label_counter+1))
     57 ')
     58 ')')
     59 define(`ASSERT_label_counter',1)
     60 
     61 
     62 dnl  Usage: bigend(`code')
     63 dnl
     64 dnl  Emit the given code only for a big-endian system, like Unicos.  This
     65 dnl  can be used for instance for extra stuff needed by extwl.
     66 
     67 define(bigend,
     68 m4_assert_numargs(1)
     69 `ifdef(`HAVE_LIMB_BIG_ENDIAN',`$1',
     70 `ifdef(`HAVE_LIMB_LITTLE_ENDIAN',`',
     71 `m4_error(`Cannot assemble, unknown limb endianness')')')')
     72 
     73 
     74 dnl  Usage: bwx_available_p
     75 dnl
     76 dnl  Evaluate to 1 if the BWX byte memory instructions are available, or to
     77 dnl  0 if not.
     78 dnl
     79 dnl  Listing the chips which do have BWX means anything we haven't looked at
     80 dnl  will use safe non-BWX code.  The only targets without BWX currently are
     81 dnl  plain alpha (ie. ev4) and alphaev5.
     82 
     83 define(bwx_available_p,
     84 m4_assert_numargs(-1)
     85 `m4_ifdef_anyof_p(
     86 	`HAVE_HOST_CPU_alphaev56',
     87 	`HAVE_HOST_CPU_alphapca56',
     88 	`HAVE_HOST_CPU_alphapca57',
     89 	`HAVE_HOST_CPU_alphaev6',
     90 	`HAVE_HOST_CPU_alphaev67',
     91 	`HAVE_HOST_CPU_alphaev68',
     92 	`HAVE_HOST_CPU_alphaev69',
     93 	`HAVE_HOST_CPU_alphaev7',
     94 	`HAVE_HOST_CPU_alphaev79')')
     95 
     96 
     97 dnl  Usage: unop
     98 dnl
     99 dnl  The Cray Unicos assembler lacks unop, so give the equivalent ldq_u
    100 dnl  explicitly.
    101 
    102 define(unop,
    103 m4_assert_numargs(-1)
    104 `ldq_u	r31, 0(r30)')
    105 
    106 
    107 divert
    108