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      1 /*	$NetBSD: _setjmp.S,v 1.20 2025/05/08 00:28:31 uwe Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1997 Mark Brinicombe
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *	This product includes software developed by Mark Brinicombe
     18  * 4. Neither the name of the University nor the names of its contributors
     19  *    may be used to endorse or promote products derived from this software
     20  *    without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  * SUCH DAMAGE.
     33  */
     34 
     35 #if !defined(__SOFTFP__) && !defined(__VFP_FP__) && !defined(__ARM_PCS)
     36 #error FPA is not supported anymore
     37 #endif
     38 
     39 #if defined(__ARM_EABI__) && !defined(__ARM_PCS_VFP)
     40 	.fpu	vfp
     41 #endif
     42 
     43 #include <machine/asm.h>
     44 #include <machine/setjmp.h>
     45 
     46 /*
     47  * C library -- _setjmp, _longjmp
     48  *
     49  *	_longjmp(a,v)
     50  * will generate a "return(v)" from the last call to
     51  *	_setjmp(a)
     52  * by restoring registers from the stack.
     53  * The previous signal state is NOT restored.
     54  *
     55  * Note: r0 is the return value
     56  *       r1-r3,ip are scratch registers in functions
     57  */
     58 
     59 ENTRY(_setjmp)
     60 	ldr	r1, .L_setjmp_magic
     61 
     62 #if defined(__ARM_EABI__) && (!defined(__thumb__) || defined(_ARM_ARCH_T2))
     63 	ldr	r2, .Lfpu_present
     64 #ifdef __PIC__
     65 	add	r2, r2, pc	/* pc = &.LPIC0 */
     66 #endif
     67 	ldr	r2, [r2]
     68 .LPIC0:
     69 #if defined(__thumb__) && defined(_ARM_ARCH_T2)
     70 	cbz	r2, 1f
     71 #else
     72 	cmp	r2, #0		/* do we have a FPU? */
     73 	beq	1f		/*   no, don't save VFP registers */
     74 #endif
     75 
     76 	orrs	r1, r1, #(_JB_MAGIC__SETJMP ^ _JB_MAGIC__SETJMP_VFP)
     77 				/* change magic to VFP magic */
     78 	adds	r2, r0, #(_JB_REG_D8 * 4)
     79 	vstmia	r2, {d8-d15}
     80 	vmrs	r2, fpscr
     81 	str	r2, [r0, #(_JB_REG_FPSCR * 4)]
     82 1:
     83 #endif /* __ARM_EABI__ && (_ARM_ARCH_T2 || !__thumb__) */
     84 
     85 	str	r1, [r0]
     86 
     87 	adds	r0, r0, #(_JB_REG_R4 * 4)
     88 	/* Store integer registers */
     89 #if !defined(__thumb__) || defined(_ARCH_ARCH_T2)
     90 	stmia	r0, {r4-r14}
     91 #else
     92 	stmia	r0!, {r4-r7}
     93 	mov	r1, r8
     94 	mov	r2, r9
     95 	mov	r3, r10
     96 	stmia	r0!, {r1-r3}
     97 	mov	r2, r11
     98 	mov	r3, r12
     99 	stmia	r0!, {r2-r3}
    100 	mov	r2, sp
    101 	mov	r3, lr
    102 	stmia	r0!, {r2-r3}
    103 #endif
    104 
    105 	movs	r0, #0
    106 	RET
    107 
    108 #if defined(__ARM_EABI__) && (!defined(__thumb__) || defined(_ARM_ARCH_T2))
    109 	.align	0
    110 .Lfpu_present:
    111 	.word	REL_SYM(_libc_arm_fpu_present, .LPIC0)
    112 #endif /* __ARM_EABI__ && (_ARM_ARCH_T2 || !__thumb__) */
    113 END(_setjmp)
    114 
    115 ENTRY(_longjmp)
    116 	ldr	r2, [r0]			/* get magic from jmp_buf */
    117 #if !defined(__thumb__) || defined(_ARM_ARCH_T2)
    118 	bics	r3, r2, #(_JB_MAGIC__SETJMP ^ _JB_MAGIC__SETJMP_VFP)
    119 						/* ignore VFP-ness of magic */
    120 	ldr	ip, .L_setjmp_magic		/* load magic */
    121 #else
    122 	ldr	r3, .L_setjmp_magic		/* load magic */
    123 	mov	ip, r3
    124 	movs	r3, #(_JB_MAGIC__SETJMP ^ _JB_MAGIC__SETJMP_VFP)
    125 	ands	r3, r3, r2
    126 	eors	r3, r3, r2			/* ignore VFP-ness of magic */
    127 #endif
    128 	cmp	ip, r3				/* magic correct? */
    129 	bne	botch				/*   no, botch */
    130 
    131 #if defined(__ARM_EABI__) && (!defined(__thumb__) || defined(_ARM_ARCH_T2))
    132 	cmp	r3, r2				/* did magic change? */
    133 	beq	1f				/*   no, don't restore VFP */
    134 	adds	r3, r0, #(_JB_REG_D8 * 4)
    135 	vldmia	r3, {d8-d15}
    136 	ldr	r3, [r0, #(_JB_REG_FPSCR * 4)]
    137 	vmsr	fpscr, r3
    138 1:
    139 #endif /* __ARM_EABI__ && (_ARM_ARCH_T2 || !__thumb__) */
    140 
    141 	adds	r0, r0, #(_JB_REG_R4 * 4)
    142 	/* Restore integer registers */
    143 #if !defined(__thumb__) || defined(_ARM_ARCH_T2)
    144 	ldmia	r0!, {r4-r12}
    145 #else
    146 	ldmia	r0!, {r4-r7}
    147 	ldmia	r0!, {r2-r3}
    148 	mov	r8, r2
    149 	mov	r9, r3
    150 	ldmia	r0!, {r2-r3}
    151 	mov	r10, r2
    152 	movs	r1, r3
    153 	adds	r0, r0, #4		/* skip r12 */
    154 #endif
    155 	ldmia	r0!, {r2-r3}		/* r2 = sp, r3 = lr */
    156 
    157 	/* Validate sp and r14 */
    158 #if defined(__thumb__) && defined(_ARM_ARCH_T2)
    159 	cbz	r2, botch
    160 #else
    161 	cmp	r2, #0
    162 	beq	botch
    163 #endif
    164 	mov	sp, r2
    165 
    166 #if defined(__thumb__) && defined(_ARM_ARCH_T2)
    167 	cbz	r3, botch
    168 #else
    169 	cmp	r3, #0
    170 	beq	botch
    171 #endif
    172 	mov	lr, r3
    173 
    174 	/* Set return value */
    175 	movs	r0, r1
    176 #ifdef __thumb__
    177 	bne	1f
    178 	movs	r0, #1
    179 1:
    180 #else
    181 	moveq	r0, #1
    182 #endif
    183 	RET
    184 
    185 	/* validation failed, die die die. */
    186 botch:
    187 	bl	PLT_SYM(_C_LABEL(longjmperror))
    188 	bl	PLT_SYM(_C_LABEL(abort))
    189 1:	b	1b		/* Cannot get here */
    190 
    191 	.align	0
    192 .L_setjmp_magic:
    193 	.word	_JB_MAGIC__SETJMP
    194 END(_longjmp)
    195