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      1 /*	$NetBSD: compat___sigtramp1.S,v 1.1 2005/10/15 22:11:22 uwe Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1996 Paul Kranenburg
      5  * Copyright (c) 1996
      6  * 	The President and Fellows of Harvard College. All rights reserved.
      7  * Copyright (c) 1992, 1993
      8  *	The Regents of the University of California.  All rights reserved.
      9  *
     10  * This software was developed by the Computer Systems Engineering group
     11  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
     12  * contributed to Berkeley.
     13  *
     14  * All advertising materials mentioning features or use of this software
     15  * must display the following acknowledgement:
     16  *	This product includes software developed by the University of
     17  *	California, Lawrence Berkeley Laboratory.
     18  *	This product includes software developed by Harvard University.
     19  *
     20  * Redistribution and use in source and binary forms, with or without
     21  * modification, are permitted provided that the following conditions
     22  * are met:
     23  * 1. Redistributions of source code must retain the above copyright
     24  *    notice, this list of conditions and the following disclaimer.
     25  * 2. Redistributions in binary form must reproduce the above copyright
     26  *    notice, this list of conditions and the following disclaimer in the
     27  *    documentation and/or other materials provided with the distribution.
     28  * 3. All advertising materials mentioning features or use of this software
     29  *    must display the following acknowledgement:
     30  *	This product includes software developed by Harvard University.
     31  *	This product includes software developed by Paul Kranenburg.
     32  * 4. Neither the name of the University nor the names of its contributors
     33  *    may be used to endorse or promote products derived from this software
     34  *    without specific prior written permission.
     35  *
     36  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     37  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     38  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     39  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     40  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     41  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     42  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     43  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     44  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     45  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     46  * SUCH DAMAGE.
     47  */
     48 
     49 #include "SYS.h"
     50 
     51 #define _LOCORE
     52 #include <machine/frame.h>
     53 #include <machine/psl.h>
     54 #include <machine/signal.h>
     55 
     56 /*
     57  * When this code is run, the stack looks like:
     58  *	[%sp]		64 bytes to which registers can be dumped
     59  *	[%sp + 64]	signal number (goes in %o0)
     60  *	[%sp + 64 + 4]	signal code (goes in %o1)
     61  *	[%sp + 64 + 8]	placeholder
     62  *	[%sp + 64 + 12]	argument for %o3, currently unsupported (always 0)
     63  *	[%sp + 64 + 16]	first word of saved state (sigcontext)
     64  *	    .
     65  *	    .
     66  *	    .
     67  *	[%sp + NNN]	last word of saved state
     68  * (followed by previous stack contents or top of signal stack).
     69  * The address of the function to call is in %g1; the old %g1 and %o0
     70  * have already been saved in the sigcontext.  We are running in a clean
     71  * window, all previous windows now being saved to the stack.
     72  *
     73  * Note that [%sp + 64 + 8] == %sp + 64 + 16.  The copy at %sp+64+8
     74  * will eventually be removed, with a hole left in its place, if things
     75  * work out.
     76  */
     77 #define SAVE_STATE \
     78 	/* \
     79 	 * XXX  the `save' and `restore' below are unnecessary: should \
     80 	 *	replace with simple arithmetic on %sp \
     81 	 * \
     82 	 * Make room on the stack for 32 %f registers + %fsr.  This comes \
     83 	 * out to 33*4 or 132 bytes, but this must be aligned to a multiple \
     84 	 * of 8, or 136 bytes. \
     85 	 */ \
     86 	save	%sp, -CCFSZ - 136, %sp; \
     87 	mov	%g2, %l2;		/* save globals in %l registers */ \
     88 	mov	%g3, %l3; \
     89 	mov	%g4, %l4; \
     90 	mov	%g5, %l5; \
     91 	mov	%g6, %l6; \
     92 	mov	%g7, %l7; \
     93 	/* \
     94 	 * Saving the fpu registers is expensive, so do it iff the fsr \
     95 	 * stored in the sigcontext shows that the fpu is enabled. \
     96 	 */ \
     97 	ld	[%fp + 64 + 16 + SC_PSR_OFFSET], %l0; \
     98 	sethi	%hi(PSR_EF), %l1;	/* FPU enable is too high for andcc */ \
     99 	andcc	%l0, %l1, %l0;		/* %l0 = fpu enable bit */ \
    100 	be	1f;			/* if not set, skip the saves */ \
    101 	 rd	%y, %l1;		/* in any case, save %y */ \
    102 	/* fpu is enabled, oh well */ \
    103 	st	%fsr, [%sp + CCFSZ + 0]; \
    104 	std	%f0, [%sp + CCFSZ + 8]; \
    105 	std	%f2, [%sp + CCFSZ + 16]; \
    106 	std	%f4, [%sp + CCFSZ + 24]; \
    107 	std	%f6, [%sp + CCFSZ + 32]; \
    108 	std	%f8, [%sp + CCFSZ + 40]; \
    109 	std	%f10, [%sp + CCFSZ + 48]; \
    110 	std	%f12, [%sp + CCFSZ + 56]; \
    111 	std	%f14, [%sp + CCFSZ + 64]; \
    112 	std	%f16, [%sp + CCFSZ + 72]; \
    113 	std	%f18, [%sp + CCFSZ + 80]; \
    114 	std	%f20, [%sp + CCFSZ + 88]; \
    115 	std	%f22, [%sp + CCFSZ + 96]; \
    116 	std	%f24, [%sp + CCFSZ + 104]; \
    117 	std	%f26, [%sp + CCFSZ + 112]; \
    118 	std	%f28, [%sp + CCFSZ + 120]; \
    119 	std	%f30, [%sp + CCFSZ + 128]; \
    120 1:
    121 
    122 #define RESTORE_STATE \
    123 	/* \
    124 	 * Now that the handler has returned, re-establish all the state \
    125 	 * we just saved above, then do a sigreturn. \
    126 	 */ \
    127 	tst	%l0;			/* reload fpu registers? */ \
    128 	be	1f;			/* if not, skip the loads */ \
    129 	 wr	%l1, %g0, %y;		/* in any case, restore %y */ \
    130 	ld	[%sp + CCFSZ + 0], %fsr; \
    131 	ldd	[%sp + CCFSZ + 8], %f0; \
    132 	ldd	[%sp + CCFSZ + 16], %f2; \
    133 	ldd	[%sp + CCFSZ + 24], %f4; \
    134 	ldd	[%sp + CCFSZ + 32], %f6; \
    135 	ldd	[%sp + CCFSZ + 40], %f8; \
    136 	ldd	[%sp + CCFSZ + 48], %f10; \
    137 	ldd	[%sp + CCFSZ + 56], %f12; \
    138 	ldd	[%sp + CCFSZ + 64], %f14; \
    139 	ldd	[%sp + CCFSZ + 72], %f16; \
    140 	ldd	[%sp + CCFSZ + 80], %f18; \
    141 	ldd	[%sp + CCFSZ + 88], %f20; \
    142 	ldd	[%sp + CCFSZ + 96], %f22; \
    143 	ldd	[%sp + CCFSZ + 104], %f24; \
    144 	ldd	[%sp + CCFSZ + 112], %f26; \
    145 	ldd	[%sp + CCFSZ + 120], %f28; \
    146 	ldd	[%sp + CCFSZ + 128], %f30; \
    147 1: \
    148 	mov	%l2, %g2; \
    149 	mov	%l3, %g3; \
    150 	mov	%l4, %g4; \
    151 	mov	%l5, %g5; \
    152 	mov	%l6, %g6; \
    153 	mov	%l7, %g7
    154 
    155 ENTRY_NOPROFILE(__sigtramp_sigcontext_1)
    156 	SAVE_STATE
    157 
    158 	ldd	[%fp + 64], %o0		/* sig, code */
    159 	ld	[%fp + 76], %o3		/* arg3 */
    160 	call	%g1			/* call handler */
    161 	 add	%fp, 64 + 16, %o2	/* pointer to sigcontext */
    162 
    163 	RESTORE_STATE
    164 
    165 	/* Get registers back and set syscall # */
    166 	restore	%g0, SYS_compat_16___sigreturn14, %g1
    167 	add	%sp, 64 + 16, %o0	/* compute scp */
    168 	t	ST_SYSCALL		/* call sigreturn */
    169 	mov	SYS_exit, %g1		/* exit with errno */
    170 	t	ST_SYSCALL		/* if sigreturn fails */
    171