1 /*- 2 * Copyright (c) 2016 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Matt Thomas of 3am Software Foundry. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include <mips/asm.h> 31 32 RCSID("$NetBSD: fpsf.S,v 1.1 2016/07/14 01:59:18 matt Exp $") 33 34 /* 35 * This file provides softfloat compatible routines which use FP instructions 36 * to do the actual work. This should give near hard-float performance while 37 * being compatible with soft-float code. 38 * 39 * This file implements the single precision floating point routines. 40 */ 41 42 #ifdef MIPS3 43 #define COP1_SYNC nop 44 #else 45 #define COP1_SYNC 46 #endif 47 48 LEAF_NOPROFILE(__addsf3) 49 mtc1 a0, $f12 50 mtc1 a1, $f14 51 COP1_SYNC 52 add.s $f0, $f12, $f14 53 mfc1 v0, $f0 54 jr ra 55 END(__addsf3) 56 57 LEAF_NOPROFILE(__subsf3) 58 mtc1 a0, $f12 59 mtc1 a1, $f14 60 COP1_SYNC 61 sub.s $f0, $f12, $f14 62 mfc1 v0, $f0 63 jr ra 64 END(__subsf3) 65 66 LEAF_NOPROFILE(__mulsf3) 67 mtc1 a0, $f12 68 mtc1 a1, $f14 69 COP1_SYNC 70 mul.s $f0, $f12, $f14 71 mfc1 v0, $f0 72 jr ra 73 END(__mulsf3) 74 75 LEAF_NOPROFILE(__divsf3) 76 mtc1 a0, $f12 77 mtc1 a1, $f14 78 COP1_SYNC 79 div.s $f0, $f12, $f14 80 mfc1 v0, $f0 81 jr ra 82 END(__divsf3) 83 84 LEAF_NOPROFILE(__negsf2) 85 mtc1 a0, $f12 86 COP1_SYNC 87 neg.s $f0, $f12 88 mfc1 v0, $f0 89 jr ra 90 END(__negsf2) 91 92 LEAF_NOPROFILE(__truncdfsf2) 93 dmtc1 a0, $f12 94 COP1_SYNC 95 cvt.s.d $f0, $f12 96 mfc1 v0, $f0 97 jr ra 98 END(__truncdfsf2) 99 100 LEAF_NOPROFILE(__fixsfdi) 101 mtc1 a0, $f12 102 COP1_SYNC 103 trunc.l.s $f0, $f12 104 dmfc1 v0, $f0 105 jr ra 106 END(__fixsfdi) 107 108 LEAF_NOPROFILE(__fixsfsi) 109 mtc1 a0, $f12 110 COP1_SYNC 111 trunc.w.s $f0, $f12 112 mfc1 v0, $f0 113 jr ra 114 END(__fixsfsi) 115 116 LEAF_NOPROFILE(__fixunssfdi) 117 lui t0, 0x5f00 # 9223372036854775808.0 118 mtc1 t0, $f0 119 mtc1 a0, $f12 120 COP1_SYNC 121 sub.s $f0, $f12, $f0 # convert to signed 122 trunc.l.s $f0, $f0 123 dmfc1 v0, $f0 124 li v1, 1 125 dsll v1, v1, 63 126 add v0, v0, v1 # convert to unsigned 127 jr ra 128 END(__fixunssfdi) 129 130 LEAF_NOPROFILE(__fixunssfsi) 131 lui t0, 0x4f00 # 2147483648.0 132 mtc1 t0, $f0 133 mtc1 a0, $f12 134 COP1_SYNC 135 sub.s $f0, $f12, $f0 # convert to signed 136 trunc.w.s $f0, $f0 137 mfc1 v0, $f0 138 lui v1, 0x8000 # 0xffffffff80000000 139 add v0, v0, v1 # convert to unsigned 140 jr ra 141 END(__fixunssfsi) 142 143 LEAF_NOPROFILE(__floatdisf) 144 dmtc1 a0, $f12 145 COP1_SYNC 146 cvt.s.l $f0, $f12 147 mfc1 v0, $f0 148 jr ra 149 END(__floatdisf) 150 151 LEAF_NOPROFILE(__floatsisf) 152 mtc1 a0, $f12 153 COP1_SYNC 154 cvt.s.w $f0, $f12 155 mfc1 v0, $f0 156 jr ra 157 END(__floatsisf) 158 159 LEAF_NOPROFILE(__floatundisf) 160 li t0, 1 161 dsll t0, t0, 63 # 9223372036854775808.0 162 dsub a0, a0, t0 # convert to signed 163 dmtc1 a0, $f12 164 dmtc1 t0, $f14 165 COP1_SYNC 166 cvt.s.l $f0, $f12 167 cvt.s.l $f2, $f14 168 add.s $f0, $f0, $f2 # convert back to unsigned 169 mfc1 v0, $f0 170 jr ra 171 END(__floatundisf) 172 173 LEAF_NOPROFILE(__floatunsisf) 174 sll a0, a0, 0 # sign extend to 64 bits 175 dmtc1 a0, $f12 176 COP1_SYNC 177 cvt.s.l $f0, $f12 178 mfc1 v0, $f0 179 jr ra 180 END(__floatunsisf) 181 182 STRONG_ALIAS(__eqsf2, __nedf2) 183 LEAF_NOPROFILE(__nesf2) 184 .set push 185 .set noreorder 186 mtc1 a0, $f12 187 mtc1 a1, $f14 188 COP1_SYNC 189 c.eq.s $f12, $f14 190 bc1f 2f 191 li v0, 1 192 move v0, zero 193 2: jr ra 194 nop 195 .set pop 196 END(__nesf2) 197 198 STRONG_ALIAS(__gesf2, __ltdf2) 199 LEAF_NOPROFILE(__ltsf2) 200 .set push 201 .set noreorder 202 mtc1 a0, $f12 203 mtc1 a1, $f14 204 COP1_SYNC 205 c.olt.s $f12, $f14 206 bc1t 2f 207 li v0, -1 208 move v0, zero 209 2: jr ra 210 nop 211 .set pop 212 END(__ltsf2) 213 214 STRONG_ALIAS(__gtsf2, __ledf2) 215 LEAF_NOPROFILE(__lesf2) 216 .set push 217 .set noreorder 218 mtc1 a0, $f12 219 mtc1 a1, $f14 220 COP1_SYNC 221 c.ole.s $f12, $f14 222 bc1f 2f 223 li v0, 1 224 move v0, zero 225 2: jr ra 226 nop 227 .set pop 228 END(__lesf2) 229 230 LEAF_NOPROFILE(__unordsf2) 231 .set push 232 .set noreorder 233 mtc1 a0, $f12 234 mtc1 a1, $f14 235 COP1_SYNC 236 c.un.s $f12, $f14 237 bc1t 2f 238 li v0, 1 239 move v0, zero 240 2: jr ra 241 nop 242 .set pop 243 END(__unordsf2) 244
Indexes created Sat Sep 20 22:09:52 GMT 2025