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.Dd February 17, 2017 .Dt MEMC 4 mvme68k .Os .Sh NAME .Nm memc .Nd MVME162-MVME177 Memory Controller Chip .Sh SYNOPSIS .Cd "memc* at mainbus0" .Sh DESCRIPTION The .Nm devices are used on MVME162, MVME167, MVME172 and MVME177 boards to manage one or more DRAM modules.
p Depending on the type of DRAM module fitted, the device will either be a MEMC040 device or an MCECC device. The former manages a Parity DRAM module while the latter manages an ECC DRAM module. .Sh DIAGNOSTICS l -diag -compact t memc0 at mainbus0. This is the normal autoconfiguration message indicating that the Memory Controller Chip has been found and attached to the main processor bus. t memc0: Correctable error on CPU read access to 0x12345678. This indicates that an MCECC memory controller detected and corrected a single bit error in one of the DRAM banks. There are a few variations on the message where "CPU" can be replaced with "Peripheral Device" or "Scrubber", and "read" can be substituted for "write". This message is followed by some more details which can help pin-point the error... t memc0: ECC Syndrome 0x23 (DRAM Bank C, Bit#16). Pin-points exactly where the error occurred. t memc0: Uncorrectable error on CPU read access to 0x12345678. Errors like this have the potential to corrupt data. As such, it is likely the system will panic very soon afterwards. .El .Sh SEE ALSO .Xr mvme68k/mainbus 4 .Sh BUGS The .Nm driver does not yet fully support the MEMC040 (Parity) version of the device.
Indexes created Mon Sep 22 05:09:51 GMT 2025