1 /* $NetBSD: hypervisor.h,v 1.3 2021/08/30 22:32:06 jmcneill Exp $ */ 2 /*- 3 * Copyright (c) 2013, 2014 Andrew Turner 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD: head/sys/arm64/include/hypervisor.h 281494 2015-04-13 14:43:10Z andrew $ 28 */ 29 30 #ifndef _MACHINE_HYPERVISOR_H_ 31 #define _MACHINE_HYPERVISOR_H_ 32 33 /* 34 * These registers are only useful when in hypervisor context, 35 * e.g. specific to EL2, or controlling the hypervisor. 36 */ 37 38 /* 39 * Architectural Feature Trap Register (CPTR_EL2) 40 */ 41 #define CPTR_RES0 0x7fefc800 42 #define CPTR_RES1 0x000033ff 43 #define CPTR_TFP 0x00000400 44 #define CPTR_TTA 0x00100000 45 #define CPTR_TAM 0x40000000 46 #define CPTR_TCPAC 0x80000000 47 48 /* 49 * Hypervisor Configuration Register (HCR_EL2) 50 */ 51 #define HCR_VM 0x0000000000000001 52 #define HCR_SWIO 0x0000000000000002 53 #define HCR_PTW 0x0000000000000004 54 #define HCR_FMO 0x0000000000000008 55 #define HCR_IMO 0x0000000000000010 56 #define HCR_AMO 0x0000000000000020 57 #define HCR_VF 0x0000000000000040 58 #define HCR_VI 0x0000000000000080 59 #define HCR_VSE 0x0000000000000100 60 #define HCR_FB 0x0000000000000200 61 #define HCR_BSU_MASK 0x0000000000000c00 62 #define HCR_DC 0x0000000000001000 63 #define HCR_TWI 0x0000000000002000 64 #define HCR_TWE 0x0000000000004000 65 #define HCR_TID0 0x0000000000008000 66 #define HCR_TID1 0x0000000000010000 67 #define HCR_TID2 0x0000000000020000 68 #define HCR_TID3 0x0000000000040000 69 #define HCR_TSC 0x0000000000080000 70 #define HCR_TIDCP 0x0000000000100000 71 #define HCR_TACR 0x0000000000200000 72 #define HCR_TSW 0x0000000000400000 73 #define HCR_TPC 0x0000000000800000 74 #define HCR_TPU 0x0000000001000000 75 #define HCR_TTLB 0x0000000002000000 76 #define HCR_TVM 0x0000000004000000 77 #define HCR_TGE 0x0000000008000000 78 #define HCR_TDZ 0x0000000010000000 79 #define HCR_HCD 0x0000000020000000 80 #define HCR_TRVM 0x0000000040000000 81 #define HCR_RW 0x0000000080000000 82 #define HCR_CD 0x0000000100000000 83 #define HCR_ID 0x0000000200000000 84 #define HCR_E2H 0x0000000400000000 85 #define HCR_ATA 0x0100000000000000 86 87 /* 88 * Hypervisor System Trap Register (HSTR_EL2) 89 */ 90 #define HSTR_T(n) (1 << (n)) 91 92 #endif 93 94
Indexes created Sat Sep 20 22:09:52 GMT 2025