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pmap.h revision 1.10
      1  1.10  jakllsch /* $NetBSD: pmap.h,v 1.10 2018/09/15 19:47:48 jakllsch Exp $ */
      2   1.1      matt 
      3   1.1      matt /*-
      4   1.1      matt  * Copyright (c) 2014 The NetBSD Foundation, Inc.
      5   1.1      matt  * All rights reserved.
      6   1.1      matt  *
      7   1.1      matt  * This code is derived from software contributed to The NetBSD Foundation
      8   1.1      matt  * by Matt Thomas of 3am Software Foundry.
      9   1.1      matt  *
     10   1.1      matt  * Redistribution and use in source and binary forms, with or without
     11   1.1      matt  * modification, are permitted provided that the following conditions
     12   1.1      matt  * are met:
     13   1.1      matt  * 1. Redistributions of source code must retain the above copyright
     14   1.1      matt  *    notice, this list of conditions and the following disclaimer.
     15   1.1      matt  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1      matt  *    notice, this list of conditions and the following disclaimer in the
     17   1.1      matt  *    documentation and/or other materials provided with the distribution.
     18   1.1      matt  *
     19   1.1      matt  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20   1.1      matt  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21   1.1      matt  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22   1.1      matt  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23   1.1      matt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24   1.1      matt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25   1.1      matt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26   1.1      matt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27   1.1      matt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28   1.1      matt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29   1.1      matt  * POSSIBILITY OF SUCH DAMAGE.
     30   1.1      matt  */
     31   1.1      matt 
     32   1.1      matt #ifndef _AARCH64_PMAP_H_
     33   1.1      matt #define _AARCH64_PMAP_H_
     34   1.1      matt 
     35   1.1      matt #ifdef __aarch64__
     36   1.1      matt 
     37  1.10  jakllsch #ifdef _KERNEL
     38   1.1      matt #include <sys/types.h>
     39   1.1      matt #include <sys/pool.h>
     40   1.2       ryo #include <sys/queue.h>
     41   1.2       ryo #include <uvm/uvm_pglist.h>
     42   1.1      matt 
     43   1.2       ryo #include <aarch64/pte.h>
     44   1.1      matt 
     45   1.1      matt #define PMAP_GROWKERNEL
     46   1.1      matt #define PMAP_STEAL_MEMORY
     47   1.1      matt 
     48   1.2       ryo #define __HAVE_VM_PAGE_MD
     49   1.2       ryo 
     50   1.1      matt struct pmap {
     51   1.2       ryo 	kmutex_t pm_lock;
     52   1.1      matt 	struct pool *pm_pvpool;
     53   1.2       ryo 	pd_entry_t *pm_l0table;			/* L0 table: 512G*512 */
     54   1.2       ryo 	paddr_t pm_l0table_pa;
     55   1.2       ryo 
     56   1.2       ryo 	SLIST_HEAD(, vm_page) pm_vmlist;	/* for L[0123] tables */
     57   1.2       ryo 
     58   1.1      matt 	struct pmap_statistics pm_stats;
     59   1.2       ryo 	unsigned int pm_refcnt;
     60   1.2       ryo 	int pm_asid;
     61   1.2       ryo 	bool pm_activated;
     62   1.1      matt };
     63   1.1      matt 
     64   1.2       ryo struct pv_entry;
     65   1.2       ryo struct vm_page_md {
     66   1.2       ryo 	kmutex_t mdpg_pvlock;
     67   1.2       ryo 	SLIST_ENTRY(vm_page) mdpg_vmlist;	/* L[0-3] table vm_page list */
     68   1.2       ryo 	TAILQ_HEAD(, pv_entry) mdpg_pvhead;
     69   1.2       ryo 
     70   1.2       ryo 	/* VM_PROT_READ means referenced, VM_PROT_WRITE means modified */
     71   1.2       ryo 	uint32_t mdpg_flags;
     72   1.1      matt };
     73   1.1      matt 
     74   1.2       ryo /* each mdpg_pvlock will be initialized in pmap_init() */
     75   1.2       ryo #define VM_MDPAGE_INIT(pg)				\
     76   1.2       ryo 	do {						\
     77   1.2       ryo 		TAILQ_INIT(&(pg)->mdpage.mdpg_pvhead);	\
     78   1.2       ryo 		(pg)->mdpage.mdpg_flags = 0;		\
     79   1.1      matt 	} while (/*CONSTCOND*/ 0)
     80   1.1      matt 
     81   1.2       ryo #define l0pde_pa(pde)		((paddr_t)((pde) & LX_TBL_PA))
     82   1.2       ryo #define l0pde_index(v)		(((vaddr_t)(v) & L0_ADDR_BITS) >> L0_SHIFT)
     83   1.2       ryo #define l0pde_valid(pde)	(((pde) & LX_VALID) == LX_VALID)
     84   1.2       ryo /* l0pte always contains table entries */
     85   1.2       ryo 
     86   1.2       ryo #define l1pde_pa(pde)		((paddr_t)((pde) & LX_TBL_PA))
     87   1.2       ryo #define l1pde_index(v)		(((vaddr_t)(v) & L1_ADDR_BITS) >> L1_SHIFT)
     88   1.2       ryo #define l1pde_valid(pde)	(((pde) & LX_VALID) == LX_VALID)
     89   1.2       ryo #define l1pde_is_block(pde)	(((pde) & LX_TYPE) == LX_TYPE_BLK)
     90   1.2       ryo #define l1pde_is_table(pde)	(((pde) & LX_TYPE) == LX_TYPE_TBL)
     91   1.2       ryo 
     92   1.2       ryo #define l2pde_pa(pde)		((paddr_t)((pde) & LX_TBL_PA))
     93   1.2       ryo #define l2pde_index(v)		(((vaddr_t)(v) & L2_ADDR_BITS) >> L2_SHIFT)
     94   1.2       ryo #define l2pde_valid(pde)	(((pde) & LX_VALID) == LX_VALID)
     95   1.2       ryo #define l2pde_is_block(pde)	(((pde) & LX_TYPE) == LX_TYPE_BLK)
     96   1.2       ryo #define l2pde_is_table(pde)	(((pde) & LX_TYPE) == LX_TYPE_TBL)
     97   1.2       ryo 
     98   1.2       ryo #define l3pte_pa(pde)		((paddr_t)((pde) & LX_TBL_PA))
     99   1.8       ryo #define l3pte_executable(pde,user)	\
    100   1.8       ryo     (((pde) & ((user) ? LX_BLKPAG_UXN : LX_BLKPAG_PXN)) == 0)
    101   1.6       ryo #define l3pte_readable(pde)	((pde) & LX_BLKPAG_AF)
    102   1.6       ryo #define l3pte_writable(pde)	\
    103   1.6       ryo     (((pde) & (LX_BLKPAG_AF|LX_BLKPAG_AP)) == (LX_BLKPAG_AF|LX_BLKPAG_AP_RW))
    104   1.2       ryo #define l3pte_index(v)		(((vaddr_t)(v) & L3_ADDR_BITS) >> L3_SHIFT)
    105   1.2       ryo #define l3pte_valid(pde)	(((pde) & LX_VALID) == LX_VALID)
    106   1.2       ryo #define l3pte_is_page(pde)	(((pde) & LX_TYPE) == L3_TYPE_PAG)
    107   1.2       ryo /* l3pte contains always page entries */
    108   1.2       ryo 
    109   1.2       ryo void pmap_bootstrap(vaddr_t, vaddr_t);
    110   1.2       ryo bool pmap_fault_fixup(struct pmap *, vaddr_t, vm_prot_t, bool user);
    111   1.7       ryo 
    112   1.7       ryo /* for ddb */
    113   1.2       ryo void pmap_db_pteinfo(vaddr_t, void (*)(const char *, ...));
    114   1.7       ryo pt_entry_t *kvtopte(vaddr_t);
    115   1.7       ryo pt_entry_t pmap_kvattr(vaddr_t, vm_prot_t);
    116   1.2       ryo 
    117   1.2       ryo /* Hooks for the pool allocator */
    118   1.2       ryo paddr_t vtophys(vaddr_t);
    119   1.2       ryo #define VTOPHYS_FAILED		((paddr_t)-1L)	/* POOL_PADDR_INVALID */
    120   1.2       ryo #define POOL_VTOPHYS(va)	vtophys((vaddr_t) (va))
    121   1.2       ryo 
    122   1.2       ryo 
    123   1.2       ryo /* devmap */
    124   1.2       ryo struct pmap_devmap {
    125   1.2       ryo 	vaddr_t pd_va;		/* virtual address */
    126   1.2       ryo 	paddr_t pd_pa;		/* physical address */
    127   1.2       ryo 	psize_t pd_size;	/* size of region */
    128   1.2       ryo 	vm_prot_t pd_prot;	/* protection code */
    129   1.2       ryo 	u_int pd_flags;		/* flags for pmap_kenter_pa() */
    130   1.2       ryo };
    131   1.2       ryo 
    132   1.2       ryo void pmap_devmap_register(const struct pmap_devmap *);
    133   1.2       ryo void pmap_devmap_bootstrap(const struct pmap_devmap *);
    134   1.2       ryo const struct pmap_devmap *pmap_devmap_find_pa(paddr_t, psize_t);
    135   1.2       ryo const struct pmap_devmap *pmap_devmap_find_va(vaddr_t, vsize_t);
    136   1.2       ryo vaddr_t pmap_devmap_phystov(paddr_t);
    137   1.2       ryo paddr_t pmap_devmap_vtophys(paddr_t);
    138   1.2       ryo 
    139   1.9      maxv pd_entry_t *pmap_alloc_pdp(struct pmap *, paddr_t *);
    140   1.9      maxv 
    141   1.2       ryo /* devmap use L2 blocks. (2Mbyte) */
    142   1.2       ryo #define DEVMAP_TRUNC_ADDR(x)	((x) & ~L2_OFFSET)
    143   1.2       ryo #define DEVMAP_ROUND_SIZE(x)	(((x) + L2_SIZE - 1) & ~(L2_SIZE - 1))
    144   1.2       ryo 
    145   1.2       ryo #define	DEVMAP_ENTRY(va, pa, sz)			\
    146   1.2       ryo 	{						\
    147   1.2       ryo 		.pd_va = DEVMAP_TRUNC_ADDR(va),		\
    148   1.2       ryo 		.pd_pa = DEVMAP_TRUNC_ADDR(pa),		\
    149   1.2       ryo 		.pd_size = DEVMAP_ROUND_SIZE(sz),	\
    150   1.2       ryo 		.pd_prot = VM_PROT_READ|VM_PROT_WRITE,	\
    151   1.2       ryo 		.pd_flags = PMAP_NOCACHE		\
    152   1.2       ryo 	}
    153   1.2       ryo #define	DEVMAP_ENTRY_END	{ 0 }
    154   1.2       ryo 
    155   1.2       ryo /* mmap cookie and flags */
    156   1.2       ryo #define AARCH64_MMAP_FLAG_SHIFT		(64 - PGSHIFT)
    157   1.2       ryo #define AARCH64_MMAP_FLAG_MASK		0xf
    158   1.3  jmcneill #define AARCH64_MMAP_WRITEBACK		0UL
    159   1.3  jmcneill #define AARCH64_MMAP_NOCACHE		1UL
    160   1.3  jmcneill #define AARCH64_MMAP_WRITECOMBINE	2UL
    161   1.3  jmcneill #define AARCH64_MMAP_DEVICE		3UL
    162   1.2       ryo 
    163   1.5  jmcneill #define ARM_MMAP_MASK			__BITS(63, AARCH64_MMAP_FLAG_SHIFT)
    164   1.5  jmcneill #define ARM_MMAP_WRITECOMBINE		__SHIFTIN(AARCH64_MMAP_WRITECOMBINE, ARM_MMAP_MASK)
    165   1.5  jmcneill #define ARM_MMAP_WRITEBACK		__SHIFTIN(AARCH64_MMAP_WRITEBACK, ARM_MMAP_MASK)
    166   1.5  jmcneill #define ARM_MMAP_NOCACHE		__SHIFTIN(AARCH64_MMAP_NOCACHE, ARM_MMAP_MASK)
    167   1.5  jmcneill #define ARM_MMAP_DEVICE			__SHIFTIN(AARCH64_MMAP_DEVICE, ARM_MMAP_MASK)
    168   1.2       ryo 
    169   1.2       ryo #define	PMAP_PTE			0x10000000 /* kenter_pa */
    170   1.2       ryo #define	PMAP_DEV			0x20000000 /* kenter_pa */
    171   1.2       ryo 
    172   1.2       ryo static inline u_int
    173   1.2       ryo aarch64_mmap_flags(paddr_t mdpgno)
    174   1.2       ryo {
    175   1.2       ryo 	u_int nflag, pflag;
    176   1.2       ryo 
    177   1.2       ryo 	/*
    178   1.2       ryo 	 * aarch64 arch has 4 memory attribute:
    179   1.2       ryo 	 *
    180   1.2       ryo 	 *  WriteBack      - write back cache
    181   1.2       ryo 	 *  WriteThru      - wite through cache
    182   1.2       ryo 	 *  NoCache        - no cache
    183   1.2       ryo 	 *  Device(nGnRnE) - no Gathering, no Reordering, no Early write ack
    184   1.2       ryo 	 *
    185   1.2       ryo 	 * but pmap has PMAP_{NOCACHE,WRITE_COMBINE,WRITE_BACK} flags.
    186   1.2       ryo 	 */
    187   1.2       ryo 
    188   1.2       ryo 	nflag = (mdpgno >> AARCH64_MMAP_FLAG_SHIFT) & AARCH64_MMAP_FLAG_MASK;
    189   1.2       ryo 	switch (nflag) {
    190   1.2       ryo 	case AARCH64_MMAP_DEVICE:
    191   1.2       ryo 		pflag = PMAP_DEV;
    192   1.2       ryo 		break;
    193   1.2       ryo 	case AARCH64_MMAP_WRITECOMBINE:
    194   1.2       ryo 		pflag = PMAP_WRITE_COMBINE;
    195   1.2       ryo 		break;
    196   1.2       ryo 	case AARCH64_MMAP_WRITEBACK:
    197   1.2       ryo 		pflag = PMAP_WRITE_BACK;
    198   1.2       ryo 		break;
    199   1.2       ryo 	case AARCH64_MMAP_NOCACHE:
    200   1.2       ryo 	default:
    201   1.2       ryo 		pflag = PMAP_NOCACHE;
    202   1.2       ryo 		break;
    203   1.2       ryo 	}
    204   1.2       ryo 	return pflag;
    205   1.2       ryo }
    206   1.2       ryo 
    207   1.2       ryo 
    208   1.2       ryo #define pmap_phys_address(pa)		aarch64_ptob((pa))
    209   1.2       ryo #define pmap_mmap_flags(ppn)		aarch64_mmap_flags((ppn))
    210   1.2       ryo 
    211   1.2       ryo #define pmap_update(pmap)		((void)0)
    212   1.2       ryo #define pmap_copy(dp,sp,d,l,s)		((void)0)
    213   1.2       ryo #define pmap_wired_count(pmap)		((pmap)->pm_stats.wired_count)
    214   1.2       ryo #define pmap_resident_count(pmap)	((pmap)->pm_stats.resident_count)
    215   1.2       ryo 
    216   1.2       ryo bool	pmap_extract_coherency(pmap_t, vaddr_t, paddr_t *, bool *);
    217   1.2       ryo 
    218   1.2       ryo #define	PMAP_MAPSIZE1	L2_SIZE
    219   1.2       ryo 
    220  1.10  jakllsch #endif /* _KERNEL */
    221  1.10  jakllsch 
    222   1.1      matt #elif defined(__arm__)
    223   1.1      matt 
    224   1.1      matt #include <arm/pmap.h>
    225   1.1      matt 
    226   1.2       ryo #endif /* __arm__/__aarch64__ */
    227   1.1      matt 
    228   1.2       ryo #endif /* !_AARCH64_PMAP_ */
    229