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History log of /src/sys/arch/aarch64/include/pmap.h
RevisionDateAuthorComments
 1.59  02-Aug-2023  skrll No need to define cpu_{,set}_tlb_info here - just use the
sys/uvm/pmap/pmap_tlb.h versions.
 1.58  20-Apr-2023  skrll Provide a shared pmap_devmap implementation and convert all pmap_devmap
arrays to use DEVMAP_ENTRY{,_END}
 1.57  03-Nov-2022  skrll Provide MI PMAP support on AARCH64
 1.56  29-Oct-2022  skrll KNF + remove unnecessary brackets
 1.55  23-Oct-2022  skrll KNF.
 1.54  23-Oct-2022  skrll Line continuation alignment whitespace. NFC.
 1.53  15-Oct-2022  jmcneill Use "non-posted" instead of "strongly ordered" to describe nGnRnE mappings

Rename the following defines:
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED to BUS_SPACE_MAP_NONPOSTED
- PMAP_DEV_SO to PMAP_DEV_NP
- LX_BLKPAG_ATTR_DEVICE_MEM_SO to LX_BLKPAG_ATTR_DEVICE_MEM_NP
Rename the following option:
- AARCH64_DEVICE_MEM_STRONGLY_ORDERED to AARCH64_DEVICE_MEM_NONPOSTED
 1.52  02-Apr-2022  skrll Update to support EFI runtime outside the kernel virtual address space
by creating an EFI RT pmap that can be activated / deactivated when
required.

Adds support for EFI RT to ARM_MMU_EXTENDED (ASID) 32-bit Arm machines.

On Arm64 the usage of pmapboot_enter is reduced and the mappings are
created much later in the boot process -- now in cpu_startup_hook.
Backward compatiblity for KVA mapped RT from old bootaa64.efi is
maintained.

Adding support to other platforms should be easier as a result.
 1.51  15-Jan-2022  skrll Remove unnecessary brackets
 1.50  14-Jan-2022  skrll Restore the previous pmap_remove_all behaviour as the new method meant
the n1sdp couldn't complete a build.

No noticeable change in kernel build performance.
 1.49  10-Oct-2021  skrll Use sys/uvm/pmap/pmap_tlb.c on Aarch64 in the same way that some Arm, MIPS,
and some PPC kernels do. This removes the limitation of 256 processes on
CPUs with 8bit ASID field, e.g. Apple M1.

Additionally the following changes have been made

- removed a couple of unnecessary aarch64_tlbi_all calls
- removed any invalidation after freeing page tables due to
_pmap_sweep_pdp. This was never necessary afaict.
- all kernel mappings are marked global and userland mapping not-global.

Performance testing hasn't show a significant difference. The data here
is from building a kernel on an lx2k system with nvme.

before
1489.6u 400.4s 2:40.65 1176.5% 228+224k 0+32289io 57pf+0w
1482.6u 403.2s 2:38.49 1189.9% 228+222k 0+32274io 46pf+0w
1485.4u 402.2s 2:37.27 1200.2% 228+222k 0+32275io 12pf+0w

after
1493.9u 404.6s 2:37.50 1205.4% 227+221k 0+32265io 48pf+0w
1485.0u 408.0s 2:38.54 1194.0% 227+222k 0+32272io 36pf+0w
1484.3u 407.0s 2:35.88 1213.3% 228+224k 0+32268io 14pf+0w

>>> stats.ttest_ind([160.65,158.49,157.27], [157.5,158.54,155.88])
Ttest_indResult(statistic=1.1923622711296888, pvalue=0.2990182944606766)
>>>
 1.48  19-May-2021  skrll Make even more pmap agnostic
 1.47  30-Apr-2021  skrll branches: 1.47.2;
Make the ddb for pmap / pte information pmap agnostic
 1.46  20-Mar-2021  skrll branches: 1.46.2;
Make pmapboot_enter panic if anything goes wrong and any mappings overlap
rather than only doing it in locore.S
 1.45  31-Jan-2021  skrll branches: 1.45.2;
Improve a comment
 1.44  31-Jan-2021  ryo implement pmap_remove_all().

The size of struct pv_entry has increased, but speed of kernel build has improved by about 1%
exec and exit should have been improved.
 1.43  19-Sep-2020  skrll branches: 1.43.2;
Make __md_palloc pmap agnostic (think sys/uvm/pmap)
 1.42  12-Aug-2020  skrll Part IV of ad's performance improvements for aarch64

- Implement pmap_growkernel(), and update kernel pmap's stats with atomics.

- Then, pmap_kenter_pa() and pmap_kremove() no longer need to allocate
memory nor take pm_lock, because they only modify L3 PTEs.

- Then, pm_lock and pp_lock can be adaptive mutexes at IPL_NONE which are
cheaper than spin mutexes.

- Take the pmap's lock in pmap_extract() if not the kernel's pmap, otherwise
pmap_extract() might see inconsistent state.
 1.41  16-Jul-2020  skrll pmapboot_enter simplication
- bootpage_alloc in asm becomes pmapboot_pagealloc in C
- PMAPBOOT_ENTER_NOBLOCK is removed as it's not used
- PMAPBOOT_ENTER_NOOVERWRITE is removed as it's now always on
- physpage_allocator argument is removed as it's always
pmapboot_pagealloc
- Support for EARLYCONS without CONSADDR is removed so that the identity
map for CONSADDR is always known.

For the assembly files:
2 files changed, 40 insertions(+), 89 deletions(-)

LGTM ryo
 1.40  14-Jun-2020  ad - Fix a lock order reversal in pmap_page_protect().

- Make sure pmap is always locked when updating stats; atomics no longer
needed to do that.

- Remove unneeded traversal of pv list in pmap_enter_pv().

- Shrink struct vm_page from 136 to 128 bytes (cache line sized) and struct
pv_entry from 48 to 32 bytes (power of 2 sized).

- Embed a pv_entry in each vm_page. This means PV entries don't need to
be allocated for private anonymous memory / COW pages / most UBC mappings.
Dynamic PV entries are then used only for stuff like shared libraries and
shared memory.

Proposed on port-arm@.
 1.39  14-May-2020  skrll Use MUTEX_NODEBUG for PV locks as is commonly done. OK ryo.
 1.38  13-May-2020  ryo - move aarch64 addressspace macros from pmap.h to cpufunc.h
- rename ptr_strip_pac() to aarch64_strip_pac()
 1.37  08-Apr-2020  ryo use PMAP_PAGE_INIT() to initialize mutex in pmap_page.

VM_MDPAGE_INIT() in pmap_free_pdp() had initialized pp_flags,
so it unintentionally cleared PMAP_PAGE_FLAGS_PV_TRACKED.
use PMAP_PAGE_INIT to avoid using PMAP_PAGE_FLAGS_PV_TRACKED.

pointed out by tnn@, thanks
 1.36  29-Feb-2020  ryo add helper function aarch64_addresspace() and aarch64_untag_address() to check address space, and eliminate address tag
 1.35  29-Feb-2020  ryo replace KSEG pages mapping code with generic function pmapboot_enter_range()
 1.34  10-Feb-2020  ryo use LIST(3) instead of TAILQ(3) to save one word in struct vm_page and struct pmap.

pointed out by riastradh@. thanks
 1.33  03-Feb-2020  ryo add support pmap_pv(9)

Patch originally from jmcneill@. thanks
 1.32  03-Feb-2020  ryo separate struct vm_page_md into vm_page_md and pmap_page
for preparation pmap_pv(9)
 1.31  26-Jan-2020  skrll Typo in comment
 1.30  06-Jan-2020  skrll branches: 1.30.2;
Fix DEVMAP build losage by reducing diffs between arm and aarch64

*sigh*
 1.29  30-Dec-2019  skrll Drop DEVMAP_{TRUNK_ADDR,ROUND_SIZE} to 4KB pages now that pmap_map_chunk
allows this.
 1.28  28-Dec-2019  jmcneill Do not use Early Write Acknowledge for PCIe I/O and config space.
 1.27  27-Dec-2019  jmcneill Enable early write acknowledge for device memory mappings.
 1.26  29-Oct-2019  maya Define PMAP_NEED_PROCWR, providing strategically placed i-cache
synchronization where just-changed memory is about to be executed.

Fixes SIGILLs seen when running Mono 6 on QEMU Cortex-A57.

ok ryo
 1.25  12-Aug-2019  skrll Use PMAP_DEV in DEVMAP_ENTRY rather than pmap_map_chunk. It's clearer and
means pmap_map_chunk can be made to map other memory types.
 1.24  08-Apr-2019  ryo branches: 1.24.4;
- free empty page tables pages if reach a certain usage.
- need to lock at removing an old pg (_pmap_remove_pv) in _pmap_enter()
 1.23  19-Mar-2019  ryo - add ddb command "machine ttbr" to dump MMU tables.
- tidy up descriptions, usages and messages.
 1.22  19-Mar-2019  ryo - free L1-L3 pages that has been emptied by pmap_remove().
- if no memories, pmap_enter will return correctly ENOMEM if PMAP_CANFAIL, or wait until available any memories if !PMAP_CANFAIL.

These changes improves the stability when we use a huge virtual memory spaces with mmap.
 1.21  06-Feb-2019  ryo improve pmap_remove
- don't lock/unlock per page in pmap_remove()
- speedup pte lookup for continuous addresses
- bring out pool_cache_put(&_pmap_pv_pool, pv) from lock/unlock section
 1.20  04-Jan-2019  jdolecek re-apply rev. 1.18, now tested by Jonathan Kollasch and Ryo Shimizu - no
problems observed, and about 2x speedup for cached read

Implement PMAP_DIRECT / pmap_direct_process() in support of experimental
UBC optimization

PR kern/53124
 1.19  21-Nov-2018  jdolecek revert PMAP_DIRECT until tested; requested by mrg@
 1.18  20-Nov-2018  jdolecek Implement PMAP_DIRECT / pmap_direct_process() in support of experimental
UBC optimizations (compile-tested only for now)

PR kern/53124
 1.17  01-Nov-2018  maxv Add kASan support for aarch64. Stack tracking needs more investigation
and will come in a separate commit.

Reviewed by ryo@ jmcneill@ skrll@.
 1.16  18-Oct-2018  skrll Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively
 1.15  13-Oct-2018  ryo - define PMAP_{MAP,UNMAP}_POOLPAGE for performance
- define __HAVE_MM_MD_KERNACC and add mm_md_kernacc()
 1.14  12-Oct-2018  ryo add initial support of COMPAT_NETBSD32 on AArch64.
arm ELF32 EABI binaries could be execute in AArch32 state on AArch64. A32 THUMB mode is not supported yet.
 1.13  12-Oct-2018  ryo rewrite pmap_pte_lookup() to share similar code.
 1.12  04-Oct-2018  ryo cleanup locore, and changed the way to map memories during boot.
- add functions bootpage_enter() and bootpage_alloc() to adapt various layout
of physical memory map. especially for 64bit physical memory layout.
pmapboot_alloc() allocates pagetable pages from _end[].
- changed to map only the required amount for PA=VA identity mapping
(kernel image, UART device, and FDT blob) with L2_BLOCK(2Mbyte).
- changing page permission for kernel image, and making KSEG mapping are done
at cpu_kernel_vm_init() instead of at locore.
- optimize PTE entries with PTE Contiguous bit. it is enabled on devmap only for now.

reviewed by skrll@, thanks.
 1.11  04-Oct-2018  ryo * define LX_BLKPAG_{OS,ATTR}_* for OS dependent PTE attributes in pmap.h
* cleanup macros
 1.10  15-Sep-2018  jakllsch make kernel-groveling crash(8) work on aarch64
 1.9  10-Sep-2018  maxv Rename _pmap_alloc_pdp -> pmap_alloc_pdp, and make it public.
 1.8  10-Aug-2018  ryo treat kernel-exec attr and user-exec attr separately.
kernel cannot execute userland exec page, and user cannot execute kernel page.
 1.7  06-Aug-2018  ryo set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.
 1.6  27-Jul-2018  ryo changes of pmap.c r1.13 seems to be unstable.
In order to invalidate icache, not to invalidate all icache,
but temporary to make the page writable and invalidate target address only.
 1.5  08-Jun-2018  jmcneill branches: 1.5.2;
Provide bs_mmap implementations for bcm283x based boards.

PR: port-arm/53283
Submitted by: Nick Hudson
 1.4  27-Apr-2018  ryo fix instability behavior of bufcache on aarch64.
* fix to return correct ref/mod when PMAP_WIRED.
* changed to keep wired flags in pte instead of pv_entry, and cleanup.
 1.3  09-Apr-2018  jmcneill Fix encoding of MMAP flags for generic_bs_mmap
 1.2  01-Apr-2018  ryo Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
 1.1  10-Aug-2014  matt branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.
 1.1.28.10  18-Jan-2019  pgoyette Synch with HEAD
 1.1.28.9  26-Nov-2018  pgoyette Sync with HEAD, resolve a couple of conflicts
 1.1.28.8  20-Oct-2018  pgoyette Sync with head
 1.1.28.7  30-Sep-2018  pgoyette Ssync with HEAD
 1.1.28.6  06-Sep-2018  pgoyette Sync with HEAD

Resolve a couple of conflicts (result of the uimin/uimax changes)
 1.1.28.5  28-Jul-2018  pgoyette Sync with HEAD
 1.1.28.4  25-Jun-2018  pgoyette Sync with HEAD
 1.1.28.3  02-May-2018  pgoyette Synch with HEAD
 1.1.28.2  16-Apr-2018  pgoyette Sync with HEAD, resolve some conflicts
 1.1.28.1  07-Apr-2018  pgoyette Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
 1.1.4.2  20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.1.4.1  10-Aug-2014  tls file pmap.h was added on branch tls-maxphys on 2014-08-20 00:02:39 +0000
 1.5.2.3  13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.5.2.2  08-Apr-2020  martin Merge changes from current as of 20200406
 1.5.2.1  10-Jun-2019  christos Sync with HEAD
 1.24.4.2  29-Dec-2019  martin Pull up following revision(s) (requested by jmcneill in ticket #586):

sys/arch/arm/nvidia/tegra_pcie.c: revision 1.27
sys/arch/aarch64/aarch64/pmap.c: revision 1.57
sys/arch/aarch64/aarch64/locore.S: revision 1.48
sys/arch/aarch64/include/armreg.h: revision 1.29
sys/arch/aarch64/aarch64/pmap.c: revision 1.58
sys/arch/aarch64/aarch64/locore.S: revision 1.49
sys/arch/arm/acpi/acpipchb.c: revision 1.14
sys/arch/aarch64/aarch64/genassym.cf: revision 1.16
sys/arch/arm/acpi/acpi_machdep.c: revision 1.13
sys/arch/aarch64/include/pmap.h: revision 1.27
sys/arch/aarch64/aarch64/genassym.cf: revision 1.17
sys/arch/aarch64/include/pmap.h: revision 1.28
sys/arch/arm/fdt/pcihost_fdtvar.h: revision 1.3
sys/arch/arm/include/bus_defs.h: revision 1.14
sys/arch/aarch64/aarch64/bus_space.c: revision 1.9
sys/arch/arm/fdt/pcihost_fdt.c: revision 1.12
sys/arch/aarch64/conf/files.aarch64: revision 1.15
sys/arch/aarch64/conf/files.aarch64: revision 1.16
sys/arch/arm/rockchip/rk3399_pcie.c: revision 1.9

Enable early write acknowledge for device memory mappings.

Do not use Early Write Acknowledge for PCIe I/O and config space.
 1.24.4.1  04-Nov-2019  martin Pull up following revision(s) (requested by maya in ticket #393):

sys/arch/aarch64/include/pmap.h: revision 1.26
sys/arch/aarch64/aarch64/pmap.c: revision 1.48

Define PMAP_NEED_PROCWR, providing strategically placed i-cache
synchronization where just-changed memory is about to be executed.

Fixes SIGILLs seen when running Mono 6 on QEMU Cortex-A57.

ok ryo
 1.30.2.1  29-Feb-2020  ad Sync with head.
 1.43.2.1  03-Apr-2021  thorpej Sync with HEAD.
 1.45.2.1  03-Apr-2021  thorpej Sync with HEAD.
 1.46.2.2  17-Jun-2021  thorpej Sync w/ HEAD.
 1.46.2.1  13-May-2021  thorpej Sync with HEAD.
 1.47.2.1  31-May-2021  cjep sync with head

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