pmap.h revision 1.1.28.10
1 /* $NetBSD: pmap.h,v 1.1.28.10 2019/01/18 08:50:13 pgoyette Exp $ */ 2 3 /*- 4 * Copyright (c) 2014 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas of 3am Software Foundry. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _AARCH64_PMAP_H_ 33 #define _AARCH64_PMAP_H_ 34 35 #ifdef __aarch64__ 36 37 #ifdef _KERNEL 38 #ifdef _KERNEL_OPT 39 #include "opt_kasan.h" 40 #endif 41 42 #include <sys/types.h> 43 #include <sys/pool.h> 44 #include <sys/queue.h> 45 #include <uvm/uvm_pglist.h> 46 47 #include <aarch64/pte.h> 48 49 #define PMAP_GROWKERNEL 50 #define PMAP_STEAL_MEMORY 51 52 #define __HAVE_VM_PAGE_MD 53 54 #ifndef KASAN 55 #define PMAP_MAP_POOLPAGE(pa) AARCH64_PA_TO_KVA(pa) 56 #define PMAP_UNMAP_POOLPAGE(va) AARCH64_KVA_TO_PA(va) 57 58 #define PMAP_DIRECT 59 static __inline int 60 pmap_direct_process(paddr_t pa, voff_t pgoff, size_t len, 61 int (*process)(void *, size_t, void *), void *arg) 62 { 63 vaddr_t va = AARCH64_PA_TO_KVA(pa); 64 65 return process((void *)(va + pgoff), len, arg); 66 } 67 #endif 68 69 struct pmap { 70 kmutex_t pm_lock; 71 struct pool *pm_pvpool; 72 pd_entry_t *pm_l0table; /* L0 table: 512G*512 */ 73 paddr_t pm_l0table_pa; 74 75 SLIST_HEAD(, vm_page) pm_vmlist; /* for L[0123] tables */ 76 77 struct pmap_statistics pm_stats; 78 unsigned int pm_refcnt; 79 int pm_asid; 80 bool pm_activated; 81 }; 82 83 struct pv_entry; 84 struct vm_page_md { 85 kmutex_t mdpg_pvlock; 86 SLIST_ENTRY(vm_page) mdpg_vmlist; /* L[0-3] table vm_page list */ 87 TAILQ_HEAD(, pv_entry) mdpg_pvhead; 88 89 /* VM_PROT_READ means referenced, VM_PROT_WRITE means modified */ 90 uint32_t mdpg_flags; 91 }; 92 93 /* each mdpg_pvlock will be initialized in pmap_init() */ 94 #define VM_MDPAGE_INIT(pg) \ 95 do { \ 96 TAILQ_INIT(&(pg)->mdpage.mdpg_pvhead); \ 97 (pg)->mdpage.mdpg_flags = 0; \ 98 } while (/*CONSTCOND*/ 0) 99 100 101 /* saved permission bit for referenced/modified emulation */ 102 #define LX_BLKPAG_OS_READ LX_BLKPAG_OS_0 103 #define LX_BLKPAG_OS_WRITE LX_BLKPAG_OS_1 104 #define LX_BLKPAG_OS_WIRED LX_BLKPAG_OS_2 105 #define LX_BLKPAG_OS_BOOT LX_BLKPAG_OS_3 106 #define LX_BLKPAG_OS_RWMASK (LX_BLKPAG_OS_WRITE|LX_BLKPAG_OS_READ) 107 108 /* memory attributes are configured MAIR_EL1 in locore */ 109 #define LX_BLKPAG_ATTR_NORMAL_WB __SHIFTIN(0, LX_BLKPAG_ATTR_INDX) 110 #define LX_BLKPAG_ATTR_NORMAL_NC __SHIFTIN(1, LX_BLKPAG_ATTR_INDX) 111 #define LX_BLKPAG_ATTR_NORMAL_WT __SHIFTIN(2, LX_BLKPAG_ATTR_INDX) 112 #define LX_BLKPAG_ATTR_DEVICE_MEM __SHIFTIN(3, LX_BLKPAG_ATTR_INDX) 113 #define LX_BLKPAG_ATTR_MASK LX_BLKPAG_ATTR_INDX 114 115 #define lxpde_pa(pde) ((paddr_t)((pde) & LX_TBL_PA)) 116 #define l0pde_pa(pde) lxpde_pa(pde) 117 #define l0pde_index(v) (((vaddr_t)(v) & L0_ADDR_BITS) >> L0_SHIFT) 118 #define l0pde_valid(pde) (((pde) & LX_VALID) == LX_VALID) 119 /* l0pte always contains table entries */ 120 121 #define l1pde_pa(pde) lxpde_pa(pde) 122 #define l1pde_index(v) (((vaddr_t)(v) & L1_ADDR_BITS) >> L1_SHIFT) 123 #define l1pde_valid(pde) (((pde) & LX_VALID) == LX_VALID) 124 #define l1pde_is_block(pde) (((pde) & LX_TYPE) == LX_TYPE_BLK) 125 #define l1pde_is_table(pde) (((pde) & LX_TYPE) == LX_TYPE_TBL) 126 127 #define l2pde_pa(pde) lxpde_pa(pde) 128 #define l2pde_index(v) (((vaddr_t)(v) & L2_ADDR_BITS) >> L2_SHIFT) 129 #define l2pde_valid(pde) (((pde) & LX_VALID) == LX_VALID) 130 #define l2pde_is_block(pde) (((pde) & LX_TYPE) == LX_TYPE_BLK) 131 #define l2pde_is_table(pde) (((pde) & LX_TYPE) == LX_TYPE_TBL) 132 133 #define l3pte_pa(pde) lxpde_pa(pde) 134 #define l3pte_executable(pde,user) \ 135 (((pde) & ((user) ? LX_BLKPAG_UXN : LX_BLKPAG_PXN)) == 0) 136 #define l3pte_readable(pde) ((pde) & LX_BLKPAG_AF) 137 #define l3pte_writable(pde) \ 138 (((pde) & (LX_BLKPAG_AF|LX_BLKPAG_AP)) == (LX_BLKPAG_AF|LX_BLKPAG_AP_RW)) 139 #define l3pte_index(v) (((vaddr_t)(v) & L3_ADDR_BITS) >> L3_SHIFT) 140 #define l3pte_valid(pde) (((pde) & LX_VALID) == LX_VALID) 141 #define l3pte_is_page(pde) (((pde) & LX_TYPE) == L3_TYPE_PAG) 142 /* l3pte contains always page entries */ 143 144 void pmap_bootstrap(vaddr_t, vaddr_t); 145 bool pmap_fault_fixup(struct pmap *, vaddr_t, vm_prot_t, bool user); 146 147 /* for ddb */ 148 void pmap_db_pteinfo(vaddr_t, void (*)(const char *, ...) __printflike(1, 2)); 149 pt_entry_t *kvtopte(vaddr_t); 150 pt_entry_t pmap_kvattr(vaddr_t, vm_prot_t); 151 152 /* locore.S */ 153 pd_entry_t *bootpage_alloc(void); 154 155 /* pmap_locore.c */ 156 int pmapboot_enter(vaddr_t, paddr_t, psize_t, psize_t, 157 pt_entry_t, uint64_t, pd_entry_t *(*)(void), 158 void (*pr)(const char *, ...) __printflike(1, 2)); 159 #define PMAPBOOT_ENTER_NOBLOCK 0x00000001 160 #define PMAPBOOT_ENTER_NOOVERWRITE 0x00000002 161 int pmapboot_protect(vaddr_t, vaddr_t, vm_prot_t); 162 void pmap_db_pte_print(pt_entry_t, int, 163 void (*pr)(const char *, ...) __printflike(1, 2)); 164 165 /* Hooks for the pool allocator */ 166 paddr_t vtophys(vaddr_t); 167 #define VTOPHYS_FAILED ((paddr_t)-1L) /* POOL_PADDR_INVALID */ 168 #define POOL_VTOPHYS(va) vtophys((vaddr_t) (va)) 169 170 171 /* devmap */ 172 struct pmap_devmap { 173 vaddr_t pd_va; /* virtual address */ 174 paddr_t pd_pa; /* physical address */ 175 psize_t pd_size; /* size of region */ 176 vm_prot_t pd_prot; /* protection code */ 177 u_int pd_flags; /* flags for pmap_kenter_pa() */ 178 }; 179 180 void pmap_devmap_register(const struct pmap_devmap *); 181 void pmap_devmap_bootstrap(vaddr_t, const struct pmap_devmap *); 182 const struct pmap_devmap *pmap_devmap_find_pa(paddr_t, psize_t); 183 const struct pmap_devmap *pmap_devmap_find_va(vaddr_t, vsize_t); 184 vaddr_t pmap_devmap_phystov(paddr_t); 185 paddr_t pmap_devmap_vtophys(paddr_t); 186 187 pd_entry_t *pmap_alloc_pdp(struct pmap *, paddr_t *); 188 189 #define L1_TRUNC_BLOCK(x) ((x) & L1_FRAME) 190 #define L1_ROUND_BLOCK(x) L1_TRUNC_BLOCK((x) + L1_SIZE - 1) 191 #define L2_TRUNC_BLOCK(x) ((x) & L2_FRAME) 192 #define L2_ROUND_BLOCK(x) L2_TRUNC_BLOCK((x) + L2_SIZE - 1) 193 194 /* devmap use L2 blocks. (2Mbyte) */ 195 #define DEVMAP_TRUNC_ADDR(x) L2_TRUNC_BLOCK((x)) 196 #define DEVMAP_ROUND_SIZE(x) L2_ROUND_BLOCK((x)) 197 198 #define DEVMAP_ENTRY(va, pa, sz) \ 199 { \ 200 .pd_va = DEVMAP_TRUNC_ADDR(va), \ 201 .pd_pa = DEVMAP_TRUNC_ADDR(pa), \ 202 .pd_size = DEVMAP_ROUND_SIZE(sz), \ 203 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, \ 204 .pd_flags = PMAP_NOCACHE \ 205 } 206 #define DEVMAP_ENTRY_END { 0 } 207 208 /* mmap cookie and flags */ 209 #define AARCH64_MMAP_FLAG_SHIFT (64 - PGSHIFT) 210 #define AARCH64_MMAP_FLAG_MASK 0xf 211 #define AARCH64_MMAP_WRITEBACK 0UL 212 #define AARCH64_MMAP_NOCACHE 1UL 213 #define AARCH64_MMAP_WRITECOMBINE 2UL 214 #define AARCH64_MMAP_DEVICE 3UL 215 216 #define ARM_MMAP_MASK __BITS(63, AARCH64_MMAP_FLAG_SHIFT) 217 #define ARM_MMAP_WRITECOMBINE __SHIFTIN(AARCH64_MMAP_WRITECOMBINE, ARM_MMAP_MASK) 218 #define ARM_MMAP_WRITEBACK __SHIFTIN(AARCH64_MMAP_WRITEBACK, ARM_MMAP_MASK) 219 #define ARM_MMAP_NOCACHE __SHIFTIN(AARCH64_MMAP_NOCACHE, ARM_MMAP_MASK) 220 #define ARM_MMAP_DEVICE __SHIFTIN(AARCH64_MMAP_DEVICE, ARM_MMAP_MASK) 221 222 #define PMAP_PTE 0x10000000 /* kenter_pa */ 223 #define PMAP_DEV 0x20000000 /* kenter_pa */ 224 225 static inline u_int 226 aarch64_mmap_flags(paddr_t mdpgno) 227 { 228 u_int nflag, pflag; 229 230 /* 231 * aarch64 arch has 4 memory attribute: 232 * 233 * WriteBack - write back cache 234 * WriteThru - wite through cache 235 * NoCache - no cache 236 * Device(nGnRnE) - no Gathering, no Reordering, no Early write ack 237 * 238 * but pmap has PMAP_{NOCACHE,WRITE_COMBINE,WRITE_BACK} flags. 239 */ 240 241 nflag = (mdpgno >> AARCH64_MMAP_FLAG_SHIFT) & AARCH64_MMAP_FLAG_MASK; 242 switch (nflag) { 243 case AARCH64_MMAP_DEVICE: 244 pflag = PMAP_DEV; 245 break; 246 case AARCH64_MMAP_WRITECOMBINE: 247 pflag = PMAP_WRITE_COMBINE; 248 break; 249 case AARCH64_MMAP_WRITEBACK: 250 pflag = PMAP_WRITE_BACK; 251 break; 252 case AARCH64_MMAP_NOCACHE: 253 default: 254 pflag = PMAP_NOCACHE; 255 break; 256 } 257 return pflag; 258 } 259 260 261 #define pmap_phys_address(pa) aarch64_ptob((pa)) 262 #define pmap_mmap_flags(ppn) aarch64_mmap_flags((ppn)) 263 264 #define pmap_update(pmap) ((void)0) 265 #define pmap_copy(dp,sp,d,l,s) ((void)0) 266 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) 267 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) 268 269 bool pmap_extract_coherency(pmap_t, vaddr_t, paddr_t *, bool *); 270 void pmap_icache_sync_range(pmap_t, vaddr_t, vaddr_t); 271 272 #define PMAP_MAPSIZE1 L2_SIZE 273 274 #endif /* _KERNEL */ 275 276 #elif defined(__arm__) 277 278 #include <arm/pmap.h> 279 280 #endif /* __arm__/__aarch64__ */ 281 282 #endif /* !_AARCH64_PMAP_ */ 283
Indexes created Sat Nov 01 05:10:12 GMT 2025