pmap.h revision 1.10
1 /* $NetBSD: pmap.h,v 1.10 2018/09/15 19:47:48 jakllsch Exp $ */ 2 3 /*- 4 * Copyright (c) 2014 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas of 3am Software Foundry. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _AARCH64_PMAP_H_ 33 #define _AARCH64_PMAP_H_ 34 35 #ifdef __aarch64__ 36 37 #ifdef _KERNEL 38 #include <sys/types.h> 39 #include <sys/pool.h> 40 #include <sys/queue.h> 41 #include <uvm/uvm_pglist.h> 42 43 #include <aarch64/pte.h> 44 45 #define PMAP_GROWKERNEL 46 #define PMAP_STEAL_MEMORY 47 48 #define __HAVE_VM_PAGE_MD 49 50 struct pmap { 51 kmutex_t pm_lock; 52 struct pool *pm_pvpool; 53 pd_entry_t *pm_l0table; /* L0 table: 512G*512 */ 54 paddr_t pm_l0table_pa; 55 56 SLIST_HEAD(, vm_page) pm_vmlist; /* for L[0123] tables */ 57 58 struct pmap_statistics pm_stats; 59 unsigned int pm_refcnt; 60 int pm_asid; 61 bool pm_activated; 62 }; 63 64 struct pv_entry; 65 struct vm_page_md { 66 kmutex_t mdpg_pvlock; 67 SLIST_ENTRY(vm_page) mdpg_vmlist; /* L[0-3] table vm_page list */ 68 TAILQ_HEAD(, pv_entry) mdpg_pvhead; 69 70 /* VM_PROT_READ means referenced, VM_PROT_WRITE means modified */ 71 uint32_t mdpg_flags; 72 }; 73 74 /* each mdpg_pvlock will be initialized in pmap_init() */ 75 #define VM_MDPAGE_INIT(pg) \ 76 do { \ 77 TAILQ_INIT(&(pg)->mdpage.mdpg_pvhead); \ 78 (pg)->mdpage.mdpg_flags = 0; \ 79 } while (/*CONSTCOND*/ 0) 80 81 #define l0pde_pa(pde) ((paddr_t)((pde) & LX_TBL_PA)) 82 #define l0pde_index(v) (((vaddr_t)(v) & L0_ADDR_BITS) >> L0_SHIFT) 83 #define l0pde_valid(pde) (((pde) & LX_VALID) == LX_VALID) 84 /* l0pte always contains table entries */ 85 86 #define l1pde_pa(pde) ((paddr_t)((pde) & LX_TBL_PA)) 87 #define l1pde_index(v) (((vaddr_t)(v) & L1_ADDR_BITS) >> L1_SHIFT) 88 #define l1pde_valid(pde) (((pde) & LX_VALID) == LX_VALID) 89 #define l1pde_is_block(pde) (((pde) & LX_TYPE) == LX_TYPE_BLK) 90 #define l1pde_is_table(pde) (((pde) & LX_TYPE) == LX_TYPE_TBL) 91 92 #define l2pde_pa(pde) ((paddr_t)((pde) & LX_TBL_PA)) 93 #define l2pde_index(v) (((vaddr_t)(v) & L2_ADDR_BITS) >> L2_SHIFT) 94 #define l2pde_valid(pde) (((pde) & LX_VALID) == LX_VALID) 95 #define l2pde_is_block(pde) (((pde) & LX_TYPE) == LX_TYPE_BLK) 96 #define l2pde_is_table(pde) (((pde) & LX_TYPE) == LX_TYPE_TBL) 97 98 #define l3pte_pa(pde) ((paddr_t)((pde) & LX_TBL_PA)) 99 #define l3pte_executable(pde,user) \ 100 (((pde) & ((user) ? LX_BLKPAG_UXN : LX_BLKPAG_PXN)) == 0) 101 #define l3pte_readable(pde) ((pde) & LX_BLKPAG_AF) 102 #define l3pte_writable(pde) \ 103 (((pde) & (LX_BLKPAG_AF|LX_BLKPAG_AP)) == (LX_BLKPAG_AF|LX_BLKPAG_AP_RW)) 104 #define l3pte_index(v) (((vaddr_t)(v) & L3_ADDR_BITS) >> L3_SHIFT) 105 #define l3pte_valid(pde) (((pde) & LX_VALID) == LX_VALID) 106 #define l3pte_is_page(pde) (((pde) & LX_TYPE) == L3_TYPE_PAG) 107 /* l3pte contains always page entries */ 108 109 void pmap_bootstrap(vaddr_t, vaddr_t); 110 bool pmap_fault_fixup(struct pmap *, vaddr_t, vm_prot_t, bool user); 111 112 /* for ddb */ 113 void pmap_db_pteinfo(vaddr_t, void (*)(const char *, ...)); 114 pt_entry_t *kvtopte(vaddr_t); 115 pt_entry_t pmap_kvattr(vaddr_t, vm_prot_t); 116 117 /* Hooks for the pool allocator */ 118 paddr_t vtophys(vaddr_t); 119 #define VTOPHYS_FAILED ((paddr_t)-1L) /* POOL_PADDR_INVALID */ 120 #define POOL_VTOPHYS(va) vtophys((vaddr_t) (va)) 121 122 123 /* devmap */ 124 struct pmap_devmap { 125 vaddr_t pd_va; /* virtual address */ 126 paddr_t pd_pa; /* physical address */ 127 psize_t pd_size; /* size of region */ 128 vm_prot_t pd_prot; /* protection code */ 129 u_int pd_flags; /* flags for pmap_kenter_pa() */ 130 }; 131 132 void pmap_devmap_register(const struct pmap_devmap *); 133 void pmap_devmap_bootstrap(const struct pmap_devmap *); 134 const struct pmap_devmap *pmap_devmap_find_pa(paddr_t, psize_t); 135 const struct pmap_devmap *pmap_devmap_find_va(vaddr_t, vsize_t); 136 vaddr_t pmap_devmap_phystov(paddr_t); 137 paddr_t pmap_devmap_vtophys(paddr_t); 138 139 pd_entry_t *pmap_alloc_pdp(struct pmap *, paddr_t *); 140 141 /* devmap use L2 blocks. (2Mbyte) */ 142 #define DEVMAP_TRUNC_ADDR(x) ((x) & ~L2_OFFSET) 143 #define DEVMAP_ROUND_SIZE(x) (((x) + L2_SIZE - 1) & ~(L2_SIZE - 1)) 144 145 #define DEVMAP_ENTRY(va, pa, sz) \ 146 { \ 147 .pd_va = DEVMAP_TRUNC_ADDR(va), \ 148 .pd_pa = DEVMAP_TRUNC_ADDR(pa), \ 149 .pd_size = DEVMAP_ROUND_SIZE(sz), \ 150 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, \ 151 .pd_flags = PMAP_NOCACHE \ 152 } 153 #define DEVMAP_ENTRY_END { 0 } 154 155 /* mmap cookie and flags */ 156 #define AARCH64_MMAP_FLAG_SHIFT (64 - PGSHIFT) 157 #define AARCH64_MMAP_FLAG_MASK 0xf 158 #define AARCH64_MMAP_WRITEBACK 0UL 159 #define AARCH64_MMAP_NOCACHE 1UL 160 #define AARCH64_MMAP_WRITECOMBINE 2UL 161 #define AARCH64_MMAP_DEVICE 3UL 162 163 #define ARM_MMAP_MASK __BITS(63, AARCH64_MMAP_FLAG_SHIFT) 164 #define ARM_MMAP_WRITECOMBINE __SHIFTIN(AARCH64_MMAP_WRITECOMBINE, ARM_MMAP_MASK) 165 #define ARM_MMAP_WRITEBACK __SHIFTIN(AARCH64_MMAP_WRITEBACK, ARM_MMAP_MASK) 166 #define ARM_MMAP_NOCACHE __SHIFTIN(AARCH64_MMAP_NOCACHE, ARM_MMAP_MASK) 167 #define ARM_MMAP_DEVICE __SHIFTIN(AARCH64_MMAP_DEVICE, ARM_MMAP_MASK) 168 169 #define PMAP_PTE 0x10000000 /* kenter_pa */ 170 #define PMAP_DEV 0x20000000 /* kenter_pa */ 171 172 static inline u_int 173 aarch64_mmap_flags(paddr_t mdpgno) 174 { 175 u_int nflag, pflag; 176 177 /* 178 * aarch64 arch has 4 memory attribute: 179 * 180 * WriteBack - write back cache 181 * WriteThru - wite through cache 182 * NoCache - no cache 183 * Device(nGnRnE) - no Gathering, no Reordering, no Early write ack 184 * 185 * but pmap has PMAP_{NOCACHE,WRITE_COMBINE,WRITE_BACK} flags. 186 */ 187 188 nflag = (mdpgno >> AARCH64_MMAP_FLAG_SHIFT) & AARCH64_MMAP_FLAG_MASK; 189 switch (nflag) { 190 case AARCH64_MMAP_DEVICE: 191 pflag = PMAP_DEV; 192 break; 193 case AARCH64_MMAP_WRITECOMBINE: 194 pflag = PMAP_WRITE_COMBINE; 195 break; 196 case AARCH64_MMAP_WRITEBACK: 197 pflag = PMAP_WRITE_BACK; 198 break; 199 case AARCH64_MMAP_NOCACHE: 200 default: 201 pflag = PMAP_NOCACHE; 202 break; 203 } 204 return pflag; 205 } 206 207 208 #define pmap_phys_address(pa) aarch64_ptob((pa)) 209 #define pmap_mmap_flags(ppn) aarch64_mmap_flags((ppn)) 210 211 #define pmap_update(pmap) ((void)0) 212 #define pmap_copy(dp,sp,d,l,s) ((void)0) 213 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) 214 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) 215 216 bool pmap_extract_coherency(pmap_t, vaddr_t, paddr_t *, bool *); 217 218 #define PMAP_MAPSIZE1 L2_SIZE 219 220 #endif /* _KERNEL */ 221 222 #elif defined(__arm__) 223 224 #include <arm/pmap.h> 225 226 #endif /* __arm__/__aarch64__ */ 227 228 #endif /* !_AARCH64_PMAP_ */ 229
Indexes created Wed Oct 01 15:09:59 GMT 2025