pmap.h revision 1.16
1 /* $NetBSD: pmap.h,v 1.16 2018/10/18 09:01:51 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2014 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas of 3am Software Foundry. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _AARCH64_PMAP_H_ 33 #define _AARCH64_PMAP_H_ 34 35 #ifdef __aarch64__ 36 37 #ifdef _KERNEL 38 #include <sys/types.h> 39 #include <sys/pool.h> 40 #include <sys/queue.h> 41 #include <uvm/uvm_pglist.h> 42 43 #include <aarch64/pte.h> 44 45 #define PMAP_GROWKERNEL 46 #define PMAP_STEAL_MEMORY 47 48 #define __HAVE_VM_PAGE_MD 49 50 #define PMAP_MAP_POOLPAGE(pa) AARCH64_PA_TO_KVA(pa) 51 #define PMAP_UNMAP_POOLPAGE(va) AARCH64_KVA_TO_PA(va) 52 53 54 struct pmap { 55 kmutex_t pm_lock; 56 struct pool *pm_pvpool; 57 pd_entry_t *pm_l0table; /* L0 table: 512G*512 */ 58 paddr_t pm_l0table_pa; 59 60 SLIST_HEAD(, vm_page) pm_vmlist; /* for L[0123] tables */ 61 62 struct pmap_statistics pm_stats; 63 unsigned int pm_refcnt; 64 int pm_asid; 65 bool pm_activated; 66 }; 67 68 struct pv_entry; 69 struct vm_page_md { 70 kmutex_t mdpg_pvlock; 71 SLIST_ENTRY(vm_page) mdpg_vmlist; /* L[0-3] table vm_page list */ 72 TAILQ_HEAD(, pv_entry) mdpg_pvhead; 73 74 /* VM_PROT_READ means referenced, VM_PROT_WRITE means modified */ 75 uint32_t mdpg_flags; 76 }; 77 78 /* each mdpg_pvlock will be initialized in pmap_init() */ 79 #define VM_MDPAGE_INIT(pg) \ 80 do { \ 81 TAILQ_INIT(&(pg)->mdpage.mdpg_pvhead); \ 82 (pg)->mdpage.mdpg_flags = 0; \ 83 } while (/*CONSTCOND*/ 0) 84 85 86 /* saved permission bit for referenced/modified emulation */ 87 #define LX_BLKPAG_OS_READ LX_BLKPAG_OS_0 88 #define LX_BLKPAG_OS_WRITE LX_BLKPAG_OS_1 89 #define LX_BLKPAG_OS_WIRED LX_BLKPAG_OS_2 90 #define LX_BLKPAG_OS_BOOT LX_BLKPAG_OS_3 91 #define LX_BLKPAG_OS_RWMASK (LX_BLKPAG_OS_WRITE|LX_BLKPAG_OS_READ) 92 93 /* memory attributes are configured MAIR_EL1 in locore */ 94 #define LX_BLKPAG_ATTR_NORMAL_WB __SHIFTIN(0, LX_BLKPAG_ATTR_INDX) 95 #define LX_BLKPAG_ATTR_NORMAL_NC __SHIFTIN(1, LX_BLKPAG_ATTR_INDX) 96 #define LX_BLKPAG_ATTR_NORMAL_WT __SHIFTIN(2, LX_BLKPAG_ATTR_INDX) 97 #define LX_BLKPAG_ATTR_DEVICE_MEM __SHIFTIN(3, LX_BLKPAG_ATTR_INDX) 98 #define LX_BLKPAG_ATTR_MASK LX_BLKPAG_ATTR_INDX 99 100 #define lxpde_pa(pde) ((paddr_t)((pde) & LX_TBL_PA)) 101 #define l0pde_pa(pde) lxpde_pa(pde) 102 #define l0pde_index(v) (((vaddr_t)(v) & L0_ADDR_BITS) >> L0_SHIFT) 103 #define l0pde_valid(pde) (((pde) & LX_VALID) == LX_VALID) 104 /* l0pte always contains table entries */ 105 106 #define l1pde_pa(pde) lxpde_pa(pde) 107 #define l1pde_index(v) (((vaddr_t)(v) & L1_ADDR_BITS) >> L1_SHIFT) 108 #define l1pde_valid(pde) (((pde) & LX_VALID) == LX_VALID) 109 #define l1pde_is_block(pde) (((pde) & LX_TYPE) == LX_TYPE_BLK) 110 #define l1pde_is_table(pde) (((pde) & LX_TYPE) == LX_TYPE_TBL) 111 112 #define l2pde_pa(pde) lxpde_pa(pde) 113 #define l2pde_index(v) (((vaddr_t)(v) & L2_ADDR_BITS) >> L2_SHIFT) 114 #define l2pde_valid(pde) (((pde) & LX_VALID) == LX_VALID) 115 #define l2pde_is_block(pde) (((pde) & LX_TYPE) == LX_TYPE_BLK) 116 #define l2pde_is_table(pde) (((pde) & LX_TYPE) == LX_TYPE_TBL) 117 118 #define l3pte_pa(pde) lxpde_pa(pde) 119 #define l3pte_executable(pde,user) \ 120 (((pde) & ((user) ? LX_BLKPAG_UXN : LX_BLKPAG_PXN)) == 0) 121 #define l3pte_readable(pde) ((pde) & LX_BLKPAG_AF) 122 #define l3pte_writable(pde) \ 123 (((pde) & (LX_BLKPAG_AF|LX_BLKPAG_AP)) == (LX_BLKPAG_AF|LX_BLKPAG_AP_RW)) 124 #define l3pte_index(v) (((vaddr_t)(v) & L3_ADDR_BITS) >> L3_SHIFT) 125 #define l3pte_valid(pde) (((pde) & LX_VALID) == LX_VALID) 126 #define l3pte_is_page(pde) (((pde) & LX_TYPE) == L3_TYPE_PAG) 127 /* l3pte contains always page entries */ 128 129 void pmap_bootstrap(vaddr_t, vaddr_t); 130 bool pmap_fault_fixup(struct pmap *, vaddr_t, vm_prot_t, bool user); 131 132 /* for ddb */ 133 void pmap_db_pteinfo(vaddr_t, void (*)(const char *, ...) __printflike(1, 2)); 134 pt_entry_t *kvtopte(vaddr_t); 135 pt_entry_t pmap_kvattr(vaddr_t, vm_prot_t); 136 137 /* locore.S */ 138 pd_entry_t *bootpage_alloc(void); 139 140 /* pmap_locore.c */ 141 int pmapboot_enter(vaddr_t, paddr_t, psize_t, psize_t, 142 pt_entry_t, uint64_t, pd_entry_t *(*)(void), 143 void (*pr)(const char *, ...) __printflike(1, 2)); 144 #define PMAPBOOT_ENTER_NOBLOCK 0x00000001 145 #define PMAPBOOT_ENTER_NOOVERWRITE 0x00000002 146 int pmapboot_protect(vaddr_t, vaddr_t, vm_prot_t); 147 void pmap_db_pte_print(pt_entry_t, int, 148 void (*pr)(const char *, ...) __printflike(1, 2)); 149 150 /* Hooks for the pool allocator */ 151 paddr_t vtophys(vaddr_t); 152 #define VTOPHYS_FAILED ((paddr_t)-1L) /* POOL_PADDR_INVALID */ 153 #define POOL_VTOPHYS(va) vtophys((vaddr_t) (va)) 154 155 156 /* devmap */ 157 struct pmap_devmap { 158 vaddr_t pd_va; /* virtual address */ 159 paddr_t pd_pa; /* physical address */ 160 psize_t pd_size; /* size of region */ 161 vm_prot_t pd_prot; /* protection code */ 162 u_int pd_flags; /* flags for pmap_kenter_pa() */ 163 }; 164 165 void pmap_devmap_register(const struct pmap_devmap *); 166 void pmap_devmap_bootstrap(vaddr_t, const struct pmap_devmap *); 167 const struct pmap_devmap *pmap_devmap_find_pa(paddr_t, psize_t); 168 const struct pmap_devmap *pmap_devmap_find_va(vaddr_t, vsize_t); 169 vaddr_t pmap_devmap_phystov(paddr_t); 170 paddr_t pmap_devmap_vtophys(paddr_t); 171 172 pd_entry_t *pmap_alloc_pdp(struct pmap *, paddr_t *); 173 174 #define L1_TRUNC_BLOCK(x) ((x) & L1_FRAME) 175 #define L1_ROUND_BLOCK(x) L1_TRUNC_BLOCK((x) + L1_SIZE - 1) 176 #define L2_TRUNC_BLOCK(x) ((x) & L2_FRAME) 177 #define L2_ROUND_BLOCK(x) L2_TRUNC_BLOCK((x) + L2_SIZE - 1) 178 179 /* devmap use L2 blocks. (2Mbyte) */ 180 #define DEVMAP_TRUNC_ADDR(x) L2_TRUNC_BLOCK((x)) 181 #define DEVMAP_ROUND_SIZE(x) L2_ROUND_BLOCK((x)) 182 183 #define DEVMAP_ENTRY(va, pa, sz) \ 184 { \ 185 .pd_va = DEVMAP_TRUNC_ADDR(va), \ 186 .pd_pa = DEVMAP_TRUNC_ADDR(pa), \ 187 .pd_size = DEVMAP_ROUND_SIZE(sz), \ 188 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, \ 189 .pd_flags = PMAP_NOCACHE \ 190 } 191 #define DEVMAP_ENTRY_END { 0 } 192 193 /* mmap cookie and flags */ 194 #define AARCH64_MMAP_FLAG_SHIFT (64 - PGSHIFT) 195 #define AARCH64_MMAP_FLAG_MASK 0xf 196 #define AARCH64_MMAP_WRITEBACK 0UL 197 #define AARCH64_MMAP_NOCACHE 1UL 198 #define AARCH64_MMAP_WRITECOMBINE 2UL 199 #define AARCH64_MMAP_DEVICE 3UL 200 201 #define ARM_MMAP_MASK __BITS(63, AARCH64_MMAP_FLAG_SHIFT) 202 #define ARM_MMAP_WRITECOMBINE __SHIFTIN(AARCH64_MMAP_WRITECOMBINE, ARM_MMAP_MASK) 203 #define ARM_MMAP_WRITEBACK __SHIFTIN(AARCH64_MMAP_WRITEBACK, ARM_MMAP_MASK) 204 #define ARM_MMAP_NOCACHE __SHIFTIN(AARCH64_MMAP_NOCACHE, ARM_MMAP_MASK) 205 #define ARM_MMAP_DEVICE __SHIFTIN(AARCH64_MMAP_DEVICE, ARM_MMAP_MASK) 206 207 #define PMAP_PTE 0x10000000 /* kenter_pa */ 208 #define PMAP_DEV 0x20000000 /* kenter_pa */ 209 210 static inline u_int 211 aarch64_mmap_flags(paddr_t mdpgno) 212 { 213 u_int nflag, pflag; 214 215 /* 216 * aarch64 arch has 4 memory attribute: 217 * 218 * WriteBack - write back cache 219 * WriteThru - wite through cache 220 * NoCache - no cache 221 * Device(nGnRnE) - no Gathering, no Reordering, no Early write ack 222 * 223 * but pmap has PMAP_{NOCACHE,WRITE_COMBINE,WRITE_BACK} flags. 224 */ 225 226 nflag = (mdpgno >> AARCH64_MMAP_FLAG_SHIFT) & AARCH64_MMAP_FLAG_MASK; 227 switch (nflag) { 228 case AARCH64_MMAP_DEVICE: 229 pflag = PMAP_DEV; 230 break; 231 case AARCH64_MMAP_WRITECOMBINE: 232 pflag = PMAP_WRITE_COMBINE; 233 break; 234 case AARCH64_MMAP_WRITEBACK: 235 pflag = PMAP_WRITE_BACK; 236 break; 237 case AARCH64_MMAP_NOCACHE: 238 default: 239 pflag = PMAP_NOCACHE; 240 break; 241 } 242 return pflag; 243 } 244 245 246 #define pmap_phys_address(pa) aarch64_ptob((pa)) 247 #define pmap_mmap_flags(ppn) aarch64_mmap_flags((ppn)) 248 249 #define pmap_update(pmap) ((void)0) 250 #define pmap_copy(dp,sp,d,l,s) ((void)0) 251 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) 252 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) 253 254 bool pmap_extract_coherency(pmap_t, vaddr_t, paddr_t *, bool *); 255 void pmap_icache_sync_range(pmap_t, vaddr_t, vaddr_t); 256 257 #define PMAP_MAPSIZE1 L2_SIZE 258 259 #endif /* _KERNEL */ 260 261 #elif defined(__arm__) 262 263 #include <arm/pmap.h> 264 265 #endif /* __arm__/__aarch64__ */ 266 267 #endif /* !_AARCH64_PMAP_ */ 268
Indexes created Wed Oct 01 13:09:50 GMT 2025