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pmap.h revision 1.21 
      1 /* $NetBSD: pmap.h,v 1.21 2019/02/06 05:33:41 ryo Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2014 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Matt Thomas of 3am Software Foundry.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _AARCH64_PMAP_H_
     33 #define _AARCH64_PMAP_H_
     34 
     35 #ifdef __aarch64__
     36 
     37 #ifdef _KERNEL
     38 #ifdef _KERNEL_OPT
     39 #include "opt_kasan.h"
     40 #endif
     41 
     42 #include <sys/types.h>
     43 #include <sys/pool.h>
     44 #include <sys/queue.h>
     45 #include <uvm/uvm_pglist.h>
     46 
     47 #include <aarch64/pte.h>
     48 
     49 #define PMAP_GROWKERNEL
     50 #define PMAP_STEAL_MEMORY
     51 
     52 #define __HAVE_VM_PAGE_MD
     53 
     54 #ifndef KASAN
     55 #define PMAP_MAP_POOLPAGE(pa)		AARCH64_PA_TO_KVA(pa)
     56 #define PMAP_UNMAP_POOLPAGE(va)		AARCH64_KVA_TO_PA(va)
     57 
     58 #define PMAP_DIRECT
     59 static __inline int
     60 pmap_direct_process(paddr_t pa, voff_t pgoff, size_t len,
     61     int (*process)(void *, size_t, void *), void *arg)
     62 {
     63 	vaddr_t va = AARCH64_PA_TO_KVA(pa);
     64 
     65 	return process((void *)(va + pgoff), len, arg);
     66 }
     67 #endif
     68 
     69 struct pmap {
     70 	kmutex_t pm_lock;
     71 	struct pool *pm_pvpool;
     72 	pd_entry_t *pm_l0table;			/* L0 table: 512G*512 */
     73 	paddr_t pm_l0table_pa;
     74 
     75 	SLIST_HEAD(, vm_page) pm_vmlist;	/* for L[0123] tables */
     76 
     77 	struct pmap_statistics pm_stats;
     78 	unsigned int pm_refcnt;
     79 	int pm_asid;
     80 	bool pm_activated;
     81 };
     82 
     83 struct pv_entry;
     84 struct vm_page_md {
     85 	kmutex_t mdpg_pvlock;
     86 	SLIST_ENTRY(vm_page) mdpg_vmlist;	/* L[0-3] table vm_page list */
     87 	TAILQ_HEAD(, pv_entry) mdpg_pvhead;
     88 
     89 	/* VM_PROT_READ means referenced, VM_PROT_WRITE means modified */
     90 	uint32_t mdpg_flags;
     91 };
     92 
     93 /* each mdpg_pvlock will be initialized in pmap_init() */
     94 #define VM_MDPAGE_INIT(pg)				\
     95 	do {						\
     96 		TAILQ_INIT(&(pg)->mdpage.mdpg_pvhead);	\
     97 		(pg)->mdpage.mdpg_flags = 0;		\
     98 	} while (/*CONSTCOND*/ 0)
     99 
    100 
    101 /* saved permission bit for referenced/modified emulation */
    102 #define LX_BLKPAG_OS_READ		LX_BLKPAG_OS_0
    103 #define LX_BLKPAG_OS_WRITE		LX_BLKPAG_OS_1
    104 #define LX_BLKPAG_OS_WIRED		LX_BLKPAG_OS_2
    105 #define LX_BLKPAG_OS_BOOT		LX_BLKPAG_OS_3
    106 #define LX_BLKPAG_OS_RWMASK		(LX_BLKPAG_OS_WRITE|LX_BLKPAG_OS_READ)
    107 
    108 /* memory attributes are configured MAIR_EL1 in locore */
    109 #define LX_BLKPAG_ATTR_NORMAL_WB	__SHIFTIN(0, LX_BLKPAG_ATTR_INDX)
    110 #define LX_BLKPAG_ATTR_NORMAL_NC	__SHIFTIN(1, LX_BLKPAG_ATTR_INDX)
    111 #define LX_BLKPAG_ATTR_NORMAL_WT	__SHIFTIN(2, LX_BLKPAG_ATTR_INDX)
    112 #define LX_BLKPAG_ATTR_DEVICE_MEM	__SHIFTIN(3, LX_BLKPAG_ATTR_INDX)
    113 #define LX_BLKPAG_ATTR_MASK		LX_BLKPAG_ATTR_INDX
    114 
    115 #define lxpde_pa(pde)		((paddr_t)((pde) & LX_TBL_PA))
    116 #define lxpde_valid(pde)	(((pde) & LX_VALID) == LX_VALID)
    117 #define l0pde_pa(pde)		lxpde_pa(pde)
    118 #define l0pde_index(v)		(((vaddr_t)(v) & L0_ADDR_BITS) >> L0_SHIFT)
    119 #define l0pde_valid(pde)	lxpde_valid(pde)
    120 /* l0pte always contains table entries */
    121 
    122 #define l1pde_pa(pde)		lxpde_pa(pde)
    123 #define l1pde_index(v)		(((vaddr_t)(v) & L1_ADDR_BITS) >> L1_SHIFT)
    124 #define l1pde_valid(pde)	lxpde_valid(pde)
    125 #define l1pde_is_block(pde)	(((pde) & LX_TYPE) == LX_TYPE_BLK)
    126 #define l1pde_is_table(pde)	(((pde) & LX_TYPE) == LX_TYPE_TBL)
    127 
    128 #define l2pde_pa(pde)		lxpde_pa(pde)
    129 #define l2pde_index(v)		(((vaddr_t)(v) & L2_ADDR_BITS) >> L2_SHIFT)
    130 #define l2pde_valid(pde)	lxpde_valid(pde)
    131 #define l2pde_is_block(pde)	(((pde) & LX_TYPE) == LX_TYPE_BLK)
    132 #define l2pde_is_table(pde)	(((pde) & LX_TYPE) == LX_TYPE_TBL)
    133 
    134 #define l3pte_pa(pde)		lxpde_pa(pde)
    135 #define l3pte_executable(pde,user)	\
    136     (((pde) & ((user) ? LX_BLKPAG_UXN : LX_BLKPAG_PXN)) == 0)
    137 #define l3pte_readable(pde)	((pde) & LX_BLKPAG_AF)
    138 #define l3pte_writable(pde)	\
    139     (((pde) & (LX_BLKPAG_AF|LX_BLKPAG_AP)) == (LX_BLKPAG_AF|LX_BLKPAG_AP_RW))
    140 #define l3pte_index(v)		(((vaddr_t)(v) & L3_ADDR_BITS) >> L3_SHIFT)
    141 #define l3pte_valid(pde)	lxpde_valid(pde)
    142 #define l3pte_is_page(pde)	(((pde) & LX_TYPE) == L3_TYPE_PAG)
    143 /* l3pte contains always page entries */
    144 
    145 void pmap_bootstrap(vaddr_t, vaddr_t);
    146 bool pmap_fault_fixup(struct pmap *, vaddr_t, vm_prot_t, bool user);
    147 
    148 /* for ddb */
    149 void pmap_db_pteinfo(vaddr_t, void (*)(const char *, ...) __printflike(1, 2));
    150 pt_entry_t *kvtopte(vaddr_t);
    151 pt_entry_t pmap_kvattr(vaddr_t, vm_prot_t);
    152 
    153 /* locore.S */
    154 pd_entry_t *bootpage_alloc(void);
    155 
    156 /* pmap_locore.c */
    157 int pmapboot_enter(vaddr_t, paddr_t, psize_t, psize_t,
    158     pt_entry_t, uint64_t, pd_entry_t *(*)(void),
    159     void (*pr)(const char *, ...) __printflike(1, 2));
    160 #define PMAPBOOT_ENTER_NOBLOCK		0x00000001
    161 #define PMAPBOOT_ENTER_NOOVERWRITE	0x00000002
    162 int pmapboot_protect(vaddr_t, vaddr_t, vm_prot_t);
    163 void pmap_db_pte_print(pt_entry_t, int,
    164     void (*pr)(const char *, ...) __printflike(1, 2));
    165 
    166 /* Hooks for the pool allocator */
    167 paddr_t vtophys(vaddr_t);
    168 #define VTOPHYS_FAILED		((paddr_t)-1L)	/* POOL_PADDR_INVALID */
    169 #define POOL_VTOPHYS(va)	vtophys((vaddr_t) (va))
    170 
    171 
    172 /* devmap */
    173 struct pmap_devmap {
    174 	vaddr_t pd_va;		/* virtual address */
    175 	paddr_t pd_pa;		/* physical address */
    176 	psize_t pd_size;	/* size of region */
    177 	vm_prot_t pd_prot;	/* protection code */
    178 	u_int pd_flags;		/* flags for pmap_kenter_pa() */
    179 };
    180 
    181 void pmap_devmap_register(const struct pmap_devmap *);
    182 void pmap_devmap_bootstrap(vaddr_t, const struct pmap_devmap *);
    183 const struct pmap_devmap *pmap_devmap_find_pa(paddr_t, psize_t);
    184 const struct pmap_devmap *pmap_devmap_find_va(vaddr_t, vsize_t);
    185 vaddr_t pmap_devmap_phystov(paddr_t);
    186 paddr_t pmap_devmap_vtophys(paddr_t);
    187 
    188 pd_entry_t *pmap_alloc_pdp(struct pmap *, paddr_t *);
    189 
    190 #define L1_TRUNC_BLOCK(x)	((x) & L1_FRAME)
    191 #define L1_ROUND_BLOCK(x)	L1_TRUNC_BLOCK((x) + L1_SIZE - 1)
    192 #define L2_TRUNC_BLOCK(x)	((x) & L2_FRAME)
    193 #define L2_ROUND_BLOCK(x)	L2_TRUNC_BLOCK((x) + L2_SIZE - 1)
    194 
    195 /* devmap use L2 blocks. (2Mbyte) */
    196 #define DEVMAP_TRUNC_ADDR(x)	L2_TRUNC_BLOCK((x))
    197 #define DEVMAP_ROUND_SIZE(x)	L2_ROUND_BLOCK((x))
    198 
    199 #define	DEVMAP_ENTRY(va, pa, sz)			\
    200 	{						\
    201 		.pd_va = DEVMAP_TRUNC_ADDR(va),		\
    202 		.pd_pa = DEVMAP_TRUNC_ADDR(pa),		\
    203 		.pd_size = DEVMAP_ROUND_SIZE(sz),	\
    204 		.pd_prot = VM_PROT_READ|VM_PROT_WRITE,	\
    205 		.pd_flags = PMAP_NOCACHE		\
    206 	}
    207 #define	DEVMAP_ENTRY_END	{ 0 }
    208 
    209 /* mmap cookie and flags */
    210 #define AARCH64_MMAP_FLAG_SHIFT		(64 - PGSHIFT)
    211 #define AARCH64_MMAP_FLAG_MASK		0xf
    212 #define AARCH64_MMAP_WRITEBACK		0UL
    213 #define AARCH64_MMAP_NOCACHE		1UL
    214 #define AARCH64_MMAP_WRITECOMBINE	2UL
    215 #define AARCH64_MMAP_DEVICE		3UL
    216 
    217 #define ARM_MMAP_MASK			__BITS(63, AARCH64_MMAP_FLAG_SHIFT)
    218 #define ARM_MMAP_WRITECOMBINE		__SHIFTIN(AARCH64_MMAP_WRITECOMBINE, ARM_MMAP_MASK)
    219 #define ARM_MMAP_WRITEBACK		__SHIFTIN(AARCH64_MMAP_WRITEBACK, ARM_MMAP_MASK)
    220 #define ARM_MMAP_NOCACHE		__SHIFTIN(AARCH64_MMAP_NOCACHE, ARM_MMAP_MASK)
    221 #define ARM_MMAP_DEVICE			__SHIFTIN(AARCH64_MMAP_DEVICE, ARM_MMAP_MASK)
    222 
    223 #define	PMAP_PTE			0x10000000 /* kenter_pa */
    224 #define	PMAP_DEV			0x20000000 /* kenter_pa */
    225 
    226 static inline u_int
    227 aarch64_mmap_flags(paddr_t mdpgno)
    228 {
    229 	u_int nflag, pflag;
    230 
    231 	/*
    232 	 * aarch64 arch has 4 memory attribute:
    233 	 *
    234 	 *  WriteBack      - write back cache
    235 	 *  WriteThru      - wite through cache
    236 	 *  NoCache        - no cache
    237 	 *  Device(nGnRnE) - no Gathering, no Reordering, no Early write ack
    238 	 *
    239 	 * but pmap has PMAP_{NOCACHE,WRITE_COMBINE,WRITE_BACK} flags.
    240 	 */
    241 
    242 	nflag = (mdpgno >> AARCH64_MMAP_FLAG_SHIFT) & AARCH64_MMAP_FLAG_MASK;
    243 	switch (nflag) {
    244 	case AARCH64_MMAP_DEVICE:
    245 		pflag = PMAP_DEV;
    246 		break;
    247 	case AARCH64_MMAP_WRITECOMBINE:
    248 		pflag = PMAP_WRITE_COMBINE;
    249 		break;
    250 	case AARCH64_MMAP_WRITEBACK:
    251 		pflag = PMAP_WRITE_BACK;
    252 		break;
    253 	case AARCH64_MMAP_NOCACHE:
    254 	default:
    255 		pflag = PMAP_NOCACHE;
    256 		break;
    257 	}
    258 	return pflag;
    259 }
    260 
    261 
    262 #define pmap_phys_address(pa)		aarch64_ptob((pa))
    263 #define pmap_mmap_flags(ppn)		aarch64_mmap_flags((ppn))
    264 
    265 #define pmap_update(pmap)		((void)0)
    266 #define pmap_copy(dp,sp,d,l,s)		((void)0)
    267 #define pmap_wired_count(pmap)		((pmap)->pm_stats.wired_count)
    268 #define pmap_resident_count(pmap)	((pmap)->pm_stats.resident_count)
    269 
    270 bool	pmap_extract_coherency(pmap_t, vaddr_t, paddr_t *, bool *);
    271 void	pmap_icache_sync_range(pmap_t, vaddr_t, vaddr_t);
    272 
    273 #define	PMAP_MAPSIZE1	L2_SIZE
    274 
    275 #endif /* _KERNEL */
    276 
    277 #elif defined(__arm__)
    278 
    279 #include <arm/pmap.h>
    280 
    281 #endif /* __arm__/__aarch64__ */
    282 
    283 #endif /* !_AARCH64_PMAP_ */
    284