pmap.h revision 1.39
1 /* $NetBSD: pmap.h,v 1.39 2020/05/14 07:59:03 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2014 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas of 3am Software Foundry. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _AARCH64_PMAP_H_ 33 #define _AARCH64_PMAP_H_ 34 35 #ifdef __aarch64__ 36 37 #ifdef _KERNEL 38 #ifdef _KERNEL_OPT 39 #include "opt_kasan.h" 40 #endif 41 42 #include <sys/types.h> 43 #include <sys/pool.h> 44 #include <sys/queue.h> 45 #include <uvm/uvm_pglist.h> 46 47 #include <aarch64/armreg.h> 48 #include <aarch64/pte.h> 49 50 #define PMAP_NEED_PROCWR 51 #define PMAP_GROWKERNEL 52 #define PMAP_STEAL_MEMORY 53 54 #define __HAVE_VM_PAGE_MD 55 #define __HAVE_PMAP_PV_TRACK 1 56 57 #ifndef KASAN 58 #define PMAP_MAP_POOLPAGE(pa) AARCH64_PA_TO_KVA(pa) 59 #define PMAP_UNMAP_POOLPAGE(va) AARCH64_KVA_TO_PA(va) 60 61 #define PMAP_DIRECT 62 static __inline int 63 pmap_direct_process(paddr_t pa, voff_t pgoff, size_t len, 64 int (*process)(void *, size_t, void *), void *arg) 65 { 66 vaddr_t va = AARCH64_PA_TO_KVA(pa); 67 68 return process((void *)(va + pgoff), len, arg); 69 } 70 #endif 71 72 struct pmap { 73 kmutex_t pm_lock; 74 struct pool *pm_pvpool; 75 pd_entry_t *pm_l0table; /* L0 table: 512G*512 */ 76 paddr_t pm_l0table_pa; 77 78 LIST_HEAD(, vm_page) pm_vmlist; /* for L[0123] tables */ 79 80 struct pmap_statistics pm_stats; 81 unsigned int pm_refcnt; 82 unsigned int pm_idlepdp; 83 int pm_asid; 84 bool pm_activated; 85 }; 86 87 struct pv_entry; 88 89 struct pmap_page { 90 kmutex_t pp_pvlock; 91 LIST_HEAD(, pv_entry) pp_pvhead; 92 93 /* VM_PROT_READ means referenced, VM_PROT_WRITE means modified */ 94 uint32_t pp_flags; 95 }; 96 97 struct vm_page_md { 98 LIST_ENTRY(vm_page) mdpg_vmlist; /* L[0123] table vm_page list */ 99 pd_entry_t *mdpg_ptep_parent; /* for page descriptor page only */ 100 101 struct pmap_page mdpg_pp; 102 }; 103 104 #define VM_MDPAGE_INIT(pg) \ 105 do { \ 106 (pg)->mdpage.mdpg_ptep_parent = NULL; \ 107 PMAP_PAGE_INIT(&(pg)->mdpage.mdpg_pp); \ 108 } while (/*CONSTCOND*/ 0) 109 110 #define PMAP_PAGE_INIT(pp) \ 111 do { \ 112 mutex_init(&(pp)->pp_pvlock, MUTEX_NODEBUG, IPL_VM); \ 113 LIST_INIT(&(pp)->pp_pvhead); \ 114 (pp)->pp_flags = 0; \ 115 } while (/*CONSTCOND*/ 0) 116 117 /* saved permission bit for referenced/modified emulation */ 118 #define LX_BLKPAG_OS_READ LX_BLKPAG_OS_0 119 #define LX_BLKPAG_OS_WRITE LX_BLKPAG_OS_1 120 #define LX_BLKPAG_OS_WIRED LX_BLKPAG_OS_2 121 #define LX_BLKPAG_OS_BOOT LX_BLKPAG_OS_3 122 #define LX_BLKPAG_OS_RWMASK (LX_BLKPAG_OS_WRITE|LX_BLKPAG_OS_READ) 123 124 /* memory attributes are configured MAIR_EL1 in locore */ 125 #define LX_BLKPAG_ATTR_NORMAL_WB __SHIFTIN(0, LX_BLKPAG_ATTR_INDX) 126 #define LX_BLKPAG_ATTR_NORMAL_NC __SHIFTIN(1, LX_BLKPAG_ATTR_INDX) 127 #define LX_BLKPAG_ATTR_NORMAL_WT __SHIFTIN(2, LX_BLKPAG_ATTR_INDX) 128 #define LX_BLKPAG_ATTR_DEVICE_MEM __SHIFTIN(3, LX_BLKPAG_ATTR_INDX) 129 #define LX_BLKPAG_ATTR_DEVICE_MEM_SO __SHIFTIN(4, LX_BLKPAG_ATTR_INDX) 130 #define LX_BLKPAG_ATTR_MASK LX_BLKPAG_ATTR_INDX 131 132 #define lxpde_pa(pde) ((paddr_t)((pde) & LX_TBL_PA)) 133 #define lxpde_valid(pde) (((pde) & LX_VALID) == LX_VALID) 134 #define l0pde_pa(pde) lxpde_pa(pde) 135 #define l0pde_index(v) (((vaddr_t)(v) & L0_ADDR_BITS) >> L0_SHIFT) 136 #define l0pde_valid(pde) lxpde_valid(pde) 137 /* l0pte always contains table entries */ 138 139 #define l1pde_pa(pde) lxpde_pa(pde) 140 #define l1pde_index(v) (((vaddr_t)(v) & L1_ADDR_BITS) >> L1_SHIFT) 141 #define l1pde_valid(pde) lxpde_valid(pde) 142 #define l1pde_is_block(pde) (((pde) & LX_TYPE) == LX_TYPE_BLK) 143 #define l1pde_is_table(pde) (((pde) & LX_TYPE) == LX_TYPE_TBL) 144 145 #define l2pde_pa(pde) lxpde_pa(pde) 146 #define l2pde_index(v) (((vaddr_t)(v) & L2_ADDR_BITS) >> L2_SHIFT) 147 #define l2pde_valid(pde) lxpde_valid(pde) 148 #define l2pde_is_block(pde) (((pde) & LX_TYPE) == LX_TYPE_BLK) 149 #define l2pde_is_table(pde) (((pde) & LX_TYPE) == LX_TYPE_TBL) 150 151 #define l3pte_pa(pde) lxpde_pa(pde) 152 #define l3pte_executable(pde,user) \ 153 (((pde) & ((user) ? LX_BLKPAG_UXN : LX_BLKPAG_PXN)) == 0) 154 #define l3pte_readable(pde) ((pde) & LX_BLKPAG_AF) 155 #define l3pte_writable(pde) \ 156 (((pde) & (LX_BLKPAG_AF|LX_BLKPAG_AP)) == (LX_BLKPAG_AF|LX_BLKPAG_AP_RW)) 157 #define l3pte_index(v) (((vaddr_t)(v) & L3_ADDR_BITS) >> L3_SHIFT) 158 #define l3pte_valid(pde) lxpde_valid(pde) 159 #define l3pte_is_page(pde) (((pde) & LX_TYPE) == L3_TYPE_PAG) 160 /* l3pte contains always page entries */ 161 162 void pmap_bootstrap(vaddr_t, vaddr_t); 163 bool pmap_fault_fixup(struct pmap *, vaddr_t, vm_prot_t, bool user); 164 165 /* for ddb */ 166 void pmap_db_pteinfo(vaddr_t, void (*)(const char *, ...) __printflike(1, 2)); 167 void pmap_db_ttbrdump(bool, vaddr_t, void (*)(const char *, ...) 168 __printflike(1, 2)); 169 pt_entry_t *kvtopte(vaddr_t); 170 pt_entry_t pmap_kvattr(vaddr_t, vm_prot_t); 171 172 /* locore.S */ 173 pd_entry_t *bootpage_alloc(void); 174 175 /* pmap_locore.c */ 176 int pmapboot_enter(vaddr_t, paddr_t, psize_t, psize_t, 177 pt_entry_t, uint64_t, pd_entry_t *(*)(void), 178 void (*pr)(const char *, ...) __printflike(1, 2)); 179 #define PMAPBOOT_ENTER_NOBLOCK 0x00000001 180 #define PMAPBOOT_ENTER_NOOVERWRITE 0x00000002 181 int pmapboot_enter_range(vaddr_t, paddr_t, psize_t, pt_entry_t, uint64_t, 182 pd_entry_t *(*)(void), void (*)(const char *, ...) __printflike(1, 2)); 183 int pmapboot_protect(vaddr_t, vaddr_t, vm_prot_t); 184 void pmap_db_pte_print(pt_entry_t, int, 185 void (*pr)(const char *, ...) __printflike(1, 2)); 186 187 /* Hooks for the pool allocator */ 188 paddr_t vtophys(vaddr_t); 189 #define VTOPHYS_FAILED ((paddr_t)-1L) /* POOL_PADDR_INVALID */ 190 #define POOL_VTOPHYS(va) vtophys((vaddr_t) (va)) 191 192 193 /* devmap */ 194 struct pmap_devmap { 195 vaddr_t pd_va; /* virtual address */ 196 paddr_t pd_pa; /* physical address */ 197 psize_t pd_size; /* size of region */ 198 vm_prot_t pd_prot; /* protection code */ 199 u_int pd_flags; /* flags for pmap_kenter_pa() */ 200 }; 201 202 void pmap_devmap_register(const struct pmap_devmap *); 203 void pmap_devmap_bootstrap(vaddr_t, const struct pmap_devmap *); 204 const struct pmap_devmap *pmap_devmap_find_pa(paddr_t, psize_t); 205 const struct pmap_devmap *pmap_devmap_find_va(vaddr_t, vsize_t); 206 vaddr_t pmap_devmap_phystov(paddr_t); 207 paddr_t pmap_devmap_vtophys(paddr_t); 208 209 paddr_t pmap_alloc_pdp(struct pmap *, struct vm_page **, int, bool); 210 211 #define L1_TRUNC_BLOCK(x) ((x) & L1_FRAME) 212 #define L1_ROUND_BLOCK(x) L1_TRUNC_BLOCK((x) + L1_SIZE - 1) 213 #define L2_TRUNC_BLOCK(x) ((x) & L2_FRAME) 214 #define L2_ROUND_BLOCK(x) L2_TRUNC_BLOCK((x) + L2_SIZE - 1) 215 #define L3_TRUNC_BLOCK(x) ((x) & L3_FRAME) 216 #define L3_ROUND_BLOCK(x) L3_TRUNC_BLOCK((x) + L3_SIZE - 1) 217 218 #define DEVMAP_ALIGN(x) L3_TRUNC_BLOCK((x)) 219 #define DEVMAP_SIZE(x) L3_ROUND_BLOCK((x)) 220 221 #define DEVMAP_ENTRY(va, pa, sz) \ 222 { \ 223 .pd_va = DEVMAP_ALIGN(va), \ 224 .pd_pa = DEVMAP_ALIGN(pa), \ 225 .pd_size = DEVMAP_SIZE(sz), \ 226 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, \ 227 .pd_flags = PMAP_DEV \ 228 } 229 #define DEVMAP_ENTRY_END { 0 } 230 231 /* mmap cookie and flags */ 232 #define AARCH64_MMAP_FLAG_SHIFT (64 - PGSHIFT) 233 #define AARCH64_MMAP_FLAG_MASK 0xf 234 #define AARCH64_MMAP_WRITEBACK 0UL 235 #define AARCH64_MMAP_NOCACHE 1UL 236 #define AARCH64_MMAP_WRITECOMBINE 2UL 237 #define AARCH64_MMAP_DEVICE 3UL 238 239 #define ARM_MMAP_MASK __BITS(63, AARCH64_MMAP_FLAG_SHIFT) 240 #define ARM_MMAP_WRITECOMBINE __SHIFTIN(AARCH64_MMAP_WRITECOMBINE, ARM_MMAP_MASK) 241 #define ARM_MMAP_WRITEBACK __SHIFTIN(AARCH64_MMAP_WRITEBACK, ARM_MMAP_MASK) 242 #define ARM_MMAP_NOCACHE __SHIFTIN(AARCH64_MMAP_NOCACHE, ARM_MMAP_MASK) 243 #define ARM_MMAP_DEVICE __SHIFTIN(AARCH64_MMAP_DEVICE, ARM_MMAP_MASK) 244 245 #define PMAP_PTE 0x10000000 /* kenter_pa */ 246 #define PMAP_DEV 0x20000000 /* kenter_pa */ 247 #define PMAP_DEV_SO 0x40000000 /* kenter_pa */ 248 #define PMAP_DEV_MASK (PMAP_DEV | PMAP_DEV_SO) 249 250 static inline u_int 251 aarch64_mmap_flags(paddr_t mdpgno) 252 { 253 u_int nflag, pflag; 254 255 /* 256 * aarch64 arch has 5 memory attribute: 257 * 258 * WriteBack - write back cache 259 * WriteThru - write through cache 260 * NoCache - no cache 261 * Device(nGnRE) - no Gathering, no Reordering, Early write ack 262 * Device(nGnRnE) - no Gathering, no Reordering, no Early write ack 263 * 264 * but pmap has PMAP_{NOCACHE,WRITE_COMBINE,WRITE_BACK} flags. 265 */ 266 267 nflag = (mdpgno >> AARCH64_MMAP_FLAG_SHIFT) & AARCH64_MMAP_FLAG_MASK; 268 switch (nflag) { 269 case AARCH64_MMAP_DEVICE: 270 pflag = PMAP_DEV; 271 break; 272 case AARCH64_MMAP_WRITECOMBINE: 273 pflag = PMAP_WRITE_COMBINE; 274 break; 275 case AARCH64_MMAP_WRITEBACK: 276 pflag = PMAP_WRITE_BACK; 277 break; 278 case AARCH64_MMAP_NOCACHE: 279 default: 280 pflag = PMAP_NOCACHE; 281 break; 282 } 283 return pflag; 284 } 285 286 #define pmap_phys_address(pa) aarch64_ptob((pa)) 287 #define pmap_mmap_flags(ppn) aarch64_mmap_flags((ppn)) 288 289 #define pmap_update(pmap) ((void)0) 290 #define pmap_copy(dp,sp,d,l,s) ((void)0) 291 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) 292 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) 293 294 void pmap_procwr(struct proc *, vaddr_t, int); 295 bool pmap_extract_coherency(pmap_t, vaddr_t, paddr_t *, bool *); 296 void pmap_icache_sync_range(pmap_t, vaddr_t, vaddr_t); 297 298 void pmap_pv_init(void); 299 void pmap_pv_track(paddr_t, psize_t); 300 void pmap_pv_untrack(paddr_t, psize_t); 301 void pmap_pv_protect(paddr_t, vm_prot_t); 302 303 #define PMAP_MAPSIZE1 L2_SIZE 304 305 #endif /* _KERNEL */ 306 307 #elif defined(__arm__) 308 309 #include <arm/pmap.h> 310 311 #endif /* __arm__/__aarch64__ */ 312 313 #endif /* !_AARCH64_PMAP_ */ 314
Indexes created Fri Oct 03 02:09:57 GMT 2025