pmap.h revision 1.48
1 /* $NetBSD: pmap.h,v 1.48 2021/05/19 12:16:01 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2014 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas of 3am Software Foundry. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _AARCH64_PMAP_H_ 33 #define _AARCH64_PMAP_H_ 34 35 #ifdef __aarch64__ 36 37 #ifdef _KERNEL 38 #ifdef _KERNEL_OPT 39 #include "opt_kasan.h" 40 #endif 41 42 #include <sys/types.h> 43 #include <sys/pool.h> 44 #include <sys/queue.h> 45 #include <uvm/uvm_pglist.h> 46 47 #include <aarch64/armreg.h> 48 #include <aarch64/pte.h> 49 50 #define PMAP_NEED_PROCWR 51 #define PMAP_GROWKERNEL 52 #define PMAP_STEAL_MEMORY 53 54 #define __HAVE_VM_PAGE_MD 55 #define __HAVE_PMAP_PV_TRACK 1 56 57 #ifndef KASAN 58 #define PMAP_MAP_POOLPAGE(pa) AARCH64_PA_TO_KVA(pa) 59 #define PMAP_UNMAP_POOLPAGE(va) AARCH64_KVA_TO_PA(va) 60 61 #define PMAP_DIRECT 62 static __inline int 63 pmap_direct_process(paddr_t pa, voff_t pgoff, size_t len, 64 int (*process)(void *, size_t, void *), void *arg) 65 { 66 vaddr_t va = AARCH64_PA_TO_KVA(pa); 67 68 return process((void *)(va + pgoff), len, arg); 69 } 70 #endif 71 72 struct pmap { 73 kmutex_t pm_lock; 74 struct pool *pm_pvpool; 75 pd_entry_t *pm_l0table; /* L0 table: 512G*512 */ 76 paddr_t pm_l0table_pa; 77 78 LIST_HEAD(, vm_page) pm_vmlist; /* for L[0123] tables */ 79 LIST_HEAD(, pv_entry) pm_pvlist; /* all pv of this process */ 80 81 struct pmap_statistics pm_stats; 82 unsigned int pm_refcnt; 83 unsigned int pm_idlepdp; 84 int pm_asid; 85 bool pm_activated; 86 }; 87 88 /* 89 * should be kept <=32 bytes sized to reduce memory consumption & cache misses, 90 * but it doesn't... 91 */ 92 struct pv_entry { 93 struct pv_entry *pv_next; 94 struct pmap *pv_pmap; 95 vaddr_t pv_va; /* for embedded entry (pp_pv) also includes flags */ 96 void *pv_ptep; /* pointer for fast pte lookup */ 97 LIST_ENTRY(pv_entry) pv_proc; /* belonging to the process */ 98 }; 99 100 struct pmap_page { 101 kmutex_t pp_pvlock; 102 struct pv_entry pp_pv; 103 }; 104 105 /* try to keep vm_page at or under 128 bytes to reduce cache misses */ 106 struct vm_page_md { 107 struct pmap_page mdpg_pp; 108 }; 109 /* for page descriptor page only */ 110 #define mdpg_ptep_parent mdpg_pp.pp_pv.pv_ptep 111 112 #define VM_MDPAGE_INIT(pg) \ 113 do { \ 114 PMAP_PAGE_INIT(&(pg)->mdpage.mdpg_pp); \ 115 } while (/*CONSTCOND*/ 0) 116 117 #define PMAP_PAGE_INIT(pp) \ 118 do { \ 119 mutex_init(&(pp)->pp_pvlock, MUTEX_NODEBUG, IPL_NONE); \ 120 (pp)->pp_pv.pv_next = NULL; \ 121 (pp)->pp_pv.pv_pmap = NULL; \ 122 (pp)->pp_pv.pv_va = 0; \ 123 (pp)->pp_pv.pv_ptep = NULL; \ 124 } while (/*CONSTCOND*/ 0) 125 126 /* saved permission bit for referenced/modified emulation */ 127 #define LX_BLKPAG_OS_READ LX_BLKPAG_OS_0 128 #define LX_BLKPAG_OS_WRITE LX_BLKPAG_OS_1 129 #define LX_BLKPAG_OS_WIRED LX_BLKPAG_OS_2 130 #define LX_BLKPAG_OS_BOOT LX_BLKPAG_OS_3 131 #define LX_BLKPAG_OS_RWMASK (LX_BLKPAG_OS_WRITE|LX_BLKPAG_OS_READ) 132 133 #define PMAP_PTE_OS0 "read" 134 #define PMAP_PTE_OS1 "write" 135 #define PMAP_PTE_OS2 "wired" 136 #define PMAP_PTE_OS3 "boot" 137 138 /* memory attributes are configured MAIR_EL1 in locore */ 139 #define LX_BLKPAG_ATTR_NORMAL_WB __SHIFTIN(0, LX_BLKPAG_ATTR_INDX) 140 #define LX_BLKPAG_ATTR_NORMAL_NC __SHIFTIN(1, LX_BLKPAG_ATTR_INDX) 141 #define LX_BLKPAG_ATTR_NORMAL_WT __SHIFTIN(2, LX_BLKPAG_ATTR_INDX) 142 #define LX_BLKPAG_ATTR_DEVICE_MEM __SHIFTIN(3, LX_BLKPAG_ATTR_INDX) 143 #define LX_BLKPAG_ATTR_DEVICE_MEM_SO __SHIFTIN(4, LX_BLKPAG_ATTR_INDX) 144 #define LX_BLKPAG_ATTR_MASK LX_BLKPAG_ATTR_INDX 145 146 #define lxpde_pa(pde) ((paddr_t)((pde) & LX_TBL_PA)) 147 #define lxpde_valid(pde) (((pde) & LX_VALID) == LX_VALID) 148 #define l0pde_pa(pde) lxpde_pa(pde) 149 #define l0pde_index(v) (((vaddr_t)(v) & L0_ADDR_BITS) >> L0_SHIFT) 150 #define l0pde_valid(pde) lxpde_valid(pde) 151 /* l0pte always contains table entries */ 152 153 #define l1pde_pa(pde) lxpde_pa(pde) 154 #define l1pde_index(v) (((vaddr_t)(v) & L1_ADDR_BITS) >> L1_SHIFT) 155 #define l1pde_valid(pde) lxpde_valid(pde) 156 #define l1pde_is_block(pde) (((pde) & LX_TYPE) == LX_TYPE_BLK) 157 #define l1pde_is_table(pde) (((pde) & LX_TYPE) == LX_TYPE_TBL) 158 159 #define l2pde_pa(pde) lxpde_pa(pde) 160 #define l2pde_index(v) (((vaddr_t)(v) & L2_ADDR_BITS) >> L2_SHIFT) 161 #define l2pde_valid(pde) lxpde_valid(pde) 162 #define l2pde_is_block(pde) (((pde) & LX_TYPE) == LX_TYPE_BLK) 163 #define l2pde_is_table(pde) (((pde) & LX_TYPE) == LX_TYPE_TBL) 164 165 #define l3pte_pa(pde) lxpde_pa(pde) 166 #define l3pte_executable(pde,user) \ 167 (((pde) & ((user) ? LX_BLKPAG_UXN : LX_BLKPAG_PXN)) == 0) 168 #define l3pte_readable(pde) ((pde) & LX_BLKPAG_AF) 169 #define l3pte_writable(pde) \ 170 (((pde) & (LX_BLKPAG_AF|LX_BLKPAG_AP)) == (LX_BLKPAG_AF|LX_BLKPAG_AP_RW)) 171 #define l3pte_index(v) (((vaddr_t)(v) & L3_ADDR_BITS) >> L3_SHIFT) 172 #define l3pte_valid(pde) lxpde_valid(pde) 173 #define l3pte_is_page(pde) (((pde) & LX_TYPE) == L3_TYPE_PAG) 174 /* l3pte contains always page entries */ 175 176 void pmap_bootstrap(vaddr_t, vaddr_t); 177 bool pmap_fault_fixup(struct pmap *, vaddr_t, vm_prot_t, bool user); 178 179 /* for ddb */ 180 pt_entry_t *kvtopte(vaddr_t); 181 void pmap_db_pmap_print(struct pmap *, void (*)(const char *, ...) __printflike(1, 2)); 182 void pmap_db_mdpg_print(struct vm_page *, void (*)(const char *, ...) __printflike(1, 2)); 183 184 pd_entry_t *pmap_l0table(struct pmap *); 185 186 /* change attribute of kernel segment */ 187 static inline pt_entry_t 188 pmap_kvattr(pt_entry_t *ptep, vm_prot_t prot) 189 { 190 pt_entry_t pte = *ptep; 191 const pt_entry_t opte = pte; 192 193 pte &= ~(LX_BLKPAG_AF|LX_BLKPAG_AP); 194 switch (prot & (VM_PROT_READ|VM_PROT_WRITE)) { 195 case 0: 196 break; 197 case VM_PROT_READ: 198 pte |= (LX_BLKPAG_AF|LX_BLKPAG_AP_RO); 199 break; 200 case VM_PROT_WRITE: 201 case VM_PROT_READ|VM_PROT_WRITE: 202 pte |= (LX_BLKPAG_AF|LX_BLKPAG_AP_RW); 203 break; 204 } 205 206 if ((prot & VM_PROT_EXECUTE) == 0) { 207 pte |= LX_BLKPAG_PXN; 208 } else { 209 pte |= LX_BLKPAG_AF; 210 pte &= ~LX_BLKPAG_PXN; 211 } 212 213 *ptep = pte; 214 215 return opte; 216 } 217 218 /* pmapboot.c */ 219 pd_entry_t *pmapboot_pagealloc(void); 220 void pmapboot_enter(vaddr_t, paddr_t, psize_t, psize_t, pt_entry_t, 221 void (*pr)(const char *, ...) __printflike(1, 2)); 222 void pmapboot_enter_range(vaddr_t, paddr_t, psize_t, pt_entry_t, 223 void (*)(const char *, ...) __printflike(1, 2)); 224 int pmapboot_protect(vaddr_t, vaddr_t, vm_prot_t); 225 226 /* Hooks for the pool allocator */ 227 paddr_t vtophys(vaddr_t); 228 #define VTOPHYS_FAILED ((paddr_t)-1L) /* POOL_PADDR_INVALID */ 229 #define POOL_VTOPHYS(va) vtophys((vaddr_t) (va)) 230 231 /* devmap */ 232 struct pmap_devmap { 233 vaddr_t pd_va; /* virtual address */ 234 paddr_t pd_pa; /* physical address */ 235 psize_t pd_size; /* size of region */ 236 vm_prot_t pd_prot; /* protection code */ 237 u_int pd_flags; /* flags for pmap_kenter_pa() */ 238 }; 239 240 void pmap_devmap_register(const struct pmap_devmap *); 241 void pmap_devmap_bootstrap(vaddr_t, const struct pmap_devmap *); 242 const struct pmap_devmap *pmap_devmap_find_pa(paddr_t, psize_t); 243 const struct pmap_devmap *pmap_devmap_find_va(vaddr_t, vsize_t); 244 vaddr_t pmap_devmap_phystov(paddr_t); 245 paddr_t pmap_devmap_vtophys(paddr_t); 246 247 #define L1_TRUNC_BLOCK(x) ((x) & L1_FRAME) 248 #define L1_ROUND_BLOCK(x) L1_TRUNC_BLOCK((x) + L1_SIZE - 1) 249 #define L2_TRUNC_BLOCK(x) ((x) & L2_FRAME) 250 #define L2_ROUND_BLOCK(x) L2_TRUNC_BLOCK((x) + L2_SIZE - 1) 251 #define L3_TRUNC_BLOCK(x) ((x) & L3_FRAME) 252 #define L3_ROUND_BLOCK(x) L3_TRUNC_BLOCK((x) + L3_SIZE - 1) 253 254 #define DEVMAP_ALIGN(x) L3_TRUNC_BLOCK((x)) 255 #define DEVMAP_SIZE(x) L3_ROUND_BLOCK((x)) 256 257 #define DEVMAP_ENTRY(va, pa, sz) \ 258 { \ 259 .pd_va = DEVMAP_ALIGN(va), \ 260 .pd_pa = DEVMAP_ALIGN(pa), \ 261 .pd_size = DEVMAP_SIZE(sz), \ 262 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, \ 263 .pd_flags = PMAP_DEV \ 264 } 265 #define DEVMAP_ENTRY_END { 0 } 266 267 /* mmap cookie and flags */ 268 #define AARCH64_MMAP_FLAG_SHIFT (64 - PGSHIFT) 269 #define AARCH64_MMAP_FLAG_MASK 0xf 270 #define AARCH64_MMAP_WRITEBACK 0UL 271 #define AARCH64_MMAP_NOCACHE 1UL 272 #define AARCH64_MMAP_WRITECOMBINE 2UL 273 #define AARCH64_MMAP_DEVICE 3UL 274 275 #define ARM_MMAP_MASK __BITS(63, AARCH64_MMAP_FLAG_SHIFT) 276 #define ARM_MMAP_WRITECOMBINE __SHIFTIN(AARCH64_MMAP_WRITECOMBINE, ARM_MMAP_MASK) 277 #define ARM_MMAP_WRITEBACK __SHIFTIN(AARCH64_MMAP_WRITEBACK, ARM_MMAP_MASK) 278 #define ARM_MMAP_NOCACHE __SHIFTIN(AARCH64_MMAP_NOCACHE, ARM_MMAP_MASK) 279 #define ARM_MMAP_DEVICE __SHIFTIN(AARCH64_MMAP_DEVICE, ARM_MMAP_MASK) 280 281 #define PMAP_PTE 0x10000000 /* kenter_pa */ 282 #define PMAP_DEV 0x20000000 /* kenter_pa */ 283 #define PMAP_DEV_SO 0x40000000 /* kenter_pa */ 284 #define PMAP_DEV_MASK (PMAP_DEV | PMAP_DEV_SO) 285 286 static inline u_int 287 aarch64_mmap_flags(paddr_t mdpgno) 288 { 289 u_int nflag, pflag; 290 291 /* 292 * aarch64 arch has 5 memory attributes defined: 293 * 294 * WriteBack - write back cache 295 * WriteThru - write through cache 296 * NoCache - no cache 297 * Device(nGnRE) - no Gathering, no Reordering, Early write ack 298 * Device(nGnRnE) - no Gathering, no Reordering, no Early write ack 299 * 300 * but pmap has PMAP_{NOCACHE,WRITE_COMBINE,WRITE_BACK} flags. 301 */ 302 303 nflag = (mdpgno >> AARCH64_MMAP_FLAG_SHIFT) & AARCH64_MMAP_FLAG_MASK; 304 switch (nflag) { 305 case AARCH64_MMAP_DEVICE: 306 pflag = PMAP_DEV; 307 break; 308 case AARCH64_MMAP_WRITECOMBINE: 309 pflag = PMAP_WRITE_COMBINE; 310 break; 311 case AARCH64_MMAP_WRITEBACK: 312 pflag = PMAP_WRITE_BACK; 313 break; 314 case AARCH64_MMAP_NOCACHE: 315 default: 316 pflag = PMAP_NOCACHE; 317 break; 318 } 319 return pflag; 320 } 321 322 #define pmap_phys_address(pa) aarch64_ptob((pa)) 323 #define pmap_mmap_flags(ppn) aarch64_mmap_flags((ppn)) 324 325 #define pmap_update(pmap) ((void)0) 326 #define pmap_copy(dp,sp,d,l,s) ((void)0) 327 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) 328 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) 329 330 void pmap_procwr(struct proc *, vaddr_t, int); 331 bool pmap_extract_coherency(pmap_t, vaddr_t, paddr_t *, bool *); 332 void pmap_icache_sync_range(pmap_t, vaddr_t, vaddr_t); 333 334 void pmap_pv_init(void); 335 void pmap_pv_track(paddr_t, psize_t); 336 void pmap_pv_untrack(paddr_t, psize_t); 337 void pmap_pv_protect(paddr_t, vm_prot_t); 338 339 #define PMAP_MAPSIZE1 L2_SIZE 340 341 #endif /* _KERNEL */ 342 343 #elif defined(__arm__) 344 345 #include <arm/pmap.h> 346 347 #endif /* __arm__/__aarch64__ */ 348 349 #endif /* !_AARCH64_PMAP_ */ 350
Indexes created Thu Oct 02 10:09:58 GMT 2025