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pmap.h revision 1.6 
      1 /* $NetBSD: pmap.h,v 1.6 2018/07/27 07:04:04 ryo Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2014 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Matt Thomas of 3am Software Foundry.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _AARCH64_PMAP_H_
     33 #define _AARCH64_PMAP_H_
     34 
     35 #ifdef __aarch64__
     36 
     37 #include <sys/types.h>
     38 #include <sys/pool.h>
     39 #include <sys/queue.h>
     40 #include <uvm/uvm_pglist.h>
     41 
     42 #include <aarch64/pte.h>
     43 
     44 #define PMAP_GROWKERNEL
     45 #define PMAP_STEAL_MEMORY
     46 
     47 #define __HAVE_VM_PAGE_MD
     48 
     49 struct pmap {
     50 	kmutex_t pm_lock;
     51 	struct pool *pm_pvpool;
     52 	pd_entry_t *pm_l0table;			/* L0 table: 512G*512 */
     53 	paddr_t pm_l0table_pa;
     54 
     55 	SLIST_HEAD(, vm_page) pm_vmlist;	/* for L[0123] tables */
     56 
     57 	struct pmap_statistics pm_stats;
     58 	unsigned int pm_refcnt;
     59 	int pm_asid;
     60 	bool pm_activated;
     61 };
     62 
     63 struct pv_entry;
     64 struct vm_page_md {
     65 	kmutex_t mdpg_pvlock;
     66 	SLIST_ENTRY(vm_page) mdpg_vmlist;	/* L[0-3] table vm_page list */
     67 	TAILQ_HEAD(, pv_entry) mdpg_pvhead;
     68 
     69 	/* VM_PROT_READ means referenced, VM_PROT_WRITE means modified */
     70 	uint32_t mdpg_flags;
     71 };
     72 
     73 /* each mdpg_pvlock will be initialized in pmap_init() */
     74 #define VM_MDPAGE_INIT(pg)				\
     75 	do {						\
     76 		TAILQ_INIT(&(pg)->mdpage.mdpg_pvhead);	\
     77 		(pg)->mdpage.mdpg_flags = 0;		\
     78 	} while (/*CONSTCOND*/ 0)
     79 
     80 #define l0pde_pa(pde)		((paddr_t)((pde) & LX_TBL_PA))
     81 #define l0pde_index(v)		(((vaddr_t)(v) & L0_ADDR_BITS) >> L0_SHIFT)
     82 #define l0pde_valid(pde)	(((pde) & LX_VALID) == LX_VALID)
     83 /* l0pte always contains table entries */
     84 
     85 #define l1pde_pa(pde)		((paddr_t)((pde) & LX_TBL_PA))
     86 #define l1pde_index(v)		(((vaddr_t)(v) & L1_ADDR_BITS) >> L1_SHIFT)
     87 #define l1pde_valid(pde)	(((pde) & LX_VALID) == LX_VALID)
     88 #define l1pde_is_block(pde)	(((pde) & LX_TYPE) == LX_TYPE_BLK)
     89 #define l1pde_is_table(pde)	(((pde) & LX_TYPE) == LX_TYPE_TBL)
     90 
     91 #define l2pde_pa(pde)		((paddr_t)((pde) & LX_TBL_PA))
     92 #define l2pde_index(v)		(((vaddr_t)(v) & L2_ADDR_BITS) >> L2_SHIFT)
     93 #define l2pde_valid(pde)	(((pde) & LX_VALID) == LX_VALID)
     94 #define l2pde_is_block(pde)	(((pde) & LX_TYPE) == LX_TYPE_BLK)
     95 #define l2pde_is_table(pde)	(((pde) & LX_TYPE) == LX_TYPE_TBL)
     96 
     97 #define l3pte_pa(pde)		((paddr_t)((pde) & LX_TBL_PA))
     98 #define l3pte_executable(pde)	\
     99     (((pde) & (LX_BLKPAG_UXN|LX_BLKPAG_PXN)) != (LX_BLKPAG_UXN|LX_BLKPAG_PXN))
    100 #define l3pte_readable(pde)	((pde) & LX_BLKPAG_AF)
    101 #define l3pte_writable(pde)	\
    102     (((pde) & (LX_BLKPAG_AF|LX_BLKPAG_AP)) == (LX_BLKPAG_AF|LX_BLKPAG_AP_RW))
    103 #define l3pte_index(v)		(((vaddr_t)(v) & L3_ADDR_BITS) >> L3_SHIFT)
    104 #define l3pte_valid(pde)	(((pde) & LX_VALID) == LX_VALID)
    105 #define l3pte_is_page(pde)	(((pde) & LX_TYPE) == L3_TYPE_PAG)
    106 /* l3pte contains always page entries */
    107 
    108 void pmap_bootstrap(vaddr_t, vaddr_t);
    109 bool pmap_fault_fixup(struct pmap *, vaddr_t, vm_prot_t, bool user);
    110 void pmap_db_pteinfo(vaddr_t, void (*)(const char *, ...));
    111 
    112 /* Hooks for the pool allocator */
    113 paddr_t vtophys(vaddr_t);
    114 #define VTOPHYS_FAILED		((paddr_t)-1L)	/* POOL_PADDR_INVALID */
    115 #define POOL_VTOPHYS(va)	vtophys((vaddr_t) (va))
    116 
    117 
    118 /* devmap */
    119 struct pmap_devmap {
    120 	vaddr_t pd_va;		/* virtual address */
    121 	paddr_t pd_pa;		/* physical address */
    122 	psize_t pd_size;	/* size of region */
    123 	vm_prot_t pd_prot;	/* protection code */
    124 	u_int pd_flags;		/* flags for pmap_kenter_pa() */
    125 };
    126 
    127 void pmap_devmap_register(const struct pmap_devmap *);
    128 void pmap_devmap_bootstrap(const struct pmap_devmap *);
    129 const struct pmap_devmap *pmap_devmap_find_pa(paddr_t, psize_t);
    130 const struct pmap_devmap *pmap_devmap_find_va(vaddr_t, vsize_t);
    131 vaddr_t pmap_devmap_phystov(paddr_t);
    132 paddr_t pmap_devmap_vtophys(paddr_t);
    133 
    134 /* devmap use L2 blocks. (2Mbyte) */
    135 #define DEVMAP_TRUNC_ADDR(x)	((x) & ~L2_OFFSET)
    136 #define DEVMAP_ROUND_SIZE(x)	(((x) + L2_SIZE - 1) & ~(L2_SIZE - 1))
    137 
    138 #define	DEVMAP_ENTRY(va, pa, sz)			\
    139 	{						\
    140 		.pd_va = DEVMAP_TRUNC_ADDR(va),		\
    141 		.pd_pa = DEVMAP_TRUNC_ADDR(pa),		\
    142 		.pd_size = DEVMAP_ROUND_SIZE(sz),	\
    143 		.pd_prot = VM_PROT_READ|VM_PROT_WRITE,	\
    144 		.pd_flags = PMAP_NOCACHE		\
    145 	}
    146 #define	DEVMAP_ENTRY_END	{ 0 }
    147 
    148 /* mmap cookie and flags */
    149 #define AARCH64_MMAP_FLAG_SHIFT		(64 - PGSHIFT)
    150 #define AARCH64_MMAP_FLAG_MASK		0xf
    151 #define AARCH64_MMAP_WRITEBACK		0UL
    152 #define AARCH64_MMAP_NOCACHE		1UL
    153 #define AARCH64_MMAP_WRITECOMBINE	2UL
    154 #define AARCH64_MMAP_DEVICE		3UL
    155 
    156 #define ARM_MMAP_MASK			__BITS(63, AARCH64_MMAP_FLAG_SHIFT)
    157 #define ARM_MMAP_WRITECOMBINE		__SHIFTIN(AARCH64_MMAP_WRITECOMBINE, ARM_MMAP_MASK)
    158 #define ARM_MMAP_WRITEBACK		__SHIFTIN(AARCH64_MMAP_WRITEBACK, ARM_MMAP_MASK)
    159 #define ARM_MMAP_NOCACHE		__SHIFTIN(AARCH64_MMAP_NOCACHE, ARM_MMAP_MASK)
    160 #define ARM_MMAP_DEVICE			__SHIFTIN(AARCH64_MMAP_DEVICE, ARM_MMAP_MASK)
    161 
    162 #define	PMAP_PTE			0x10000000 /* kenter_pa */
    163 #define	PMAP_DEV			0x20000000 /* kenter_pa */
    164 
    165 static inline u_int
    166 aarch64_mmap_flags(paddr_t mdpgno)
    167 {
    168 	u_int nflag, pflag;
    169 
    170 	/*
    171 	 * aarch64 arch has 4 memory attribute:
    172 	 *
    173 	 *  WriteBack      - write back cache
    174 	 *  WriteThru      - wite through cache
    175 	 *  NoCache        - no cache
    176 	 *  Device(nGnRnE) - no Gathering, no Reordering, no Early write ack
    177 	 *
    178 	 * but pmap has PMAP_{NOCACHE,WRITE_COMBINE,WRITE_BACK} flags.
    179 	 */
    180 
    181 	nflag = (mdpgno >> AARCH64_MMAP_FLAG_SHIFT) & AARCH64_MMAP_FLAG_MASK;
    182 	switch (nflag) {
    183 	case AARCH64_MMAP_DEVICE:
    184 		pflag = PMAP_DEV;
    185 		break;
    186 	case AARCH64_MMAP_WRITECOMBINE:
    187 		pflag = PMAP_WRITE_COMBINE;
    188 		break;
    189 	case AARCH64_MMAP_WRITEBACK:
    190 		pflag = PMAP_WRITE_BACK;
    191 		break;
    192 	case AARCH64_MMAP_NOCACHE:
    193 	default:
    194 		pflag = PMAP_NOCACHE;
    195 		break;
    196 	}
    197 	return pflag;
    198 }
    199 
    200 
    201 #define pmap_phys_address(pa)		aarch64_ptob((pa))
    202 #define pmap_mmap_flags(ppn)		aarch64_mmap_flags((ppn))
    203 
    204 #define pmap_update(pmap)		((void)0)
    205 #define pmap_copy(dp,sp,d,l,s)		((void)0)
    206 #define pmap_wired_count(pmap)		((pmap)->pm_stats.wired_count)
    207 #define pmap_resident_count(pmap)	((pmap)->pm_stats.resident_count)
    208 
    209 bool	pmap_extract_coherency(pmap_t, vaddr_t, paddr_t *, bool *);
    210 
    211 #define	PMAP_MAPSIZE1	L2_SIZE
    212 
    213 #elif defined(__arm__)
    214 
    215 #include <arm/pmap.h>
    216 
    217 #endif /* __arm__/__aarch64__ */
    218 
    219 #endif /* !_AARCH64_PMAP_ */
    220