pte.h revision 1.11 1 1.11 maxv /* $NetBSD: pte.h,v 1.11 2020/01/31 09:23:58 maxv Exp $ */
2 1.1 matt
3 1.1 matt /*-
4 1.1 matt * Copyright (c) 2014 The NetBSD Foundation, Inc.
5 1.1 matt * All rights reserved.
6 1.1 matt *
7 1.1 matt * This code is derived from software contributed to The NetBSD Foundation
8 1.1 matt * by Matt Thomas of 3am Software Foundry.
9 1.1 matt *
10 1.1 matt * Redistribution and use in source and binary forms, with or without
11 1.1 matt * modification, are permitted provided that the following conditions
12 1.1 matt * are met:
13 1.1 matt * 1. Redistributions of source code must retain the above copyright
14 1.1 matt * notice, this list of conditions and the following disclaimer.
15 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 matt * notice, this list of conditions and the following disclaimer in the
17 1.1 matt * documentation and/or other materials provided with the distribution.
18 1.1 matt *
19 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
30 1.1 matt */
31 1.1 matt
32 1.1 matt #ifndef _AARCH64_PTE_H_
33 1.1 matt #define _AARCH64_PTE_H_
34 1.1 matt
35 1.1 matt #ifdef __aarch64__
36 1.1 matt
37 1.3 ryo #ifndef _LOCORE
38 1.3 ryo typedef uint64_t pd_entry_t; /* L0(512G) / L1(1G) / L2(2M) table entry */
39 1.10 skrll
40 1.10 skrll #ifndef __BSD_PTENTRY_T__
41 1.10 skrll #define __BSD_PTENTRY_T__
42 1.3 ryo typedef uint64_t pt_entry_t; /* L3(4k) table entry */
43 1.10 skrll #define PRIxPTE PRIx64
44 1.10 skrll #endif /* __BSD_PTENTRY_T__ */
45 1.10 skrll
46 1.3 ryo #endif /* _LOCORE */
47 1.1 matt
48 1.3 ryo /*
49 1.3 ryo * translation table, block, and page descriptors
50 1.3 ryo */
51 1.3 ryo #define LX_TBL_NSTABLE __BIT(63) /* inherited next level */
52 1.3 ryo #define LX_TBL_APTABLE __BITS(62,61) /* inherited next level */
53 1.7 skrll #define LX_TBL_APTABLE_NOEFFECT __SHIFTIN(0,LX_TBL_APTABLE)
54 1.7 skrll #define LX_TBL_APTABLE_EL0_NOACCESS __SHIFTIN(1,LX_TBL_APTABLE)
55 1.7 skrll #define LX_TBL_APTABLE_RO __SHIFTIN(2,LX_TBL_APTABLE)
56 1.7 skrll #define LX_TBL_APTABLE_RO_EL0_NOREAD __SHIFTIN(3,LX_TBL_APTABLE)
57 1.3 ryo #define LX_TBL_UXNTABLE __BIT(60) /* inherited next level */
58 1.3 ryo #define LX_TBL_PXNTABLE __BIT(59) /* inherited next level */
59 1.3 ryo #define LX_BLKPAG_OS __BITS(58, 55)
60 1.7 skrll #define LX_BLKPAG_OS_0 __SHIFTIN(1,LX_BLKPAG_OS)
61 1.7 skrll #define LX_BLKPAG_OS_1 __SHIFTIN(2,LX_BLKPAG_OS)
62 1.7 skrll #define LX_BLKPAG_OS_2 __SHIFTIN(4,LX_BLKPAG_OS)
63 1.7 skrll #define LX_BLKPAG_OS_3 __SHIFTIN(8,LX_BLKPAG_OS)
64 1.3 ryo #define LX_BLKPAG_UXN __BIT(54) /* Unprivileged Execute Never */
65 1.3 ryo #define LX_BLKPAG_PXN __BIT(53) /* Privileged Execute Never */
66 1.3 ryo #define LX_BLKPAG_CONTIG __BIT(52) /* Hint of TLB cache */
67 1.6 skrll #define LX_BLKPAG_DBM __BIT(51) /* Dirty Bit Modifier (V8.1) */
68 1.11 maxv #define LX_BLKPAG_GP __BIT(50) /* Guarded Page (V8.5) */
69 1.3 ryo #define LX_TBL_PA __BITS(47, 12)
70 1.3 ryo #define LX_BLKPAG_OA __BITS(47, 12)
71 1.3 ryo #define LX_BLKPAG_NG __BIT(11) /* Not Global */
72 1.3 ryo #define LX_BLKPAG_AF __BIT(10) /* Access Flag */
73 1.3 ryo #define LX_BLKPAG_SH __BITS(9,8) /* Shareability */
74 1.7 skrll #define LX_BLKPAG_SH_NS __SHIFTIN(0,LX_BLKPAG_SH) /* Non Shareable */
75 1.7 skrll #define LX_BLKPAG_SH_OS __SHIFTIN(2,LX_BLKPAG_SH) /* Outer Shareable */
76 1.7 skrll #define LX_BLKPAG_SH_IS __SHIFTIN(3,LX_BLKPAG_SH) /* Inner Shareable */
77 1.3 ryo #define LX_BLKPAG_AP __BIT(7)
78 1.7 skrll #define LX_BLKPAG_AP_RW __SHIFTIN(0,LX_BLKPAG_AP) /* RW */
79 1.7 skrll #define LX_BLKPAG_AP_RO __SHIFTIN(1,LX_BLKPAG_AP) /* RO */
80 1.3 ryo #define LX_BLKPAG_APUSER __BIT(6)
81 1.3 ryo #define LX_BLKPAG_NS __BIT(5)
82 1.3 ryo #define LX_BLKPAG_ATTR_INDX __BITS(4,2) /* refer MAIR_EL1 attr<n> */
83 1.4 ryo #define LX_BLKPAG_ATTR_INDX_0 __SHIFTIN(0,LX_BLKPAG_ATTR_INDX)
84 1.4 ryo #define LX_BLKPAG_ATTR_INDX_1 __SHIFTIN(1,LX_BLKPAG_ATTR_INDX)
85 1.4 ryo #define LX_BLKPAG_ATTR_INDX_2 __SHIFTIN(2,LX_BLKPAG_ATTR_INDX)
86 1.4 ryo #define LX_BLKPAG_ATTR_INDX_3 __SHIFTIN(3,LX_BLKPAG_ATTR_INDX)
87 1.3 ryo #define LX_TYPE __BIT(1)
88 1.7 skrll #define LX_TYPE_BLK __SHIFTIN(0, LX_TYPE)
89 1.7 skrll #define LX_TYPE_TBL __SHIFTIN(1, LX_TYPE)
90 1.7 skrll #define L3_TYPE_PAG __SHIFTIN(1, LX_TYPE)
91 1.1 matt #define LX_VALID __BIT(0)
92 1.1 matt
93 1.3 ryo #define L1_BLK_OA __BITS(47, 30) /* 1GB */
94 1.3 ryo #define L2_BLK_OA __BITS(47, 21) /* 2MB */
95 1.3 ryo #define L3_PAG_OA __BITS(47, 12) /* 4KB */
96 1.3 ryo
97 1.3 ryo
98 1.3 ryo /* L0 table, 512GB/entry * 512 */
99 1.3 ryo #define L0_SHIFT 39
100 1.3 ryo #define L0_ADDR_BITS __BITS(47,39)
101 1.3 ryo #define L0_SIZE (1UL << L0_SHIFT)
102 1.3 ryo #define L0_OFFSET (L0_SIZE - 1UL)
103 1.3 ryo #define L0_FRAME (~L0_OFFSET)
104 1.3 ryo /* L0_BLOCK Level 0 doesn't support block translation */
105 1.3 ryo #define L0_TABLE (LX_TYPE_TBL | LX_VALID)
106 1.3 ryo
107 1.3 ryo /* L1 table, 1GB/entry * 512 */
108 1.3 ryo #define L1_SHIFT 30
109 1.3 ryo #define L1_ADDR_BITS __BITS(38,30)
110 1.3 ryo #define L1_SIZE (1UL << L1_SHIFT)
111 1.3 ryo #define L1_OFFSET (L1_SIZE - 1UL)
112 1.3 ryo #define L1_FRAME (~L1_OFFSET)
113 1.3 ryo #define L1_BLOCK (LX_BLKPAG_NG | LX_TYPE_BLK | LX_VALID)
114 1.3 ryo #define L1_TABLE (LX_TYPE_TBL | LX_VALID)
115 1.3 ryo
116 1.3 ryo /* L2 table, 2MB/entry * 512 */
117 1.3 ryo #define L2_SHIFT 21
118 1.3 ryo #define L2_ADDR_BITS __BITS(29,21)
119 1.3 ryo #define L2_SIZE (1UL << L2_SHIFT)
120 1.3 ryo #define L2_OFFSET (L2_SIZE - 1UL)
121 1.3 ryo #define L2_FRAME (~L2_OFFSET)
122 1.3 ryo #define L2_BLOCK (LX_BLKPAG_NG | LX_TYPE_BLK | LX_VALID)
123 1.3 ryo #define L2_TABLE (LX_TYPE_TBL | LX_VALID)
124 1.3 ryo #define L2_BLOCK_MASK __BITS(47,21)
125 1.3 ryo
126 1.3 ryo /* L3 table, 4KB/entry * 512 */
127 1.3 ryo #define L3_SHIFT 12
128 1.3 ryo #define L3_ADDR_BITS __BITS(20,12)
129 1.3 ryo #define L3_SIZE (1UL << L3_SHIFT)
130 1.3 ryo #define L3_OFFSET (L3_SIZE - 1UL)
131 1.3 ryo #define L3_FRAME (~L3_OFFSET)
132 1.3 ryo #define L3_PAGE (LX_BLKPAG_NG | L3_TYPE_PAG | LX_VALID)
133 1.3 ryo
134 1.3 ryo #define Ln_ENTRIES_SHIFT 9
135 1.3 ryo #define Ln_ENTRIES (1 << Ln_ENTRIES_SHIFT)
136 1.3 ryo #define Ln_TABLE_SIZE (8 << Ln_ENTRIES_SHIFT)
137 1.3 ryo
138 1.5 ryo #define TTBR_SEL_VA __BIT(63) /* which TTBR is selected */
139 1.5 ryo
140 1.1 matt #elif defined(__arm__)
141 1.1 matt
142 1.1 matt #include <arm/pte.h>
143 1.1 matt
144 1.1 matt #endif /* __aarch64__/__arm__ */
145 1.1 matt
146 1.1 matt #endif /* _AARCH64_PTE_H_ */
147