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icside.c revision 1.29
      1 /*	$NetBSD: icside.c,v 1.29 2011/07/19 15:59:54 dyoung Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1997-1998 Mark Brinicombe
      5  * Copyright (c) 1997-1998 Causality Limited
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *	This product includes software developed by Mark Brinicombe
     18  *	for the NetBSD Project.
     19  * 4. The name of the author may not be used to endorse or promote products
     20  *    derived from this software without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32  *
     33  * Probe and attach functions to use generic IDE driver for the ICS IDE podule
     34  */
     35 
     36 /*
     37  * Thanks to David Baildon for loaning an IDE card for the development
     38  * of this driver.
     39  * Thanks to Ian Copestake and David Baildon for providing register mapping
     40  * information
     41  */
     42 
     43 #include <sys/param.h>
     44 
     45 __KERNEL_RCSID(0, "$NetBSD: icside.c,v 1.29 2011/07/19 15:59:54 dyoung Exp $");
     46 
     47 #include <sys/systm.h>
     48 #include <sys/conf.h>
     49 #include <sys/device.h>
     50 #include <sys/malloc.h>
     51 #include <sys/bus.h>
     52 
     53 #include <machine/intr.h>
     54 #include <machine/io.h>
     55 #include <acorn32/podulebus/podulebus.h>
     56 #include <acorn32/podulebus/icsidereg.h>
     57 
     58 #include <dev/ata/atavar.h>
     59 #include <dev/ic/wdcreg.h>
     60 #include <dev/ic/wdcvar.h>
     61 #include <dev/podulebus/podules.h>
     62 
     63 /*
     64  * ICS IDE podule device.
     65  *
     66  * This probes and attaches the top level ICS IDE device to the podulebus.
     67  * It then configures any children of the ICS IDE device.
     68  * The child is expected to be a wdc device using icside attachments.
     69  */
     70 
     71 /*
     72  * ICS IDE card softc structure.
     73  *
     74  * Contains the device node and podule information.
     75  */
     76 
     77 struct icside_softc {
     78 	struct wdc_softc	sc_wdcdev;	/* common wdc definitions */
     79 	podule_t 		*sc_podule;		/* Our podule */
     80 	int 			sc_podule_number;	/* Our podule number */
     81 	struct bus_space 	sc_tag;			/* custom tag */
     82 	struct podule_attach_args *sc_pa;		/* podule info */
     83 	bus_space_tag_t		sc_latchiot;	/* EEPROM page latch etc */
     84 	bus_space_handle_t	sc_latchioh;
     85 	void			*sc_shutdownhook;
     86 	struct ata_channel *sc_chp[ICSIDE_MAX_CHANNELS];
     87 	struct icside_channel {
     88 		struct ata_channel	ic_channel;	/* generic part */
     89 		struct ata_queue	ic_chqueue;	/* channel queue */
     90 		void			*ic_ih;		/* interrupt handler */
     91 		struct evcnt		ic_intrcnt;	/* interrupt count */
     92 		u_int			ic_irqaddr;	/* interrupt flag */
     93 		u_int			ic_irqmask;	/*  location */
     94 		bus_space_tag_t		ic_irqiot;	/* Bus space tag */
     95 		bus_space_handle_t	ic_irqioh;	/* handle for IRQ */
     96 	} sc_chan[ICSIDE_MAX_CHANNELS];
     97 	struct wdc_regs sc_wdc_regs[ICSIDE_MAX_CHANNELS];
     98 };
     99 
    100 int	icside_probe(device_t, cfdata_t, void *);
    101 void	icside_attach(device_t, device_t, void *);
    102 int	icside_intr(void *);
    103 void	icside_v6_shutdown(void *);
    104 
    105 CFATTACH_DECL_NEW(icside, sizeof(struct icside_softc),
    106     icside_probe, icside_attach, NULL, NULL);
    107 
    108 /*
    109  * Define prototypes for custom bus space functions.
    110  */
    111 
    112 bs_rm_2_proto(icside);
    113 bs_wm_2_proto(icside);
    114 
    115 #define MAX_CHANNELS	2
    116 
    117 /*
    118  * Define a structure for describing the different card versions
    119  */
    120 struct ide_version {
    121 	int		id;		/* IDE card ID */
    122 	int		modspace;	/* Type of podule space */
    123 	int		channels;	/* Number of channels */
    124 	const char	*name;		/* name */
    125 	int		latchreg;	/* EEPROM latch register */
    126 	int		ideregs[MAX_CHANNELS];	/* IDE registers */
    127 	int		auxregs[MAX_CHANNELS];	/* AUXSTAT register */
    128 	int		irqregs[MAX_CHANNELS];	/* IRQ register */
    129 	int		irqstatregs[MAX_CHANNELS];
    130 } const ide_versions[] = {
    131 	/* A3IN - Unsupported */
    132 /*	{ 0,  0, 0, NULL, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 } },*/
    133 	/* A3USER - Unsupported */
    134 /*	{ 1,  0, 0, NULL, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 } },*/
    135 	/* ARCIN V6 - Supported */
    136 	{ 3,  0, 2, "ARCIN V6", V6_ADDRLATCH,
    137 	  { V6_P_IDE_BASE, V6_S_IDE_BASE },
    138 	  { V6_P_AUX_BASE, V6_S_AUX_BASE },
    139 	  { V6_P_IRQ_BASE, V6_S_IRQ_BASE },
    140 	  { V6_P_IRQSTAT_BASE, V6_S_IRQSTAT_BASE }
    141 	},
    142 	/* ARCIN V5 - Supported (ID reg not supported so reads as 15) */
    143 	{ 15,  1, 1, "ARCIN V5", -1,
    144 	  { V5_IDE_BASE, -1 },
    145 	  { V5_AUX_BASE, -1 },
    146 	  { V5_IRQ_BASE, -1 },
    147 	  { V5_IRQSTAT_BASE, -1 }
    148 	}
    149 };
    150 
    151 /*
    152  * Card probe function
    153  *
    154  * Just match the manufacturer and podule ID's
    155  */
    156 
    157 int
    158 icside_probe(device_t parent, cfdata_t cf, void *aux)
    159 {
    160 	struct podule_attach_args *pa = (void *)aux;
    161 
    162 	return (pa->pa_product == PODULE_ICS_IDE);
    163 }
    164 
    165 /*
    166  * Card attach function
    167  *
    168  * Identify the card version and configure any children.
    169  */
    170 
    171 void
    172 icside_attach(device_t parent, device_t self, void *aux)
    173 {
    174 	struct icside_softc *sc = device_private(self);
    175 	struct podule_attach_args *pa = (void *)aux;
    176 	bus_space_tag_t iot;
    177 	bus_space_handle_t ioh;
    178 	const struct ide_version *ide = NULL;
    179 	u_int iobase;
    180 	int channel, i;
    181 	struct icside_channel *icp;
    182 	struct ata_channel *cp;
    183 	struct wdc_regs *wdr;
    184 	int loop;
    185 	int id;
    186 
    187 	/* Note the podule number and validate */
    188 
    189 	if (pa->pa_podule_number == -1)
    190 		panic("Podule has disappeared !");
    191 
    192 	sc->sc_wdcdev.sc_atac.atac_dev = self;
    193 	sc->sc_podule_number = pa->pa_podule_number;
    194 	sc->sc_podule = pa->pa_podule;
    195 	podules[sc->sc_podule_number].attached = 1;
    196 
    197 	sc->sc_wdcdev.regs = sc->sc_wdc_regs;
    198 
    199 	/* The ID register if present is always in FAST podule space */
    200 	iot = pa->pa_iot;
    201 	if (bus_space_map(iot, pa->pa_podule->fast_base +
    202 	    ID_REGISTER_OFFSET, ID_REGISTER_SPACE, 0, &ioh)) {
    203 		aprint_error_dev(self, "cannot map ID register\n");
    204 		return;
    205 	}
    206 
    207 	for (id = 0, loop = 0; loop < 4; ++loop)
    208 		id |= (bus_space_read_1(iot, ioh, loop) & 1) << loop;
    209 
    210 	/* Do we recognise the ID ? */
    211 	for (loop = 0; loop < sizeof(ide_versions) / sizeof(struct ide_version);
    212 	    ++loop) {
    213 		if (ide_versions[loop].id == id) {
    214 			ide = &ide_versions[loop];
    215 			break;
    216 		}
    217 	}
    218 
    219 	/* Report the version and name */
    220 	if (ide == NULL || ide->name == NULL) {
    221 		aprint_error(": rev %d is unsupported\n", id);
    222 		return;
    223 	} else
    224 		aprint_normal(": %s\n", ide->name);
    225 
    226 	if (ide->latchreg != -1) {
    227 		sc->sc_latchiot = pa->pa_iot;
    228 		if (bus_space_map(iot, pa->pa_podule->fast_base +
    229 			ide->latchreg, 1, 0, &sc->sc_latchioh)) {
    230 			aprint_error_dev(self,
    231 			    "cannot map latch register\n");
    232 			return;
    233 		}
    234 		sc->sc_shutdownhook =
    235 		    shutdownhook_establish(icside_v6_shutdown, sc);
    236 	}
    237 
    238 	/*
    239 	 * Ok we need our own bus tag as the register spacing
    240 	 * is not the default.
    241 	 *
    242 	 * For the podulebus the bus tag cookie is the shift
    243 	 * to apply to registers
    244 	 * So duplicate the bus space tag and change the
    245 	 * cookie.
    246 	 *
    247 	 * Also while we are at it replace the default
    248 	 * read/write mulitple short functions with
    249 	 * optimised versions
    250 	 */
    251 
    252 	sc->sc_tag = *pa->pa_iot;
    253 	sc->sc_tag.bs_cookie = (void *) REGISTER_SPACING_SHIFT;
    254 	sc->sc_tag.bs_rm_2 = icside_bs_rm_2;
    255 	sc->sc_tag.bs_wm_2 = icside_bs_wm_2;
    256 
    257 	/* Initialize wdc struct */
    258 	sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chp;
    259 	sc->sc_wdcdev.sc_atac.atac_nchannels = ide->channels;
    260 	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
    261 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
    262 	sc->sc_pa = pa;
    263 
    264 	for (channel = 0; channel < ide->channels; ++channel) {
    265 		icp = &sc->sc_chan[channel];
    266 		sc->sc_wdcdev.sc_atac.atac_channels[channel] = &icp->ic_channel;
    267 		cp = &icp->ic_channel;
    268 		wdr = &sc->sc_wdc_regs[channel];
    269 
    270 		cp->ch_channel = channel;
    271 		cp->ch_atac = &sc->sc_wdcdev.sc_atac;
    272 		cp->ch_queue = &icp->ic_chqueue;
    273 		cp->ch_ndrive = 2;
    274 		wdr->cmd_iot = &sc->sc_tag;
    275 		wdr->ctl_iot = &sc->sc_tag;
    276 		if (ide->modspace)
    277 			iobase = pa->pa_podule->mod_base;
    278 		else
    279 			iobase = pa->pa_podule->fast_base;
    280 
    281 		if (bus_space_map(iot, iobase + ide->ideregs[channel],
    282 		    IDE_REGISTER_SPACE, 0, &wdr->cmd_baseioh))
    283 			return;
    284 		for (i = 0; i < WDC_NREG; i++) {
    285 			if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
    286 				i, i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0)
    287 				return;
    288 		}
    289 		wdc_init_shadow_regs(cp);
    290 		if (bus_space_map(iot, iobase + ide->auxregs[channel],
    291 		    AUX_REGISTER_SPACE, 0, &wdr->ctl_ioh))
    292 			return;
    293 		icp->ic_irqiot = iot;
    294 		if (bus_space_map(iot, iobase + ide->irqregs[channel],
    295 		    IRQ_REGISTER_SPACE, 0, &icp->ic_irqioh))
    296 			return;
    297 		/* Disable interrupts */
    298 		(void)bus_space_read_1(iot, icp->ic_irqioh, 0);
    299 		pa->pa_podule->irq_addr = iobase + ide->irqstatregs[channel];
    300 		pa->pa_podule->irq_mask = IRQ_STATUS_REGISTER_MASK;
    301 		icp->ic_irqaddr = pa->pa_podule->irq_addr;
    302 		icp->ic_irqmask = pa->pa_podule->irq_mask;
    303 		evcnt_attach_dynamic(&icp->ic_intrcnt, EVCNT_TYPE_INTR, NULL,
    304 		    device_xname(self), "intr");
    305 		icp->ic_ih = podulebus_irq_establish(pa->pa_ih, IPL_BIO,
    306 		    icside_intr, icp, &icp->ic_intrcnt);
    307 		if (icp->ic_ih == NULL) {
    308 			aprint_error_dev(self, "Cannot claim interrupt %d\n",
    309 			    pa->pa_podule->interrupt);
    310 			continue;
    311 		}
    312 		/* Enable interrupts */
    313 		bus_space_write_1(iot, icp->ic_irqioh, 0, 0);
    314 		/* Call common attach routines */
    315 		wdcattach(cp);
    316 
    317 	}
    318 }
    319 
    320 /*
    321  * Shutdown handler -- try to restore the card to a state where
    322  * RISC OS will see it.
    323  */
    324 void
    325 icside_v6_shutdown(void *arg)
    326 {
    327 	struct icside_softc *sc = arg;
    328 
    329 	bus_space_write_1(sc->sc_latchiot, sc->sc_latchioh, 0, 0);
    330 }
    331 
    332 /*
    333  * Podule interrupt handler
    334  *
    335  * If the interrupt was from our card pass it on to the wdc interrupt handler
    336  */
    337 int
    338 icside_intr(void *arg)
    339 {
    340 	struct icside_channel *icp = arg;
    341 	volatile u_char *intraddr = (volatile u_char *)icp->ic_irqaddr;
    342 
    343 	/* XXX - not bus space yet - should really be handled by podulebus */
    344 	if ((*intraddr) & icp->ic_irqmask)
    345 		wdcintr(&icp->ic_channel);
    346 	return(0);
    347 }
    348