1 1.31 thorpej /* $NetBSD: pci_1000.c,v 1.31 2021/07/04 22:42:36 thorpej Exp $ */ 2 1.1 ross 3 1.1 ross /* 4 1.1 ross * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 1.1 ross * All rights reserved. 6 1.1 ross * 7 1.1 ross * This code is based on pci_kn20aa.c, written by Chris G. Demetriou at 8 1.1 ross * Carnegie-Mellon University. Platform support for Mikasa and Mikasa/Pinnacle 9 1.1 ross * (Pinkasa) by Ross Harvey with copyright assignment by permission of Avalon 10 1.1 ross * Computer Systems, Inc. 11 1.1 ross * 12 1.1 ross * Redistribution and use in source and binary forms, with or without 13 1.1 ross * modification, are permitted provided that the following conditions 14 1.1 ross * are met: 15 1.1 ross * 1. Redistributions of source code must retain the above copyright 16 1.1 ross * notice, this list of conditions and the following disclaimer. 17 1.1 ross * 2. Redistributions in binary form must reproduce the above copyright 18 1.1 ross * notice, this list of conditions and the following disclaimer in the 19 1.1 ross * documentation and/or other materials provided with the distribution. 20 1.1 ross * 21 1.1 ross * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 1.1 ross * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 1.1 ross * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 1.1 ross * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 1.1 ross * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 1.1 ross * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 1.1 ross * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 1.1 ross * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 1.1 ross * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 1.1 ross * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 1.1 ross * POSSIBILITY OF SUCH DAMAGE. 32 1.1 ross */ 33 1.1 ross 34 1.1 ross /* 35 1.1 ross * Copyright (c) 1995, 1996 Carnegie-Mellon University. 36 1.1 ross * All rights reserved. 37 1.1 ross * 38 1.1 ross * Author: Chris G. Demetriou 39 1.24 matt * 40 1.1 ross * Permission to use, copy, modify and distribute this software and 41 1.1 ross * its documentation is hereby granted, provided that both the copyright 42 1.1 ross * notice and this permission notice appear in all copies of the 43 1.1 ross * software, derivative works or modified versions, and any portions 44 1.1 ross * thereof, and that both notices appear in supporting documentation. 45 1.24 matt * 46 1.24 matt * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 47 1.24 matt * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 48 1.1 ross * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 49 1.24 matt * 50 1.1 ross * Carnegie Mellon requests users of this software to return to 51 1.1 ross * 52 1.1 ross * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 53 1.1 ross * School of Computer Science 54 1.1 ross * Carnegie Mellon University 55 1.1 ross * Pittsburgh PA 15213-3890 56 1.1 ross * 57 1.1 ross * any improvements or extensions that they make and grant Carnegie the 58 1.1 ross * rights to redistribute these changes. 59 1.1 ross */ 60 1.1 ross 61 1.1 ross #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 62 1.1 ross 63 1.31 thorpej __KERNEL_RCSID(0, "$NetBSD: pci_1000.c,v 1.31 2021/07/04 22:42:36 thorpej Exp $"); 64 1.1 ross 65 1.1 ross #include <sys/types.h> 66 1.1 ross #include <sys/param.h> 67 1.1 ross #include <sys/time.h> 68 1.1 ross #include <sys/systm.h> 69 1.1 ross #include <sys/errno.h> 70 1.1 ross #include <sys/device.h> 71 1.1 ross #include <sys/syslog.h> 72 1.1 ross 73 1.1 ross #include <machine/autoconf.h> 74 1.28 thorpej #include <machine/rpb.h> 75 1.1 ross 76 1.1 ross #include <dev/pci/pcireg.h> 77 1.1 ross #include <dev/pci/pcivar.h> 78 1.1 ross 79 1.1 ross #include "sio.h" 80 1.7 thorpej #if NSIO > 0 || NPCEB > 0 81 1.1 ross #include <alpha/pci/siovar.h> 82 1.1 ross #endif 83 1.1 ross 84 1.1 ross static bus_space_tag_t another_mystery_icu_iot; 85 1.1 ross static bus_space_handle_t another_mystery_icu_ioh; 86 1.1 ross 87 1.27 thorpej static int dec_1000_intr_map(const struct pci_attach_args *, 88 1.27 thorpej pci_intr_handle_t *); 89 1.1 ross 90 1.9 thorpej #define PCI_NIRQ 16 91 1.9 thorpej #define PCI_STRAY_MAX 5 92 1.1 ross 93 1.27 thorpej static void dec_1000_enable_intr(pci_chipset_tag_t, int irq); 94 1.27 thorpej static void dec_1000_disable_intr(pci_chipset_tag_t, int irq); 95 1.27 thorpej static void pci_1000_imi(void); 96 1.1 ross 97 1.28 thorpej static void 98 1.28 thorpej pci_1000_pickintr(void *core, bus_space_tag_t iot, bus_space_tag_t memt, 99 1.28 thorpej pci_chipset_tag_t pc) 100 1.1 ross { 101 1.1 ross 102 1.1 ross another_mystery_icu_iot = iot; 103 1.1 ross 104 1.1 ross if (bus_space_map(iot, 0x536, 2, 0, &another_mystery_icu_ioh)) 105 1.1 ross panic("pci_1000_pickintr"); 106 1.27 thorpej 107 1.24 matt pc->pc_intr_v = core; 108 1.24 matt pc->pc_intr_map = dec_1000_intr_map; 109 1.27 thorpej pc->pc_intr_string = alpha_pci_generic_intr_string; 110 1.27 thorpej pc->pc_intr_evcnt = alpha_pci_generic_intr_evcnt; 111 1.27 thorpej pc->pc_intr_establish = alpha_pci_generic_intr_establish; 112 1.27 thorpej pc->pc_intr_disestablish = alpha_pci_generic_intr_disestablish; 113 1.1 ross 114 1.1 ross pc->pc_pciide_compat_intr_establish = NULL; 115 1.1 ross 116 1.29 thorpej pc->pc_intr_desc = "dec 1000"; 117 1.27 thorpej pc->pc_vecbase = 0x900; 118 1.27 thorpej pc->pc_nirq = PCI_NIRQ; 119 1.27 thorpej 120 1.27 thorpej pc->pc_intr_enable = dec_1000_enable_intr; 121 1.27 thorpej pc->pc_intr_disable = dec_1000_disable_intr; 122 1.27 thorpej 123 1.30 thorpej pci_1000_imi(); 124 1.30 thorpej 125 1.30 thorpej alpha_pci_intr_alloc(pc, PCI_STRAY_MAX); 126 1.1 ross 127 1.7 thorpej #if NSIO > 0 || NPCEB > 0 128 1.1 ross sio_intr_setup(pc, iot); 129 1.1 ross #endif 130 1.1 ross } 131 1.28 thorpej ALPHA_PCI_INTR_INIT(ST_DEC_1000, pci_1000_pickintr) 132 1.1 ross 133 1.27 thorpej static int 134 1.23 dyoung dec_1000_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 135 1.1 ross { 136 1.11 sommerfe pcitag_t bustag = pa->pa_intrtag; 137 1.11 sommerfe int buspin = pa->pa_intrpin; 138 1.11 sommerfe pci_chipset_tag_t pc = pa->pa_pc; 139 1.25 skrll int device = 0; /* XXX gcc */ 140 1.1 ross 141 1.1 ross if (buspin == 0) /* No IRQ used. */ 142 1.1 ross return 1; 143 1.1 ross if (!(1 <= buspin && buspin <= 4)) 144 1.1 ross goto bad; 145 1.1 ross 146 1.13 thorpej pci_decompose_tag(pc, bustag, NULL, &device, NULL); 147 1.1 ross 148 1.1 ross switch(device) { 149 1.1 ross case 6: 150 1.1 ross if(buspin != 1) 151 1.1 ross break; 152 1.27 thorpej /* integrated ncr scsi */ 153 1.27 thorpej alpha_pci_intr_handle_init(ihp, 0xc, 0); 154 1.1 ross return 0; 155 1.1 ross case 11: 156 1.1 ross case 12: 157 1.1 ross case 13: 158 1.27 thorpej alpha_pci_intr_handle_init(ihp, 159 1.27 thorpej (device - 11) * 4 + buspin - 1, 0); 160 1.1 ross return 0; 161 1.1 ross } 162 1.1 ross 163 1.1 ross bad: printf("dec_1000_intr_map: can't map dev %d pin %d\n", device, buspin); 164 1.1 ross return 1; 165 1.1 ross } 166 1.1 ross 167 1.1 ross /* 168 1.1 ross * Read and write the mystery ICU IMR registers 169 1.1 ross */ 170 1.1 ross 171 1.1 ross #define IR() bus_space_read_2(another_mystery_icu_iot, \ 172 1.1 ross another_mystery_icu_ioh, 0) 173 1.1 ross 174 1.1 ross #define IW(v) bus_space_write_2(another_mystery_icu_iot, \ 175 1.1 ross another_mystery_icu_ioh, 0, (v)) 176 1.1 ross 177 1.1 ross /* 178 1.1 ross * Enable and disable interrupts at the ICU level 179 1.1 ross */ 180 1.1 ross 181 1.1 ross static void 182 1.27 thorpej dec_1000_enable_intr(pci_chipset_tag_t pc __unused, int irq) 183 1.1 ross { 184 1.1 ross IW(IR() | 1 << irq); 185 1.1 ross } 186 1.1 ross 187 1.1 ross static void 188 1.27 thorpej dec_1000_disable_intr(pci_chipset_tag_t pc __unused, int irq) 189 1.1 ross { 190 1.1 ross IW(IR() & ~(1 << irq)); 191 1.1 ross } 192 1.27 thorpej 193 1.1 ross /* 194 1.1 ross * Initialize mystery ICU 195 1.1 ross */ 196 1.1 ross static void 197 1.24 matt pci_1000_imi(void) 198 1.1 ross { 199 1.1 ross IW(0); /* XXX ?? */ 200 1.1 ross } 201