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pci_1000.c revision 1.12.2.3
      1  1.12.2.3  nathanw /* $NetBSD: pci_1000.c,v 1.12.2.3 2002/10/18 02:34:21 nathanw Exp $ */
      2  1.12.2.2  nathanw 
      3  1.12.2.2  nathanw /*
      4  1.12.2.2  nathanw  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  1.12.2.2  nathanw  * All rights reserved.
      6  1.12.2.2  nathanw  *
      7  1.12.2.2  nathanw  * This code is based on pci_kn20aa.c, written by Chris G. Demetriou at
      8  1.12.2.2  nathanw  * Carnegie-Mellon University. Platform support for Mikasa and Mikasa/Pinnacle
      9  1.12.2.2  nathanw  * (Pinkasa) by Ross Harvey with copyright assignment by permission of Avalon
     10  1.12.2.2  nathanw  * Computer Systems, Inc.
     11  1.12.2.2  nathanw  *
     12  1.12.2.2  nathanw  * Redistribution and use in source and binary forms, with or without
     13  1.12.2.2  nathanw  * modification, are permitted provided that the following conditions
     14  1.12.2.2  nathanw  * are met:
     15  1.12.2.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     16  1.12.2.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     17  1.12.2.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     18  1.12.2.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     19  1.12.2.2  nathanw  *    documentation and/or other materials provided with the distribution.
     20  1.12.2.2  nathanw  * 3. All advertising materials mentioning features or use of this software
     21  1.12.2.2  nathanw  *    must display the following acknowledgement:
     22  1.12.2.2  nathanw  *	This product includes software developed by the NetBSD
     23  1.12.2.2  nathanw  *	Foundation, Inc. and its contributors.
     24  1.12.2.2  nathanw  * 4. Neither the name of The NetBSD Foundation nor the names of its
     25  1.12.2.2  nathanw  *    contributors may be used to endorse or promote products derived
     26  1.12.2.2  nathanw  *    from this software without specific prior written permission.
     27  1.12.2.2  nathanw  *
     28  1.12.2.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     29  1.12.2.2  nathanw  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     30  1.12.2.2  nathanw  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     31  1.12.2.2  nathanw  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     32  1.12.2.2  nathanw  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     33  1.12.2.2  nathanw  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     34  1.12.2.2  nathanw  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     35  1.12.2.2  nathanw  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     36  1.12.2.2  nathanw  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     37  1.12.2.2  nathanw  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     38  1.12.2.2  nathanw  * POSSIBILITY OF SUCH DAMAGE.
     39  1.12.2.2  nathanw  */
     40  1.12.2.2  nathanw 
     41  1.12.2.2  nathanw /*
     42  1.12.2.2  nathanw  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
     43  1.12.2.2  nathanw  * All rights reserved.
     44  1.12.2.2  nathanw  *
     45  1.12.2.2  nathanw  * Author: Chris G. Demetriou
     46  1.12.2.2  nathanw  *
     47  1.12.2.2  nathanw  * Permission to use, copy, modify and distribute this software and
     48  1.12.2.2  nathanw  * its documentation is hereby granted, provided that both the copyright
     49  1.12.2.2  nathanw  * notice and this permission notice appear in all copies of the
     50  1.12.2.2  nathanw  * software, derivative works or modified versions, and any portions
     51  1.12.2.2  nathanw  * thereof, and that both notices appear in supporting documentation.
     52  1.12.2.2  nathanw  *
     53  1.12.2.2  nathanw  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     54  1.12.2.2  nathanw  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     55  1.12.2.2  nathanw  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     56  1.12.2.2  nathanw  *
     57  1.12.2.2  nathanw  * Carnegie Mellon requests users of this software to return to
     58  1.12.2.2  nathanw  *
     59  1.12.2.2  nathanw  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     60  1.12.2.2  nathanw  *  School of Computer Science
     61  1.12.2.2  nathanw  *  Carnegie Mellon University
     62  1.12.2.2  nathanw  *  Pittsburgh PA 15213-3890
     63  1.12.2.2  nathanw  *
     64  1.12.2.2  nathanw  * any improvements or extensions that they make and grant Carnegie the
     65  1.12.2.2  nathanw  * rights to redistribute these changes.
     66  1.12.2.2  nathanw  */
     67  1.12.2.2  nathanw 
     68  1.12.2.2  nathanw #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     69  1.12.2.2  nathanw 
     70  1.12.2.3  nathanw __KERNEL_RCSID(0, "$NetBSD: pci_1000.c,v 1.12.2.3 2002/10/18 02:34:21 nathanw Exp $");
     71  1.12.2.2  nathanw 
     72  1.12.2.2  nathanw #include <sys/types.h>
     73  1.12.2.2  nathanw #include <sys/param.h>
     74  1.12.2.2  nathanw #include <sys/time.h>
     75  1.12.2.2  nathanw #include <sys/systm.h>
     76  1.12.2.2  nathanw #include <sys/errno.h>
     77  1.12.2.2  nathanw #include <sys/malloc.h>
     78  1.12.2.2  nathanw #include <sys/device.h>
     79  1.12.2.2  nathanw #include <sys/syslog.h>
     80  1.12.2.2  nathanw 
     81  1.12.2.2  nathanw #include <uvm/uvm_extern.h>
     82  1.12.2.2  nathanw 
     83  1.12.2.2  nathanw #include <machine/autoconf.h>
     84  1.12.2.2  nathanw 
     85  1.12.2.2  nathanw #include <dev/pci/pcireg.h>
     86  1.12.2.2  nathanw #include <dev/pci/pcivar.h>
     87  1.12.2.2  nathanw 
     88  1.12.2.2  nathanw #include <alpha/pci/pci_1000.h>
     89  1.12.2.2  nathanw 
     90  1.12.2.2  nathanw #include "sio.h"
     91  1.12.2.2  nathanw #if NSIO > 0 || NPCEB > 0
     92  1.12.2.2  nathanw #include <alpha/pci/siovar.h>
     93  1.12.2.2  nathanw #endif
     94  1.12.2.2  nathanw 
     95  1.12.2.2  nathanw static bus_space_tag_t another_mystery_icu_iot;
     96  1.12.2.2  nathanw static bus_space_handle_t another_mystery_icu_ioh;
     97  1.12.2.2  nathanw 
     98  1.12.2.2  nathanw int	dec_1000_intr_map __P((struct pci_attach_args *, pci_intr_handle_t *));
     99  1.12.2.2  nathanw const char *dec_1000_intr_string __P((void *, pci_intr_handle_t));
    100  1.12.2.2  nathanw const struct evcnt *dec_1000_intr_evcnt __P((void *, pci_intr_handle_t));
    101  1.12.2.2  nathanw void	*dec_1000_intr_establish __P((void *, pci_intr_handle_t,
    102  1.12.2.2  nathanw 	    int, int (*func)(void *), void *));
    103  1.12.2.2  nathanw void	dec_1000_intr_disestablish __P((void *, void *));
    104  1.12.2.2  nathanw 
    105  1.12.2.2  nathanw #define	PCI_NIRQ	16
    106  1.12.2.2  nathanw #define	PCI_STRAY_MAX	5
    107  1.12.2.2  nathanw 
    108  1.12.2.2  nathanw struct alpha_shared_intr *dec_1000_pci_intr;
    109  1.12.2.2  nathanw 
    110  1.12.2.2  nathanw static void dec_1000_iointr __P((void *arg, unsigned long vec));
    111  1.12.2.2  nathanw static void dec_1000_enable_intr __P((int irq));
    112  1.12.2.2  nathanw static void dec_1000_disable_intr __P((int irq));
    113  1.12.2.2  nathanw static void pci_1000_imi __P((void));
    114  1.12.2.2  nathanw static pci_chipset_tag_t pc_tag;
    115  1.12.2.2  nathanw 
    116  1.12.2.2  nathanw void
    117  1.12.2.2  nathanw pci_1000_pickintr(core, iot, memt, pc)
    118  1.12.2.2  nathanw 	void *core;
    119  1.12.2.2  nathanw 	bus_space_tag_t iot, memt;
    120  1.12.2.2  nathanw 	pci_chipset_tag_t pc;
    121  1.12.2.2  nathanw {
    122  1.12.2.2  nathanw 	char *cp;
    123  1.12.2.2  nathanw 	int i;
    124  1.12.2.2  nathanw 
    125  1.12.2.2  nathanw 	another_mystery_icu_iot = iot;
    126  1.12.2.2  nathanw 
    127  1.12.2.2  nathanw 	pc_tag = pc;
    128  1.12.2.2  nathanw 	if (bus_space_map(iot, 0x536, 2, 0, &another_mystery_icu_ioh))
    129  1.12.2.2  nathanw 		panic("pci_1000_pickintr");
    130  1.12.2.2  nathanw         pc->pc_intr_v = core;
    131  1.12.2.2  nathanw         pc->pc_intr_map = dec_1000_intr_map;
    132  1.12.2.2  nathanw         pc->pc_intr_string = dec_1000_intr_string;
    133  1.12.2.2  nathanw 	pc->pc_intr_evcnt = dec_1000_intr_evcnt;
    134  1.12.2.2  nathanw         pc->pc_intr_establish = dec_1000_intr_establish;
    135  1.12.2.2  nathanw         pc->pc_intr_disestablish = dec_1000_intr_disestablish;
    136  1.12.2.2  nathanw 
    137  1.12.2.2  nathanw 	pc->pc_pciide_compat_intr_establish = NULL;
    138  1.12.2.2  nathanw 
    139  1.12.2.2  nathanw 	dec_1000_pci_intr =
    140  1.12.2.2  nathanw 	    alpha_shared_intr_alloc(PCI_NIRQ, 8);
    141  1.12.2.2  nathanw 	for (i = 0; i < PCI_NIRQ; i++) {
    142  1.12.2.2  nathanw 		alpha_shared_intr_set_maxstrays(dec_1000_pci_intr, i,
    143  1.12.2.2  nathanw 		    PCI_STRAY_MAX);
    144  1.12.2.2  nathanw 
    145  1.12.2.2  nathanw 		cp = alpha_shared_intr_string(dec_1000_pci_intr, i);
    146  1.12.2.2  nathanw 		sprintf(cp, "irq %d", i);
    147  1.12.2.2  nathanw 		evcnt_attach_dynamic(alpha_shared_intr_evcnt(
    148  1.12.2.2  nathanw 		    dec_1000_pci_intr, i), EVCNT_TYPE_INTR, NULL,
    149  1.12.2.2  nathanw 		    "dec_1000", cp);
    150  1.12.2.2  nathanw 	}
    151  1.12.2.2  nathanw 
    152  1.12.2.2  nathanw 	pci_1000_imi();
    153  1.12.2.2  nathanw #if NSIO > 0 || NPCEB > 0
    154  1.12.2.2  nathanw 	sio_intr_setup(pc, iot);
    155  1.12.2.2  nathanw #endif
    156  1.12.2.2  nathanw }
    157  1.12.2.2  nathanw 
    158  1.12.2.2  nathanw int
    159  1.12.2.2  nathanw dec_1000_intr_map(pa, ihp)
    160  1.12.2.2  nathanw 	struct pci_attach_args *pa;
    161  1.12.2.2  nathanw         pci_intr_handle_t *ihp;
    162  1.12.2.2  nathanw {
    163  1.12.2.2  nathanw 	pcitag_t bustag = pa->pa_intrtag;
    164  1.12.2.2  nathanw 	int buspin = pa->pa_intrpin;
    165  1.12.2.2  nathanw 	pci_chipset_tag_t pc = pa->pa_pc;
    166  1.12.2.2  nathanw 	int	device;
    167  1.12.2.2  nathanw 
    168  1.12.2.2  nathanw 	if (buspin == 0)	/* No IRQ used. */
    169  1.12.2.2  nathanw 		return 1;
    170  1.12.2.2  nathanw 	if (!(1 <= buspin && buspin <= 4))
    171  1.12.2.2  nathanw 		goto bad;
    172  1.12.2.2  nathanw 
    173  1.12.2.2  nathanw 	pci_decompose_tag(pc, bustag, NULL, &device, NULL);
    174  1.12.2.2  nathanw 
    175  1.12.2.2  nathanw 	switch(device) {
    176  1.12.2.2  nathanw 	case 6:
    177  1.12.2.2  nathanw 		if(buspin != 1)
    178  1.12.2.2  nathanw 			break;
    179  1.12.2.2  nathanw 		*ihp = 0xc;		/* integrated ncr scsi */
    180  1.12.2.2  nathanw 		return 0;
    181  1.12.2.2  nathanw 	case 11:
    182  1.12.2.2  nathanw 	case 12:
    183  1.12.2.2  nathanw 	case 13:
    184  1.12.2.2  nathanw 		*ihp = (device - 11) * 4 + buspin - 1;
    185  1.12.2.2  nathanw 		return 0;
    186  1.12.2.2  nathanw 	}
    187  1.12.2.2  nathanw 
    188  1.12.2.2  nathanw bad:	printf("dec_1000_intr_map: can't map dev %d pin %d\n", device, buspin);
    189  1.12.2.2  nathanw 	return 1;
    190  1.12.2.2  nathanw }
    191  1.12.2.2  nathanw 
    192  1.12.2.2  nathanw const char *
    193  1.12.2.2  nathanw dec_1000_intr_string(ccv, ih)
    194  1.12.2.2  nathanw 	void *ccv;
    195  1.12.2.2  nathanw 	pci_intr_handle_t ih;
    196  1.12.2.2  nathanw {
    197  1.12.2.2  nathanw 	static const char irqmsg_fmt[] = "dec_1000 irq %ld";
    198  1.12.2.2  nathanw         static char irqstr[sizeof irqmsg_fmt];
    199  1.12.2.2  nathanw 
    200  1.12.2.2  nathanw         if (ih >= PCI_NIRQ)
    201  1.12.2.3  nathanw                 panic("dec_1000_intr_string: bogus dec_1000 IRQ 0x%lx", ih);
    202  1.12.2.2  nathanw 
    203  1.12.2.2  nathanw         snprintf(irqstr, sizeof irqstr, irqmsg_fmt, ih);
    204  1.12.2.2  nathanw         return (irqstr);
    205  1.12.2.2  nathanw }
    206  1.12.2.2  nathanw 
    207  1.12.2.2  nathanw const struct evcnt *
    208  1.12.2.2  nathanw dec_1000_intr_evcnt(ccv, ih)
    209  1.12.2.2  nathanw 	void *ccv;
    210  1.12.2.2  nathanw 	pci_intr_handle_t ih;
    211  1.12.2.2  nathanw {
    212  1.12.2.2  nathanw 
    213  1.12.2.2  nathanw 	if (ih >= PCI_NIRQ)
    214  1.12.2.3  nathanw 		panic("dec_1000_intr_evcnt: bogus dec_1000 IRQ 0x%lx", ih);
    215  1.12.2.2  nathanw 
    216  1.12.2.2  nathanw 	return (alpha_shared_intr_evcnt(dec_1000_pci_intr, ih));
    217  1.12.2.2  nathanw }
    218  1.12.2.2  nathanw 
    219  1.12.2.2  nathanw void *
    220  1.12.2.2  nathanw dec_1000_intr_establish(ccv, ih, level, func, arg)
    221  1.12.2.2  nathanw         void *ccv, *arg;
    222  1.12.2.2  nathanw         pci_intr_handle_t ih;
    223  1.12.2.2  nathanw         int level;
    224  1.12.2.2  nathanw         int (*func) __P((void *));
    225  1.12.2.2  nathanw {
    226  1.12.2.2  nathanw 	void *cookie;
    227  1.12.2.2  nathanw 
    228  1.12.2.2  nathanw         if (ih >= PCI_NIRQ)
    229  1.12.2.3  nathanw                 panic("dec_1000_intr_establish: IRQ too high, 0x%lx", ih);
    230  1.12.2.2  nathanw 
    231  1.12.2.2  nathanw 	cookie = alpha_shared_intr_establish(dec_1000_pci_intr, ih, IST_LEVEL,
    232  1.12.2.2  nathanw 	    level, func, arg, "dec_1000 irq");
    233  1.12.2.2  nathanw 
    234  1.12.2.2  nathanw 	if (cookie != NULL &&
    235  1.12.2.2  nathanw 	    alpha_shared_intr_firstactive(dec_1000_pci_intr, ih)) {
    236  1.12.2.2  nathanw 		scb_set(0x900 + SCB_IDXTOVEC(ih), dec_1000_iointr, NULL);
    237  1.12.2.2  nathanw 		dec_1000_enable_intr(ih);
    238  1.12.2.2  nathanw 	}
    239  1.12.2.2  nathanw 	return (cookie);
    240  1.12.2.2  nathanw }
    241  1.12.2.2  nathanw 
    242  1.12.2.2  nathanw void
    243  1.12.2.2  nathanw dec_1000_intr_disestablish(ccv, cookie)
    244  1.12.2.2  nathanw         void *ccv, *cookie;
    245  1.12.2.2  nathanw {
    246  1.12.2.2  nathanw 	struct alpha_shared_intrhand *ih = cookie;
    247  1.12.2.2  nathanw 	unsigned int irq = ih->ih_num;
    248  1.12.2.2  nathanw 	int s;
    249  1.12.2.2  nathanw 
    250  1.12.2.2  nathanw 	s = splhigh();
    251  1.12.2.2  nathanw 
    252  1.12.2.2  nathanw 	alpha_shared_intr_disestablish(dec_1000_pci_intr, cookie,
    253  1.12.2.2  nathanw 	    "dec_1000 irq");
    254  1.12.2.2  nathanw 	if (alpha_shared_intr_isactive(dec_1000_pci_intr, irq) == 0) {
    255  1.12.2.2  nathanw 		dec_1000_disable_intr(irq);
    256  1.12.2.2  nathanw 		alpha_shared_intr_set_dfltsharetype(dec_1000_pci_intr, irq,
    257  1.12.2.2  nathanw 		    IST_NONE);
    258  1.12.2.2  nathanw 		scb_free(0x900 + SCB_IDXTOVEC(irq));
    259  1.12.2.2  nathanw 	}
    260  1.12.2.2  nathanw 
    261  1.12.2.2  nathanw 	splx(s);
    262  1.12.2.2  nathanw }
    263  1.12.2.2  nathanw 
    264  1.12.2.2  nathanw static void
    265  1.12.2.2  nathanw dec_1000_iointr(arg, vec)
    266  1.12.2.2  nathanw 	void *arg;
    267  1.12.2.2  nathanw 	unsigned long vec;
    268  1.12.2.2  nathanw {
    269  1.12.2.2  nathanw 	int irq;
    270  1.12.2.2  nathanw 
    271  1.12.2.2  nathanw 	irq = SCB_VECTOIDX(vec - 0x900);
    272  1.12.2.2  nathanw 
    273  1.12.2.2  nathanw 	if (!alpha_shared_intr_dispatch(dec_1000_pci_intr, irq)) {
    274  1.12.2.2  nathanw 		alpha_shared_intr_stray(dec_1000_pci_intr, irq,
    275  1.12.2.2  nathanw 		    "dec_1000 irq");
    276  1.12.2.2  nathanw 		if (ALPHA_SHARED_INTR_DISABLE(dec_1000_pci_intr, irq))
    277  1.12.2.2  nathanw 			dec_1000_disable_intr(irq);
    278  1.12.2.2  nathanw 	}
    279  1.12.2.2  nathanw }
    280  1.12.2.2  nathanw 
    281  1.12.2.2  nathanw /*
    282  1.12.2.2  nathanw  * Read and write the mystery ICU IMR registers
    283  1.12.2.2  nathanw  */
    284  1.12.2.2  nathanw 
    285  1.12.2.2  nathanw #define	IR() bus_space_read_2(another_mystery_icu_iot,		\
    286  1.12.2.2  nathanw 				another_mystery_icu_ioh, 0)
    287  1.12.2.2  nathanw 
    288  1.12.2.2  nathanw #define	IW(v) bus_space_write_2(another_mystery_icu_iot,	\
    289  1.12.2.2  nathanw 				another_mystery_icu_ioh, 0, (v))
    290  1.12.2.2  nathanw 
    291  1.12.2.2  nathanw /*
    292  1.12.2.2  nathanw  * Enable and disable interrupts at the ICU level
    293  1.12.2.2  nathanw  */
    294  1.12.2.2  nathanw 
    295  1.12.2.2  nathanw static void
    296  1.12.2.2  nathanw dec_1000_enable_intr(irq)
    297  1.12.2.2  nathanw 	int irq;
    298  1.12.2.2  nathanw {
    299  1.12.2.2  nathanw 	IW(IR() | 1 << irq);
    300  1.12.2.2  nathanw }
    301  1.12.2.2  nathanw 
    302  1.12.2.2  nathanw static void
    303  1.12.2.2  nathanw dec_1000_disable_intr(irq)
    304  1.12.2.2  nathanw 	int irq;
    305  1.12.2.2  nathanw {
    306  1.12.2.2  nathanw 	IW(IR() & ~(1 << irq));
    307  1.12.2.2  nathanw }
    308  1.12.2.2  nathanw /*
    309  1.12.2.2  nathanw  * Initialize mystery ICU
    310  1.12.2.2  nathanw  */
    311  1.12.2.2  nathanw static void
    312  1.12.2.2  nathanw pci_1000_imi()
    313  1.12.2.2  nathanw {
    314  1.12.2.2  nathanw 	IW(0);					/* XXX ?? */
    315  1.12.2.2  nathanw }
    316