pci_1000.c revision 1.27 1 1.27 thorpej /* $NetBSD: pci_1000.c,v 1.27 2020/09/22 15:24:02 thorpej Exp $ */
2 1.1 ross
3 1.1 ross /*
4 1.1 ross * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 ross * All rights reserved.
6 1.1 ross *
7 1.1 ross * This code is based on pci_kn20aa.c, written by Chris G. Demetriou at
8 1.1 ross * Carnegie-Mellon University. Platform support for Mikasa and Mikasa/Pinnacle
9 1.1 ross * (Pinkasa) by Ross Harvey with copyright assignment by permission of Avalon
10 1.1 ross * Computer Systems, Inc.
11 1.1 ross *
12 1.1 ross * Redistribution and use in source and binary forms, with or without
13 1.1 ross * modification, are permitted provided that the following conditions
14 1.1 ross * are met:
15 1.1 ross * 1. Redistributions of source code must retain the above copyright
16 1.1 ross * notice, this list of conditions and the following disclaimer.
17 1.1 ross * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 ross * notice, this list of conditions and the following disclaimer in the
19 1.1 ross * documentation and/or other materials provided with the distribution.
20 1.1 ross *
21 1.1 ross * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 1.1 ross * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 1.1 ross * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 1.1 ross * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 1.1 ross * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 1.1 ross * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 1.1 ross * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 1.1 ross * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 1.1 ross * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 1.1 ross * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 1.1 ross * POSSIBILITY OF SUCH DAMAGE.
32 1.1 ross */
33 1.1 ross
34 1.1 ross /*
35 1.1 ross * Copyright (c) 1995, 1996 Carnegie-Mellon University.
36 1.1 ross * All rights reserved.
37 1.1 ross *
38 1.1 ross * Author: Chris G. Demetriou
39 1.24 matt *
40 1.1 ross * Permission to use, copy, modify and distribute this software and
41 1.1 ross * its documentation is hereby granted, provided that both the copyright
42 1.1 ross * notice and this permission notice appear in all copies of the
43 1.1 ross * software, derivative works or modified versions, and any portions
44 1.1 ross * thereof, and that both notices appear in supporting documentation.
45 1.24 matt *
46 1.24 matt * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
47 1.24 matt * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
48 1.1 ross * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
49 1.24 matt *
50 1.1 ross * Carnegie Mellon requests users of this software to return to
51 1.1 ross *
52 1.1 ross * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
53 1.1 ross * School of Computer Science
54 1.1 ross * Carnegie Mellon University
55 1.1 ross * Pittsburgh PA 15213-3890
56 1.1 ross *
57 1.1 ross * any improvements or extensions that they make and grant Carnegie the
58 1.1 ross * rights to redistribute these changes.
59 1.1 ross */
60 1.1 ross
61 1.1 ross #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
62 1.1 ross
63 1.27 thorpej __KERNEL_RCSID(0, "$NetBSD: pci_1000.c,v 1.27 2020/09/22 15:24:02 thorpej Exp $");
64 1.1 ross
65 1.1 ross #include <sys/types.h>
66 1.1 ross #include <sys/param.h>
67 1.1 ross #include <sys/time.h>
68 1.1 ross #include <sys/systm.h>
69 1.1 ross #include <sys/errno.h>
70 1.1 ross #include <sys/malloc.h>
71 1.1 ross #include <sys/device.h>
72 1.1 ross #include <sys/syslog.h>
73 1.1 ross
74 1.1 ross #include <machine/autoconf.h>
75 1.1 ross
76 1.1 ross #include <dev/pci/pcireg.h>
77 1.1 ross #include <dev/pci/pcivar.h>
78 1.1 ross
79 1.1 ross #include <alpha/pci/pci_1000.h>
80 1.1 ross
81 1.1 ross #include "sio.h"
82 1.7 thorpej #if NSIO > 0 || NPCEB > 0
83 1.1 ross #include <alpha/pci/siovar.h>
84 1.1 ross #endif
85 1.1 ross
86 1.1 ross static bus_space_tag_t another_mystery_icu_iot;
87 1.1 ross static bus_space_handle_t another_mystery_icu_ioh;
88 1.1 ross
89 1.27 thorpej static int dec_1000_intr_map(const struct pci_attach_args *,
90 1.27 thorpej pci_intr_handle_t *);
91 1.1 ross
92 1.9 thorpej #define PCI_NIRQ 16
93 1.9 thorpej #define PCI_STRAY_MAX 5
94 1.1 ross
95 1.27 thorpej static void dec_1000_enable_intr(pci_chipset_tag_t, int irq);
96 1.27 thorpej static void dec_1000_disable_intr(pci_chipset_tag_t, int irq);
97 1.27 thorpej static void pci_1000_imi(void);
98 1.1 ross
99 1.1 ross void
100 1.21 dsl pci_1000_pickintr(void *core, bus_space_tag_t iot, bus_space_tag_t memt, pci_chipset_tag_t pc)
101 1.1 ross {
102 1.9 thorpej char *cp;
103 1.1 ross int i;
104 1.1 ross
105 1.1 ross another_mystery_icu_iot = iot;
106 1.1 ross
107 1.1 ross if (bus_space_map(iot, 0x536, 2, 0, &another_mystery_icu_ioh))
108 1.1 ross panic("pci_1000_pickintr");
109 1.27 thorpej
110 1.24 matt pc->pc_intr_v = core;
111 1.24 matt pc->pc_intr_map = dec_1000_intr_map;
112 1.27 thorpej pc->pc_intr_string = alpha_pci_generic_intr_string;
113 1.27 thorpej pc->pc_intr_evcnt = alpha_pci_generic_intr_evcnt;
114 1.27 thorpej pc->pc_intr_establish = alpha_pci_generic_intr_establish;
115 1.27 thorpej pc->pc_intr_disestablish = alpha_pci_generic_intr_disestablish;
116 1.1 ross
117 1.1 ross pc->pc_pciide_compat_intr_establish = NULL;
118 1.1 ross
119 1.26 christos #define PCI_1000_IRQ_STR 8
120 1.27 thorpej pc->pc_shared_intrs =
121 1.26 christos alpha_shared_intr_alloc(PCI_NIRQ, PCI_1000_IRQ_STR);
122 1.27 thorpej pc->pc_intr_desc = "dec 1000 irq";
123 1.27 thorpej pc->pc_vecbase = 0x900;
124 1.27 thorpej pc->pc_nirq = PCI_NIRQ;
125 1.27 thorpej
126 1.27 thorpej pc->pc_intr_enable = dec_1000_enable_intr;
127 1.27 thorpej pc->pc_intr_disable = dec_1000_disable_intr;
128 1.27 thorpej
129 1.9 thorpej for (i = 0; i < PCI_NIRQ; i++) {
130 1.27 thorpej alpha_shared_intr_set_maxstrays(pc->pc_shared_intrs, i,
131 1.1 ross PCI_STRAY_MAX);
132 1.9 thorpej
133 1.27 thorpej cp = alpha_shared_intr_string(pc->pc_shared_intrs, i);
134 1.26 christos snprintf(cp, PCI_1000_IRQ_STR, "irq %d", i);
135 1.9 thorpej evcnt_attach_dynamic(alpha_shared_intr_evcnt(
136 1.27 thorpej pc->pc_shared_intrs, i), EVCNT_TYPE_INTR, NULL,
137 1.27 thorpej "dec 1000", cp);
138 1.9 thorpej }
139 1.1 ross
140 1.1 ross pci_1000_imi();
141 1.7 thorpej #if NSIO > 0 || NPCEB > 0
142 1.1 ross sio_intr_setup(pc, iot);
143 1.1 ross #endif
144 1.1 ross }
145 1.1 ross
146 1.27 thorpej static int
147 1.23 dyoung dec_1000_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
148 1.1 ross {
149 1.11 sommerfe pcitag_t bustag = pa->pa_intrtag;
150 1.11 sommerfe int buspin = pa->pa_intrpin;
151 1.11 sommerfe pci_chipset_tag_t pc = pa->pa_pc;
152 1.25 skrll int device = 0; /* XXX gcc */
153 1.1 ross
154 1.1 ross if (buspin == 0) /* No IRQ used. */
155 1.1 ross return 1;
156 1.1 ross if (!(1 <= buspin && buspin <= 4))
157 1.1 ross goto bad;
158 1.1 ross
159 1.13 thorpej pci_decompose_tag(pc, bustag, NULL, &device, NULL);
160 1.1 ross
161 1.1 ross switch(device) {
162 1.1 ross case 6:
163 1.1 ross if(buspin != 1)
164 1.1 ross break;
165 1.27 thorpej /* integrated ncr scsi */
166 1.27 thorpej alpha_pci_intr_handle_init(ihp, 0xc, 0);
167 1.1 ross return 0;
168 1.1 ross case 11:
169 1.1 ross case 12:
170 1.1 ross case 13:
171 1.27 thorpej alpha_pci_intr_handle_init(ihp,
172 1.27 thorpej (device - 11) * 4 + buspin - 1, 0);
173 1.1 ross return 0;
174 1.1 ross }
175 1.1 ross
176 1.1 ross bad: printf("dec_1000_intr_map: can't map dev %d pin %d\n", device, buspin);
177 1.1 ross return 1;
178 1.1 ross }
179 1.1 ross
180 1.1 ross /*
181 1.1 ross * Read and write the mystery ICU IMR registers
182 1.1 ross */
183 1.1 ross
184 1.1 ross #define IR() bus_space_read_2(another_mystery_icu_iot, \
185 1.1 ross another_mystery_icu_ioh, 0)
186 1.1 ross
187 1.1 ross #define IW(v) bus_space_write_2(another_mystery_icu_iot, \
188 1.1 ross another_mystery_icu_ioh, 0, (v))
189 1.1 ross
190 1.1 ross /*
191 1.1 ross * Enable and disable interrupts at the ICU level
192 1.1 ross */
193 1.1 ross
194 1.1 ross static void
195 1.27 thorpej dec_1000_enable_intr(pci_chipset_tag_t pc __unused, int irq)
196 1.1 ross {
197 1.1 ross IW(IR() | 1 << irq);
198 1.1 ross }
199 1.1 ross
200 1.1 ross static void
201 1.27 thorpej dec_1000_disable_intr(pci_chipset_tag_t pc __unused, int irq)
202 1.1 ross {
203 1.1 ross IW(IR() & ~(1 << irq));
204 1.1 ross }
205 1.27 thorpej
206 1.1 ross /*
207 1.1 ross * Initialize mystery ICU
208 1.1 ross */
209 1.1 ross static void
210 1.24 matt pci_1000_imi(void)
211 1.1 ross {
212 1.1 ross IW(0); /* XXX ?? */
213 1.1 ross }
214