pci_1000.c revision 1.11
1 /* $NetBSD: pci_1000.c,v 1.11 2000/12/28 22:59:07 sommerfeld Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is based on pci_kn20aa.c, written by Chris G. Demetriou at 8 * Carnegie-Mellon University. Platform support for Mikasa and Mikasa/Pinnacle 9 * (Pinkasa) by Ross Harvey with copyright assignment by permission of Avalon 10 * Computer Systems, Inc. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 43 * All rights reserved. 44 * 45 * Author: Chris G. Demetriou 46 * 47 * Permission to use, copy, modify and distribute this software and 48 * its documentation is hereby granted, provided that both the copyright 49 * notice and this permission notice appear in all copies of the 50 * software, derivative works or modified versions, and any portions 51 * thereof, and that both notices appear in supporting documentation. 52 * 53 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 54 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 55 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 56 * 57 * Carnegie Mellon requests users of this software to return to 58 * 59 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 60 * School of Computer Science 61 * Carnegie Mellon University 62 * Pittsburgh PA 15213-3890 63 * 64 * any improvements or extensions that they make and grant Carnegie the 65 * rights to redistribute these changes. 66 */ 67 68 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 69 70 __KERNEL_RCSID(0, "$NetBSD: pci_1000.c,v 1.11 2000/12/28 22:59:07 sommerfeld Exp $"); 71 72 #include <sys/types.h> 73 #include <sys/param.h> 74 #include <sys/time.h> 75 #include <sys/systm.h> 76 #include <sys/errno.h> 77 #include <sys/malloc.h> 78 #include <sys/device.h> 79 #include <sys/syslog.h> 80 81 #include <uvm/uvm_extern.h> 82 83 #include <machine/autoconf.h> 84 85 #include <dev/pci/pcireg.h> 86 #include <dev/pci/pcivar.h> 87 88 #include <alpha/pci/pci_1000.h> 89 90 #include "sio.h" 91 #if NSIO > 0 || NPCEB > 0 92 #include <alpha/pci/siovar.h> 93 #endif 94 95 static bus_space_tag_t another_mystery_icu_iot; 96 static bus_space_handle_t another_mystery_icu_ioh; 97 98 int dec_1000_intr_map __P((struct pci_attach_args *, pci_intr_handle_t *)); 99 const char *dec_1000_intr_string __P((void *, pci_intr_handle_t)); 100 const struct evcnt *dec_1000_intr_evcnt __P((void *, pci_intr_handle_t)); 101 void *dec_1000_intr_establish __P((void *, pci_intr_handle_t, 102 int, int (*func)(void *), void *)); 103 void dec_1000_intr_disestablish __P((void *, void *)); 104 105 #define PCI_NIRQ 16 106 #define PCI_STRAY_MAX 5 107 108 struct alpha_shared_intr *dec_1000_pci_intr; 109 110 static void dec_1000_iointr __P((void *framep, unsigned long vec)); 111 static void dec_1000_enable_intr __P((int irq)); 112 static void dec_1000_disable_intr __P((int irq)); 113 static void pci_1000_imi __P((void)); 114 static pci_chipset_tag_t pc_tag; 115 116 void 117 pci_1000_pickintr(core, iot, memt, pc) 118 void *core; 119 bus_space_tag_t iot, memt; 120 pci_chipset_tag_t pc; 121 { 122 char *cp; 123 int i; 124 125 another_mystery_icu_iot = iot; 126 127 pc_tag = pc; 128 if (bus_space_map(iot, 0x536, 2, 0, &another_mystery_icu_ioh)) 129 panic("pci_1000_pickintr"); 130 pc->pc_intr_v = core; 131 pc->pc_intr_map = dec_1000_intr_map; 132 pc->pc_intr_string = dec_1000_intr_string; 133 pc->pc_intr_evcnt = dec_1000_intr_evcnt; 134 pc->pc_intr_establish = dec_1000_intr_establish; 135 pc->pc_intr_disestablish = dec_1000_intr_disestablish; 136 137 pc->pc_pciide_compat_intr_establish = NULL; 138 139 dec_1000_pci_intr = 140 alpha_shared_intr_alloc(PCI_NIRQ, 8); 141 for (i = 0; i < PCI_NIRQ; i++) { 142 alpha_shared_intr_set_maxstrays(dec_1000_pci_intr, i, 143 PCI_STRAY_MAX); 144 145 cp = alpha_shared_intr_string(dec_1000_pci_intr, i); 146 sprintf(cp, "irq %d", i); 147 evcnt_attach_dynamic(alpha_shared_intr_evcnt( 148 dec_1000_pci_intr, i), EVCNT_TYPE_INTR, NULL, 149 "dec_1000", cp); 150 } 151 152 pci_1000_imi(); 153 #if NSIO > 0 || NPCEB > 0 154 sio_intr_setup(pc, iot); 155 #endif 156 set_iointr(dec_1000_iointr); 157 } 158 159 int 160 dec_1000_intr_map(pa, ihp) 161 struct pci_attach_args *pa; 162 pci_intr_handle_t *ihp; 163 { 164 pcitag_t bustag = pa->pa_intrtag; 165 int buspin = pa->pa_intrpin; 166 pci_chipset_tag_t pc = pa->pa_pc; 167 int device; 168 169 if (buspin == 0) /* No IRQ used. */ 170 return 1; 171 if (!(1 <= buspin && buspin <= 4)) 172 goto bad; 173 174 alpha_pci_decompose_tag(pc, bustag, NULL, &device, NULL); 175 176 switch(device) { 177 case 6: 178 if(buspin != 1) 179 break; 180 *ihp = 0xc; /* integrated ncr scsi */ 181 return 0; 182 case 11: 183 case 12: 184 case 13: 185 *ihp = (device - 11) * 4 + buspin - 1; 186 return 0; 187 } 188 189 bad: printf("dec_1000_intr_map: can't map dev %d pin %d\n", device, buspin); 190 return 1; 191 } 192 193 const char * 194 dec_1000_intr_string(ccv, ih) 195 void *ccv; 196 pci_intr_handle_t ih; 197 { 198 static const char irqmsg_fmt[] = "dec_1000 irq %ld"; 199 static char irqstr[sizeof irqmsg_fmt]; 200 201 if (ih >= PCI_NIRQ) 202 panic("dec_1000_intr_string: bogus dec_1000 IRQ 0x%lx\n", ih); 203 204 snprintf(irqstr, sizeof irqstr, irqmsg_fmt, ih); 205 return (irqstr); 206 } 207 208 const struct evcnt * 209 dec_1000_intr_evcnt(ccv, ih) 210 void *ccv; 211 pci_intr_handle_t ih; 212 { 213 214 if (ih >= PCI_NIRQ) 215 panic("dec_1000_intr_evcnt: bogus dec_1000 IRQ 0x%lx\n", ih); 216 217 return (alpha_shared_intr_evcnt(dec_1000_pci_intr, ih)); 218 } 219 220 void * 221 dec_1000_intr_establish(ccv, ih, level, func, arg) 222 void *ccv, *arg; 223 pci_intr_handle_t ih; 224 int level; 225 int (*func) __P((void *)); 226 { 227 void *cookie; 228 229 if (ih >= PCI_NIRQ) 230 panic("dec_1000_intr_establish: IRQ too high, 0x%lx\n", ih); 231 232 cookie = alpha_shared_intr_establish(dec_1000_pci_intr, ih, IST_LEVEL, 233 level, func, arg, "dec_1000 irq"); 234 235 if (cookie != NULL && 236 alpha_shared_intr_isactive(dec_1000_pci_intr, ih)) 237 dec_1000_enable_intr(ih); 238 return (cookie); 239 } 240 241 void 242 dec_1000_intr_disestablish(ccv, cookie) 243 void *ccv, *cookie; 244 { 245 struct alpha_shared_intrhand *ih = cookie; 246 unsigned int irq = ih->ih_num; 247 int s; 248 249 s = splhigh(); 250 251 alpha_shared_intr_disestablish(dec_1000_pci_intr, cookie, 252 "dec_1000 irq"); 253 if (alpha_shared_intr_isactive(dec_1000_pci_intr, irq) == 0) { 254 dec_1000_disable_intr(irq); 255 alpha_shared_intr_set_dfltsharetype(dec_1000_pci_intr, irq, 256 IST_NONE); 257 } 258 259 splx(s); 260 } 261 262 static void 263 dec_1000_iointr(framep, vec) 264 void *framep; 265 unsigned long vec; 266 { 267 int irq; 268 269 if (vec >= 0x900) { 270 if (vec >= 0x900 + (PCI_NIRQ << 4)) 271 panic("dec_1000_iointr: vec 0x%lx out of range\n", vec); 272 irq = (vec - 0x900) >> 4; 273 274 if (!alpha_shared_intr_dispatch(dec_1000_pci_intr, irq)) { 275 alpha_shared_intr_stray(dec_1000_pci_intr, irq, 276 "dec_1000 irq"); 277 if (ALPHA_SHARED_INTR_DISABLE(dec_1000_pci_intr, irq)) 278 dec_1000_disable_intr(irq); 279 } 280 return; 281 } 282 #if NSIO > 0 || NPCEB > 0 283 if (vec >= 0x800) { 284 sio_iointr(framep, vec); 285 return; 286 } 287 #endif 288 panic("dec_1000_iointr: weird vec 0x%lx\n", vec); 289 } 290 291 /* 292 * Read and write the mystery ICU IMR registers 293 */ 294 295 #define IR() bus_space_read_2(another_mystery_icu_iot, \ 296 another_mystery_icu_ioh, 0) 297 298 #define IW(v) bus_space_write_2(another_mystery_icu_iot, \ 299 another_mystery_icu_ioh, 0, (v)) 300 301 /* 302 * Enable and disable interrupts at the ICU level 303 */ 304 305 static void 306 dec_1000_enable_intr(irq) 307 int irq; 308 { 309 IW(IR() | 1 << irq); 310 } 311 312 static void 313 dec_1000_disable_intr(irq) 314 int irq; 315 { 316 IW(IR() & ~(1 << irq)); 317 } 318 /* 319 * Initialize mystery ICU 320 */ 321 static void 322 pci_1000_imi() 323 { 324 IW(0); /* XXX ?? */ 325 } 326
Indexes created Tue Sep 30 20:09:53 GMT 2025