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pci_1000.c revision 1.13
      1 /* $NetBSD: pci_1000.c,v 1.13 2002/05/15 16:57:42 thorpej Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is based on pci_kn20aa.c, written by Chris G. Demetriou at
      8  * Carnegie-Mellon University. Platform support for Mikasa and Mikasa/Pinnacle
      9  * (Pinkasa) by Ross Harvey with copyright assignment by permission of Avalon
     10  * Computer Systems, Inc.
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  * 3. All advertising materials mentioning features or use of this software
     21  *    must display the following acknowledgement:
     22  *	This product includes software developed by the NetBSD
     23  *	Foundation, Inc. and its contributors.
     24  * 4. Neither the name of The NetBSD Foundation nor the names of its
     25  *    contributors may be used to endorse or promote products derived
     26  *    from this software without specific prior written permission.
     27  *
     28  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     29  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     30  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     31  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     32  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     33  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     34  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     35  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     36  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     37  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     38  * POSSIBILITY OF SUCH DAMAGE.
     39  */
     40 
     41 /*
     42  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
     43  * All rights reserved.
     44  *
     45  * Author: Chris G. Demetriou
     46  *
     47  * Permission to use, copy, modify and distribute this software and
     48  * its documentation is hereby granted, provided that both the copyright
     49  * notice and this permission notice appear in all copies of the
     50  * software, derivative works or modified versions, and any portions
     51  * thereof, and that both notices appear in supporting documentation.
     52  *
     53  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     54  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     55  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     56  *
     57  * Carnegie Mellon requests users of this software to return to
     58  *
     59  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     60  *  School of Computer Science
     61  *  Carnegie Mellon University
     62  *  Pittsburgh PA 15213-3890
     63  *
     64  * any improvements or extensions that they make and grant Carnegie the
     65  * rights to redistribute these changes.
     66  */
     67 
     68 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     69 
     70 __KERNEL_RCSID(0, "$NetBSD: pci_1000.c,v 1.13 2002/05/15 16:57:42 thorpej Exp $");
     71 
     72 #include <sys/types.h>
     73 #include <sys/param.h>
     74 #include <sys/time.h>
     75 #include <sys/systm.h>
     76 #include <sys/errno.h>
     77 #include <sys/malloc.h>
     78 #include <sys/device.h>
     79 #include <sys/syslog.h>
     80 
     81 #include <uvm/uvm_extern.h>
     82 
     83 #include <machine/autoconf.h>
     84 
     85 #include <dev/pci/pcireg.h>
     86 #include <dev/pci/pcivar.h>
     87 
     88 #include <alpha/pci/pci_1000.h>
     89 
     90 #include "sio.h"
     91 #if NSIO > 0 || NPCEB > 0
     92 #include <alpha/pci/siovar.h>
     93 #endif
     94 
     95 static bus_space_tag_t another_mystery_icu_iot;
     96 static bus_space_handle_t another_mystery_icu_ioh;
     97 
     98 int	dec_1000_intr_map __P((struct pci_attach_args *, pci_intr_handle_t *));
     99 const char *dec_1000_intr_string __P((void *, pci_intr_handle_t));
    100 const struct evcnt *dec_1000_intr_evcnt __P((void *, pci_intr_handle_t));
    101 void	*dec_1000_intr_establish __P((void *, pci_intr_handle_t,
    102 	    int, int (*func)(void *), void *));
    103 void	dec_1000_intr_disestablish __P((void *, void *));
    104 
    105 #define	PCI_NIRQ	16
    106 #define	PCI_STRAY_MAX	5
    107 
    108 struct alpha_shared_intr *dec_1000_pci_intr;
    109 
    110 static void dec_1000_iointr __P((void *arg, unsigned long vec));
    111 static void dec_1000_enable_intr __P((int irq));
    112 static void dec_1000_disable_intr __P((int irq));
    113 static void pci_1000_imi __P((void));
    114 static pci_chipset_tag_t pc_tag;
    115 
    116 void
    117 pci_1000_pickintr(core, iot, memt, pc)
    118 	void *core;
    119 	bus_space_tag_t iot, memt;
    120 	pci_chipset_tag_t pc;
    121 {
    122 	char *cp;
    123 	int i;
    124 
    125 	another_mystery_icu_iot = iot;
    126 
    127 	pc_tag = pc;
    128 	if (bus_space_map(iot, 0x536, 2, 0, &another_mystery_icu_ioh))
    129 		panic("pci_1000_pickintr");
    130         pc->pc_intr_v = core;
    131         pc->pc_intr_map = dec_1000_intr_map;
    132         pc->pc_intr_string = dec_1000_intr_string;
    133 	pc->pc_intr_evcnt = dec_1000_intr_evcnt;
    134         pc->pc_intr_establish = dec_1000_intr_establish;
    135         pc->pc_intr_disestablish = dec_1000_intr_disestablish;
    136 
    137 	pc->pc_pciide_compat_intr_establish = NULL;
    138 
    139 	dec_1000_pci_intr =
    140 	    alpha_shared_intr_alloc(PCI_NIRQ, 8);
    141 	for (i = 0; i < PCI_NIRQ; i++) {
    142 		alpha_shared_intr_set_maxstrays(dec_1000_pci_intr, i,
    143 		    PCI_STRAY_MAX);
    144 
    145 		cp = alpha_shared_intr_string(dec_1000_pci_intr, i);
    146 		sprintf(cp, "irq %d", i);
    147 		evcnt_attach_dynamic(alpha_shared_intr_evcnt(
    148 		    dec_1000_pci_intr, i), EVCNT_TYPE_INTR, NULL,
    149 		    "dec_1000", cp);
    150 	}
    151 
    152 	pci_1000_imi();
    153 #if NSIO > 0 || NPCEB > 0
    154 	sio_intr_setup(pc, iot);
    155 #endif
    156 }
    157 
    158 int
    159 dec_1000_intr_map(pa, ihp)
    160 	struct pci_attach_args *pa;
    161         pci_intr_handle_t *ihp;
    162 {
    163 	pcitag_t bustag = pa->pa_intrtag;
    164 	int buspin = pa->pa_intrpin;
    165 	pci_chipset_tag_t pc = pa->pa_pc;
    166 	int	device;
    167 
    168 	if (buspin == 0)	/* No IRQ used. */
    169 		return 1;
    170 	if (!(1 <= buspin && buspin <= 4))
    171 		goto bad;
    172 
    173 	pci_decompose_tag(pc, bustag, NULL, &device, NULL);
    174 
    175 	switch(device) {
    176 	case 6:
    177 		if(buspin != 1)
    178 			break;
    179 		*ihp = 0xc;		/* integrated ncr scsi */
    180 		return 0;
    181 	case 11:
    182 	case 12:
    183 	case 13:
    184 		*ihp = (device - 11) * 4 + buspin - 1;
    185 		return 0;
    186 	}
    187 
    188 bad:	printf("dec_1000_intr_map: can't map dev %d pin %d\n", device, buspin);
    189 	return 1;
    190 }
    191 
    192 const char *
    193 dec_1000_intr_string(ccv, ih)
    194 	void *ccv;
    195 	pci_intr_handle_t ih;
    196 {
    197 	static const char irqmsg_fmt[] = "dec_1000 irq %ld";
    198         static char irqstr[sizeof irqmsg_fmt];
    199 
    200         if (ih >= PCI_NIRQ)
    201                 panic("dec_1000_intr_string: bogus dec_1000 IRQ 0x%lx\n", ih);
    202 
    203         snprintf(irqstr, sizeof irqstr, irqmsg_fmt, ih);
    204         return (irqstr);
    205 }
    206 
    207 const struct evcnt *
    208 dec_1000_intr_evcnt(ccv, ih)
    209 	void *ccv;
    210 	pci_intr_handle_t ih;
    211 {
    212 
    213 	if (ih >= PCI_NIRQ)
    214 		panic("dec_1000_intr_evcnt: bogus dec_1000 IRQ 0x%lx\n", ih);
    215 
    216 	return (alpha_shared_intr_evcnt(dec_1000_pci_intr, ih));
    217 }
    218 
    219 void *
    220 dec_1000_intr_establish(ccv, ih, level, func, arg)
    221         void *ccv, *arg;
    222         pci_intr_handle_t ih;
    223         int level;
    224         int (*func) __P((void *));
    225 {
    226 	void *cookie;
    227 
    228         if (ih >= PCI_NIRQ)
    229                 panic("dec_1000_intr_establish: IRQ too high, 0x%lx\n", ih);
    230 
    231 	cookie = alpha_shared_intr_establish(dec_1000_pci_intr, ih, IST_LEVEL,
    232 	    level, func, arg, "dec_1000 irq");
    233 
    234 	if (cookie != NULL &&
    235 	    alpha_shared_intr_firstactive(dec_1000_pci_intr, ih)) {
    236 		scb_set(0x900 + SCB_IDXTOVEC(ih), dec_1000_iointr, NULL);
    237 		dec_1000_enable_intr(ih);
    238 	}
    239 	return (cookie);
    240 }
    241 
    242 void
    243 dec_1000_intr_disestablish(ccv, cookie)
    244         void *ccv, *cookie;
    245 {
    246 	struct alpha_shared_intrhand *ih = cookie;
    247 	unsigned int irq = ih->ih_num;
    248 	int s;
    249 
    250 	s = splhigh();
    251 
    252 	alpha_shared_intr_disestablish(dec_1000_pci_intr, cookie,
    253 	    "dec_1000 irq");
    254 	if (alpha_shared_intr_isactive(dec_1000_pci_intr, irq) == 0) {
    255 		dec_1000_disable_intr(irq);
    256 		alpha_shared_intr_set_dfltsharetype(dec_1000_pci_intr, irq,
    257 		    IST_NONE);
    258 		scb_free(0x900 + SCB_IDXTOVEC(irq));
    259 	}
    260 
    261 	splx(s);
    262 }
    263 
    264 static void
    265 dec_1000_iointr(arg, vec)
    266 	void *arg;
    267 	unsigned long vec;
    268 {
    269 	int irq;
    270 
    271 	irq = SCB_VECTOIDX(vec - 0x900);
    272 
    273 	if (!alpha_shared_intr_dispatch(dec_1000_pci_intr, irq)) {
    274 		alpha_shared_intr_stray(dec_1000_pci_intr, irq,
    275 		    "dec_1000 irq");
    276 		if (ALPHA_SHARED_INTR_DISABLE(dec_1000_pci_intr, irq))
    277 			dec_1000_disable_intr(irq);
    278 	}
    279 }
    280 
    281 /*
    282  * Read and write the mystery ICU IMR registers
    283  */
    284 
    285 #define	IR() bus_space_read_2(another_mystery_icu_iot,		\
    286 				another_mystery_icu_ioh, 0)
    287 
    288 #define	IW(v) bus_space_write_2(another_mystery_icu_iot,	\
    289 				another_mystery_icu_ioh, 0, (v))
    290 
    291 /*
    292  * Enable and disable interrupts at the ICU level
    293  */
    294 
    295 static void
    296 dec_1000_enable_intr(irq)
    297 	int irq;
    298 {
    299 	IW(IR() | 1 << irq);
    300 }
    301 
    302 static void
    303 dec_1000_disable_intr(irq)
    304 	int irq;
    305 {
    306 	IW(IR() & ~(1 << irq));
    307 }
    308 /*
    309  * Initialize mystery ICU
    310  */
    311 static void
    312 pci_1000_imi()
    313 {
    314 	IW(0);					/* XXX ?? */
    315 }
    316