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pci_1000.c revision 1.19 
      1 /* $NetBSD: pci_1000.c,v 1.19 2009/03/14 14:45:53 dsl Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is based on pci_kn20aa.c, written by Chris G. Demetriou at
      8  * Carnegie-Mellon University. Platform support for Mikasa and Mikasa/Pinnacle
      9  * (Pinkasa) by Ross Harvey with copyright assignment by permission of Avalon
     10  * Computer Systems, Inc.
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31  * POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 /*
     35  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
     36  * All rights reserved.
     37  *
     38  * Author: Chris G. Demetriou
     39  *
     40  * Permission to use, copy, modify and distribute this software and
     41  * its documentation is hereby granted, provided that both the copyright
     42  * notice and this permission notice appear in all copies of the
     43  * software, derivative works or modified versions, and any portions
     44  * thereof, and that both notices appear in supporting documentation.
     45  *
     46  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     47  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     48  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     49  *
     50  * Carnegie Mellon requests users of this software to return to
     51  *
     52  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     53  *  School of Computer Science
     54  *  Carnegie Mellon University
     55  *  Pittsburgh PA 15213-3890
     56  *
     57  * any improvements or extensions that they make and grant Carnegie the
     58  * rights to redistribute these changes.
     59  */
     60 
     61 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     62 
     63 __KERNEL_RCSID(0, "$NetBSD: pci_1000.c,v 1.19 2009/03/14 14:45:53 dsl Exp $");
     64 
     65 #include <sys/types.h>
     66 #include <sys/param.h>
     67 #include <sys/time.h>
     68 #include <sys/systm.h>
     69 #include <sys/errno.h>
     70 #include <sys/malloc.h>
     71 #include <sys/device.h>
     72 #include <sys/syslog.h>
     73 
     74 #include <uvm/uvm_extern.h>
     75 
     76 #include <machine/autoconf.h>
     77 
     78 #include <dev/pci/pcireg.h>
     79 #include <dev/pci/pcivar.h>
     80 
     81 #include <alpha/pci/pci_1000.h>
     82 
     83 #include "sio.h"
     84 #if NSIO > 0 || NPCEB > 0
     85 #include <alpha/pci/siovar.h>
     86 #endif
     87 
     88 static bus_space_tag_t another_mystery_icu_iot;
     89 static bus_space_handle_t another_mystery_icu_ioh;
     90 
     91 int	dec_1000_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
     92 const char *dec_1000_intr_string(void *, pci_intr_handle_t);
     93 const struct evcnt *dec_1000_intr_evcnt(void *, pci_intr_handle_t);
     94 void	*dec_1000_intr_establish(void *, pci_intr_handle_t,
     95 	    int, int (*func)(void *), void *);
     96 void	dec_1000_intr_disestablish(void *, void *);
     97 
     98 #define	PCI_NIRQ	16
     99 #define	PCI_STRAY_MAX	5
    100 
    101 struct alpha_shared_intr *dec_1000_pci_intr;
    102 
    103 static void dec_1000_iointr(void *arg, unsigned long vec);
    104 static void dec_1000_enable_intr(int irq);
    105 static void dec_1000_disable_intr(int irq);
    106 static void pci_1000_imi(void);
    107 static pci_chipset_tag_t pc_tag;
    108 
    109 void
    110 pci_1000_pickintr(core, iot, memt, pc)
    111 	void *core;
    112 	bus_space_tag_t iot, memt;
    113 	pci_chipset_tag_t pc;
    114 {
    115 	char *cp;
    116 	int i;
    117 
    118 	another_mystery_icu_iot = iot;
    119 
    120 	pc_tag = pc;
    121 	if (bus_space_map(iot, 0x536, 2, 0, &another_mystery_icu_ioh))
    122 		panic("pci_1000_pickintr");
    123         pc->pc_intr_v = core;
    124         pc->pc_intr_map = dec_1000_intr_map;
    125         pc->pc_intr_string = dec_1000_intr_string;
    126 	pc->pc_intr_evcnt = dec_1000_intr_evcnt;
    127         pc->pc_intr_establish = dec_1000_intr_establish;
    128         pc->pc_intr_disestablish = dec_1000_intr_disestablish;
    129 
    130 	pc->pc_pciide_compat_intr_establish = NULL;
    131 
    132 	dec_1000_pci_intr =
    133 	    alpha_shared_intr_alloc(PCI_NIRQ, 8);
    134 	for (i = 0; i < PCI_NIRQ; i++) {
    135 		alpha_shared_intr_set_maxstrays(dec_1000_pci_intr, i,
    136 		    PCI_STRAY_MAX);
    137 
    138 		cp = alpha_shared_intr_string(dec_1000_pci_intr, i);
    139 		sprintf(cp, "irq %d", i);
    140 		evcnt_attach_dynamic(alpha_shared_intr_evcnt(
    141 		    dec_1000_pci_intr, i), EVCNT_TYPE_INTR, NULL,
    142 		    "dec_1000", cp);
    143 	}
    144 
    145 	pci_1000_imi();
    146 #if NSIO > 0 || NPCEB > 0
    147 	sio_intr_setup(pc, iot);
    148 #endif
    149 }
    150 
    151 int
    152 dec_1000_intr_map(pa, ihp)
    153 	struct pci_attach_args *pa;
    154         pci_intr_handle_t *ihp;
    155 {
    156 	pcitag_t bustag = pa->pa_intrtag;
    157 	int buspin = pa->pa_intrpin;
    158 	pci_chipset_tag_t pc = pa->pa_pc;
    159 	int	device;
    160 
    161 	if (buspin == 0)	/* No IRQ used. */
    162 		return 1;
    163 	if (!(1 <= buspin && buspin <= 4))
    164 		goto bad;
    165 
    166 	pci_decompose_tag(pc, bustag, NULL, &device, NULL);
    167 
    168 	switch(device) {
    169 	case 6:
    170 		if(buspin != 1)
    171 			break;
    172 		*ihp = 0xc;		/* integrated ncr scsi */
    173 		return 0;
    174 	case 11:
    175 	case 12:
    176 	case 13:
    177 		*ihp = (device - 11) * 4 + buspin - 1;
    178 		return 0;
    179 	}
    180 
    181 bad:	printf("dec_1000_intr_map: can't map dev %d pin %d\n", device, buspin);
    182 	return 1;
    183 }
    184 
    185 const char *
    186 dec_1000_intr_string(ccv, ih)
    187 	void *ccv;
    188 	pci_intr_handle_t ih;
    189 {
    190 	static const char irqmsg_fmt[] = "dec_1000 irq %ld";
    191         static char irqstr[sizeof irqmsg_fmt];
    192 
    193         if (ih >= PCI_NIRQ)
    194                 panic("dec_1000_intr_string: bogus dec_1000 IRQ 0x%lx", ih);
    195 
    196         snprintf(irqstr, sizeof irqstr, irqmsg_fmt, ih);
    197         return (irqstr);
    198 }
    199 
    200 const struct evcnt *
    201 dec_1000_intr_evcnt(ccv, ih)
    202 	void *ccv;
    203 	pci_intr_handle_t ih;
    204 {
    205 
    206 	if (ih >= PCI_NIRQ)
    207 		panic("dec_1000_intr_evcnt: bogus dec_1000 IRQ 0x%lx", ih);
    208 
    209 	return (alpha_shared_intr_evcnt(dec_1000_pci_intr, ih));
    210 }
    211 
    212 void *
    213 dec_1000_intr_establish(ccv, ih, level, func, arg)
    214         void *ccv, *arg;
    215         pci_intr_handle_t ih;
    216         int level;
    217         int (*func)(void *);
    218 {
    219 	void *cookie;
    220 
    221         if (ih >= PCI_NIRQ)
    222                 panic("dec_1000_intr_establish: IRQ too high, 0x%lx", ih);
    223 
    224 	cookie = alpha_shared_intr_establish(dec_1000_pci_intr, ih, IST_LEVEL,
    225 	    level, func, arg, "dec_1000 irq");
    226 
    227 	if (cookie != NULL &&
    228 	    alpha_shared_intr_firstactive(dec_1000_pci_intr, ih)) {
    229 		scb_set(0x900 + SCB_IDXTOVEC(ih), dec_1000_iointr, NULL,
    230 		    level);
    231 		dec_1000_enable_intr(ih);
    232 	}
    233 	return (cookie);
    234 }
    235 
    236 void
    237 dec_1000_intr_disestablish(ccv, cookie)
    238         void *ccv, *cookie;
    239 {
    240 	struct alpha_shared_intrhand *ih = cookie;
    241 	unsigned int irq = ih->ih_num;
    242 	int s;
    243 
    244 	s = splhigh();
    245 
    246 	alpha_shared_intr_disestablish(dec_1000_pci_intr, cookie,
    247 	    "dec_1000 irq");
    248 	if (alpha_shared_intr_isactive(dec_1000_pci_intr, irq) == 0) {
    249 		dec_1000_disable_intr(irq);
    250 		alpha_shared_intr_set_dfltsharetype(dec_1000_pci_intr, irq,
    251 		    IST_NONE);
    252 		scb_free(0x900 + SCB_IDXTOVEC(irq));
    253 	}
    254 
    255 	splx(s);
    256 }
    257 
    258 static void
    259 dec_1000_iointr(arg, vec)
    260 	void *arg;
    261 	unsigned long vec;
    262 {
    263 	int irq;
    264 
    265 	irq = SCB_VECTOIDX(vec - 0x900);
    266 
    267 	if (!alpha_shared_intr_dispatch(dec_1000_pci_intr, irq)) {
    268 		alpha_shared_intr_stray(dec_1000_pci_intr, irq,
    269 		    "dec_1000 irq");
    270 		if (ALPHA_SHARED_INTR_DISABLE(dec_1000_pci_intr, irq))
    271 			dec_1000_disable_intr(irq);
    272 	} else
    273 		alpha_shared_intr_reset_strays(dec_1000_pci_intr, irq);
    274 }
    275 
    276 /*
    277  * Read and write the mystery ICU IMR registers
    278  */
    279 
    280 #define	IR() bus_space_read_2(another_mystery_icu_iot,		\
    281 				another_mystery_icu_ioh, 0)
    282 
    283 #define	IW(v) bus_space_write_2(another_mystery_icu_iot,	\
    284 				another_mystery_icu_ioh, 0, (v))
    285 
    286 /*
    287  * Enable and disable interrupts at the ICU level
    288  */
    289 
    290 static void
    291 dec_1000_enable_intr(irq)
    292 	int irq;
    293 {
    294 	IW(IR() | 1 << irq);
    295 }
    296 
    297 static void
    298 dec_1000_disable_intr(irq)
    299 	int irq;
    300 {
    301 	IW(IR() & ~(1 << irq));
    302 }
    303 /*
    304  * Initialize mystery ICU
    305  */
    306 static void
    307 pci_1000_imi()
    308 {
    309 	IW(0);					/* XXX ?? */
    310 }
    311