Home | History | Annotate | Line # | Download | only in pci
pci_1000.c revision 1.21
      1 /* $NetBSD: pci_1000.c,v 1.21 2009/03/14 21:04:02 dsl Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is based on pci_kn20aa.c, written by Chris G. Demetriou at
      8  * Carnegie-Mellon University. Platform support for Mikasa and Mikasa/Pinnacle
      9  * (Pinkasa) by Ross Harvey with copyright assignment by permission of Avalon
     10  * Computer Systems, Inc.
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31  * POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 /*
     35  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
     36  * All rights reserved.
     37  *
     38  * Author: Chris G. Demetriou
     39  *
     40  * Permission to use, copy, modify and distribute this software and
     41  * its documentation is hereby granted, provided that both the copyright
     42  * notice and this permission notice appear in all copies of the
     43  * software, derivative works or modified versions, and any portions
     44  * thereof, and that both notices appear in supporting documentation.
     45  *
     46  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     47  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     48  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     49  *
     50  * Carnegie Mellon requests users of this software to return to
     51  *
     52  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     53  *  School of Computer Science
     54  *  Carnegie Mellon University
     55  *  Pittsburgh PA 15213-3890
     56  *
     57  * any improvements or extensions that they make and grant Carnegie the
     58  * rights to redistribute these changes.
     59  */
     60 
     61 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     62 
     63 __KERNEL_RCSID(0, "$NetBSD: pci_1000.c,v 1.21 2009/03/14 21:04:02 dsl Exp $");
     64 
     65 #include <sys/types.h>
     66 #include <sys/param.h>
     67 #include <sys/time.h>
     68 #include <sys/systm.h>
     69 #include <sys/errno.h>
     70 #include <sys/malloc.h>
     71 #include <sys/device.h>
     72 #include <sys/syslog.h>
     73 
     74 #include <uvm/uvm_extern.h>
     75 
     76 #include <machine/autoconf.h>
     77 
     78 #include <dev/pci/pcireg.h>
     79 #include <dev/pci/pcivar.h>
     80 
     81 #include <alpha/pci/pci_1000.h>
     82 
     83 #include "sio.h"
     84 #if NSIO > 0 || NPCEB > 0
     85 #include <alpha/pci/siovar.h>
     86 #endif
     87 
     88 static bus_space_tag_t another_mystery_icu_iot;
     89 static bus_space_handle_t another_mystery_icu_ioh;
     90 
     91 int	dec_1000_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
     92 const char *dec_1000_intr_string(void *, pci_intr_handle_t);
     93 const struct evcnt *dec_1000_intr_evcnt(void *, pci_intr_handle_t);
     94 void	*dec_1000_intr_establish(void *, pci_intr_handle_t,
     95 	    int, int (*func)(void *), void *);
     96 void	dec_1000_intr_disestablish(void *, void *);
     97 
     98 #define	PCI_NIRQ	16
     99 #define	PCI_STRAY_MAX	5
    100 
    101 struct alpha_shared_intr *dec_1000_pci_intr;
    102 
    103 static void dec_1000_iointr(void *arg, unsigned long vec);
    104 static void dec_1000_enable_intr(int irq);
    105 static void dec_1000_disable_intr(int irq);
    106 static void pci_1000_imi(void);
    107 static pci_chipset_tag_t pc_tag;
    108 
    109 void
    110 pci_1000_pickintr(void *core, bus_space_tag_t iot, bus_space_tag_t memt, pci_chipset_tag_t pc)
    111 {
    112 	char *cp;
    113 	int i;
    114 
    115 	another_mystery_icu_iot = iot;
    116 
    117 	pc_tag = pc;
    118 	if (bus_space_map(iot, 0x536, 2, 0, &another_mystery_icu_ioh))
    119 		panic("pci_1000_pickintr");
    120         pc->pc_intr_v = core;
    121         pc->pc_intr_map = dec_1000_intr_map;
    122         pc->pc_intr_string = dec_1000_intr_string;
    123 	pc->pc_intr_evcnt = dec_1000_intr_evcnt;
    124         pc->pc_intr_establish = dec_1000_intr_establish;
    125         pc->pc_intr_disestablish = dec_1000_intr_disestablish;
    126 
    127 	pc->pc_pciide_compat_intr_establish = NULL;
    128 
    129 	dec_1000_pci_intr =
    130 	    alpha_shared_intr_alloc(PCI_NIRQ, 8);
    131 	for (i = 0; i < PCI_NIRQ; i++) {
    132 		alpha_shared_intr_set_maxstrays(dec_1000_pci_intr, i,
    133 		    PCI_STRAY_MAX);
    134 
    135 		cp = alpha_shared_intr_string(dec_1000_pci_intr, i);
    136 		sprintf(cp, "irq %d", i);
    137 		evcnt_attach_dynamic(alpha_shared_intr_evcnt(
    138 		    dec_1000_pci_intr, i), EVCNT_TYPE_INTR, NULL,
    139 		    "dec_1000", cp);
    140 	}
    141 
    142 	pci_1000_imi();
    143 #if NSIO > 0 || NPCEB > 0
    144 	sio_intr_setup(pc, iot);
    145 #endif
    146 }
    147 
    148 int
    149 dec_1000_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
    150 {
    151 	pcitag_t bustag = pa->pa_intrtag;
    152 	int buspin = pa->pa_intrpin;
    153 	pci_chipset_tag_t pc = pa->pa_pc;
    154 	int	device;
    155 
    156 	if (buspin == 0)	/* No IRQ used. */
    157 		return 1;
    158 	if (!(1 <= buspin && buspin <= 4))
    159 		goto bad;
    160 
    161 	pci_decompose_tag(pc, bustag, NULL, &device, NULL);
    162 
    163 	switch(device) {
    164 	case 6:
    165 		if(buspin != 1)
    166 			break;
    167 		*ihp = 0xc;		/* integrated ncr scsi */
    168 		return 0;
    169 	case 11:
    170 	case 12:
    171 	case 13:
    172 		*ihp = (device - 11) * 4 + buspin - 1;
    173 		return 0;
    174 	}
    175 
    176 bad:	printf("dec_1000_intr_map: can't map dev %d pin %d\n", device, buspin);
    177 	return 1;
    178 }
    179 
    180 const char *
    181 dec_1000_intr_string(void *ccv, pci_intr_handle_t ih)
    182 {
    183 	static const char irqmsg_fmt[] = "dec_1000 irq %ld";
    184         static char irqstr[sizeof irqmsg_fmt];
    185 
    186         if (ih >= PCI_NIRQ)
    187                 panic("dec_1000_intr_string: bogus dec_1000 IRQ 0x%lx", ih);
    188 
    189         snprintf(irqstr, sizeof irqstr, irqmsg_fmt, ih);
    190         return (irqstr);
    191 }
    192 
    193 const struct evcnt *
    194 dec_1000_intr_evcnt(void *ccv, pci_intr_handle_t ih)
    195 {
    196 
    197 	if (ih >= PCI_NIRQ)
    198 		panic("dec_1000_intr_evcnt: bogus dec_1000 IRQ 0x%lx", ih);
    199 
    200 	return (alpha_shared_intr_evcnt(dec_1000_pci_intr, ih));
    201 }
    202 
    203 void *
    204 dec_1000_intr_establish(ccv, ih, level, func, arg)
    205         void *ccv, *arg;
    206         pci_intr_handle_t ih;
    207         int level;
    208         int (*func)(void *);
    209 {
    210 	void *cookie;
    211 
    212         if (ih >= PCI_NIRQ)
    213                 panic("dec_1000_intr_establish: IRQ too high, 0x%lx", ih);
    214 
    215 	cookie = alpha_shared_intr_establish(dec_1000_pci_intr, ih, IST_LEVEL,
    216 	    level, func, arg, "dec_1000 irq");
    217 
    218 	if (cookie != NULL &&
    219 	    alpha_shared_intr_firstactive(dec_1000_pci_intr, ih)) {
    220 		scb_set(0x900 + SCB_IDXTOVEC(ih), dec_1000_iointr, NULL,
    221 		    level);
    222 		dec_1000_enable_intr(ih);
    223 	}
    224 	return (cookie);
    225 }
    226 
    227 void
    228 dec_1000_intr_disestablish(void *ccv, void *cookie)
    229 {
    230 	struct alpha_shared_intrhand *ih = cookie;
    231 	unsigned int irq = ih->ih_num;
    232 	int s;
    233 
    234 	s = splhigh();
    235 
    236 	alpha_shared_intr_disestablish(dec_1000_pci_intr, cookie,
    237 	    "dec_1000 irq");
    238 	if (alpha_shared_intr_isactive(dec_1000_pci_intr, irq) == 0) {
    239 		dec_1000_disable_intr(irq);
    240 		alpha_shared_intr_set_dfltsharetype(dec_1000_pci_intr, irq,
    241 		    IST_NONE);
    242 		scb_free(0x900 + SCB_IDXTOVEC(irq));
    243 	}
    244 
    245 	splx(s);
    246 }
    247 
    248 static void
    249 dec_1000_iointr(void *arg, unsigned long vec)
    250 {
    251 	int irq;
    252 
    253 	irq = SCB_VECTOIDX(vec - 0x900);
    254 
    255 	if (!alpha_shared_intr_dispatch(dec_1000_pci_intr, irq)) {
    256 		alpha_shared_intr_stray(dec_1000_pci_intr, irq,
    257 		    "dec_1000 irq");
    258 		if (ALPHA_SHARED_INTR_DISABLE(dec_1000_pci_intr, irq))
    259 			dec_1000_disable_intr(irq);
    260 	} else
    261 		alpha_shared_intr_reset_strays(dec_1000_pci_intr, irq);
    262 }
    263 
    264 /*
    265  * Read and write the mystery ICU IMR registers
    266  */
    267 
    268 #define	IR() bus_space_read_2(another_mystery_icu_iot,		\
    269 				another_mystery_icu_ioh, 0)
    270 
    271 #define	IW(v) bus_space_write_2(another_mystery_icu_iot,	\
    272 				another_mystery_icu_ioh, 0, (v))
    273 
    274 /*
    275  * Enable and disable interrupts at the ICU level
    276  */
    277 
    278 static void
    279 dec_1000_enable_intr(int irq)
    280 {
    281 	IW(IR() | 1 << irq);
    282 }
    283 
    284 static void
    285 dec_1000_disable_intr(int irq)
    286 {
    287 	IW(IR() & ~(1 << irq));
    288 }
    289 /*
    290  * Initialize mystery ICU
    291  */
    292 static void
    293 pci_1000_imi()
    294 {
    295 	IW(0);					/* XXX ?? */
    296 }
    297