pci_1000.c revision 1.29
1 /* $NetBSD: pci_1000.c,v 1.29 2021/06/25 18:08:34 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is based on pci_kn20aa.c, written by Chris G. Demetriou at 8 * Carnegie-Mellon University. Platform support for Mikasa and Mikasa/Pinnacle 9 * (Pinkasa) by Ross Harvey with copyright assignment by permission of Avalon 10 * Computer Systems, Inc. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 36 * All rights reserved. 37 * 38 * Author: Chris G. Demetriou 39 * 40 * Permission to use, copy, modify and distribute this software and 41 * its documentation is hereby granted, provided that both the copyright 42 * notice and this permission notice appear in all copies of the 43 * software, derivative works or modified versions, and any portions 44 * thereof, and that both notices appear in supporting documentation. 45 * 46 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 47 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 48 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 49 * 50 * Carnegie Mellon requests users of this software to return to 51 * 52 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 53 * School of Computer Science 54 * Carnegie Mellon University 55 * Pittsburgh PA 15213-3890 56 * 57 * any improvements or extensions that they make and grant Carnegie the 58 * rights to redistribute these changes. 59 */ 60 61 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 62 63 __KERNEL_RCSID(0, "$NetBSD: pci_1000.c,v 1.29 2021/06/25 18:08:34 thorpej Exp $"); 64 65 #include <sys/types.h> 66 #include <sys/param.h> 67 #include <sys/time.h> 68 #include <sys/systm.h> 69 #include <sys/errno.h> 70 #include <sys/malloc.h> 71 #include <sys/device.h> 72 #include <sys/syslog.h> 73 74 #include <machine/autoconf.h> 75 #include <machine/rpb.h> 76 77 #include <dev/pci/pcireg.h> 78 #include <dev/pci/pcivar.h> 79 80 #include "sio.h" 81 #if NSIO > 0 || NPCEB > 0 82 #include <alpha/pci/siovar.h> 83 #endif 84 85 static bus_space_tag_t another_mystery_icu_iot; 86 static bus_space_handle_t another_mystery_icu_ioh; 87 88 static int dec_1000_intr_map(const struct pci_attach_args *, 89 pci_intr_handle_t *); 90 91 #define PCI_NIRQ 16 92 #define PCI_STRAY_MAX 5 93 94 static void dec_1000_enable_intr(pci_chipset_tag_t, int irq); 95 static void dec_1000_disable_intr(pci_chipset_tag_t, int irq); 96 static void pci_1000_imi(void); 97 98 static void 99 pci_1000_pickintr(void *core, bus_space_tag_t iot, bus_space_tag_t memt, 100 pci_chipset_tag_t pc) 101 { 102 char *cp; 103 int i; 104 105 another_mystery_icu_iot = iot; 106 107 if (bus_space_map(iot, 0x536, 2, 0, &another_mystery_icu_ioh)) 108 panic("pci_1000_pickintr"); 109 110 pc->pc_intr_v = core; 111 pc->pc_intr_map = dec_1000_intr_map; 112 pc->pc_intr_string = alpha_pci_generic_intr_string; 113 pc->pc_intr_evcnt = alpha_pci_generic_intr_evcnt; 114 pc->pc_intr_establish = alpha_pci_generic_intr_establish; 115 pc->pc_intr_disestablish = alpha_pci_generic_intr_disestablish; 116 117 pc->pc_pciide_compat_intr_establish = NULL; 118 119 #define PCI_1000_IRQ_STR 8 120 pc->pc_shared_intrs = 121 alpha_shared_intr_alloc(PCI_NIRQ, PCI_1000_IRQ_STR); 122 pc->pc_intr_desc = "dec 1000"; 123 pc->pc_vecbase = 0x900; 124 pc->pc_nirq = PCI_NIRQ; 125 126 pc->pc_intr_enable = dec_1000_enable_intr; 127 pc->pc_intr_disable = dec_1000_disable_intr; 128 129 for (i = 0; i < PCI_NIRQ; i++) { 130 alpha_shared_intr_set_maxstrays(pc->pc_shared_intrs, i, 131 PCI_STRAY_MAX); 132 133 cp = alpha_shared_intr_string(pc->pc_shared_intrs, i); 134 snprintf(cp, PCI_1000_IRQ_STR, "irq %d", i); 135 evcnt_attach_dynamic(alpha_shared_intr_evcnt( 136 pc->pc_shared_intrs, i), EVCNT_TYPE_INTR, NULL, 137 pc->pc_intr_desc, cp); 138 } 139 140 pci_1000_imi(); 141 #if NSIO > 0 || NPCEB > 0 142 sio_intr_setup(pc, iot); 143 #endif 144 } 145 ALPHA_PCI_INTR_INIT(ST_DEC_1000, pci_1000_pickintr) 146 147 static int 148 dec_1000_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 149 { 150 pcitag_t bustag = pa->pa_intrtag; 151 int buspin = pa->pa_intrpin; 152 pci_chipset_tag_t pc = pa->pa_pc; 153 int device = 0; /* XXX gcc */ 154 155 if (buspin == 0) /* No IRQ used. */ 156 return 1; 157 if (!(1 <= buspin && buspin <= 4)) 158 goto bad; 159 160 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 161 162 switch(device) { 163 case 6: 164 if(buspin != 1) 165 break; 166 /* integrated ncr scsi */ 167 alpha_pci_intr_handle_init(ihp, 0xc, 0); 168 return 0; 169 case 11: 170 case 12: 171 case 13: 172 alpha_pci_intr_handle_init(ihp, 173 (device - 11) * 4 + buspin - 1, 0); 174 return 0; 175 } 176 177 bad: printf("dec_1000_intr_map: can't map dev %d pin %d\n", device, buspin); 178 return 1; 179 } 180 181 /* 182 * Read and write the mystery ICU IMR registers 183 */ 184 185 #define IR() bus_space_read_2(another_mystery_icu_iot, \ 186 another_mystery_icu_ioh, 0) 187 188 #define IW(v) bus_space_write_2(another_mystery_icu_iot, \ 189 another_mystery_icu_ioh, 0, (v)) 190 191 /* 192 * Enable and disable interrupts at the ICU level 193 */ 194 195 static void 196 dec_1000_enable_intr(pci_chipset_tag_t pc __unused, int irq) 197 { 198 IW(IR() | 1 << irq); 199 } 200 201 static void 202 dec_1000_disable_intr(pci_chipset_tag_t pc __unused, int irq) 203 { 204 IW(IR() & ~(1 << irq)); 205 } 206 207 /* 208 * Initialize mystery ICU 209 */ 210 static void 211 pci_1000_imi(void) 212 { 213 IW(0); /* XXX ?? */ 214 } 215
Indexes created Mon Sep 29 21:09:56 GMT 2025