pci_1000.c revision 1.6
1 /* $NetBSD: pci_1000.c,v 1.6 1999/06/29 17:10:57 ross Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is based on pci_kn20aa.c, written by Chris G. Demetriou at 8 * Carnegie-Mellon University. Platform support for Mikasa and Mikasa/Pinnacle 9 * (Pinkasa) by Ross Harvey with copyright assignment by permission of Avalon 10 * Computer Systems, Inc. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 43 * All rights reserved. 44 * 45 * Author: Chris G. Demetriou 46 * 47 * Permission to use, copy, modify and distribute this software and 48 * its documentation is hereby granted, provided that both the copyright 49 * notice and this permission notice appear in all copies of the 50 * software, derivative works or modified versions, and any portions 51 * thereof, and that both notices appear in supporting documentation. 52 * 53 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 54 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 55 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 56 * 57 * Carnegie Mellon requests users of this software to return to 58 * 59 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 60 * School of Computer Science 61 * Carnegie Mellon University 62 * Pittsburgh PA 15213-3890 63 * 64 * any improvements or extensions that they make and grant Carnegie the 65 * rights to redistribute these changes. 66 */ 67 68 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 69 70 __KERNEL_RCSID(0, "$NetBSD: pci_1000.c,v 1.6 1999/06/29 17:10:57 ross Exp $"); 71 72 #include <sys/types.h> 73 #include <sys/param.h> 74 #include <sys/time.h> 75 #include <sys/systm.h> 76 #include <sys/errno.h> 77 #include <sys/malloc.h> 78 #include <sys/device.h> 79 #include <sys/syslog.h> 80 81 #include <vm/vm.h> 82 83 #include <machine/autoconf.h> 84 85 #include <dev/pci/pcireg.h> 86 #include <dev/pci/pcivar.h> 87 88 #include <alpha/pci/pci_1000.h> 89 90 #include <machine/intrcnt.h> 91 92 #include "sio.h" 93 #if NSIO 94 #include <alpha/pci/siovar.h> 95 #endif 96 97 static bus_space_tag_t another_mystery_icu_iot; 98 static bus_space_handle_t another_mystery_icu_ioh; 99 100 int dec_1000_intr_map __P((void *, pcitag_t, int, int, pci_intr_handle_t *)); 101 const char *dec_1000_intr_string __P((void *, pci_intr_handle_t)); 102 void *dec_1000_intr_establish __P((void *, pci_intr_handle_t, 103 int, int (*func)(void *), void *)); 104 void dec_1000_intr_disestablish __P((void *, void *)); 105 106 #define PCI_STRAY_MAX 5 107 108 struct alpha_shared_intr *dec_1000_pci_intr; 109 110 static void dec_1000_iointr __P((void *framep, unsigned long vec)); 111 static void dec_1000_enable_intr __P((int irq)); 112 static void dec_1000_disable_intr __P((int irq)); 113 static void pci_1000_imi __P((void)); 114 static pci_chipset_tag_t pc_tag; 115 116 void 117 pci_1000_pickintr(core, iot, memt, pc) 118 void *core; 119 bus_space_tag_t iot, memt; 120 pci_chipset_tag_t pc; 121 { 122 int i; 123 124 another_mystery_icu_iot = iot; 125 126 pc_tag = pc; 127 if (bus_space_map(iot, 0x536, 2, 0, &another_mystery_icu_ioh)) 128 panic("pci_1000_pickintr"); 129 pc->pc_intr_v = core; 130 pc->pc_intr_map = dec_1000_intr_map; 131 pc->pc_intr_string = dec_1000_intr_string; 132 pc->pc_intr_establish = dec_1000_intr_establish; 133 pc->pc_intr_disestablish = dec_1000_intr_disestablish; 134 135 pc->pc_pciide_compat_intr_establish = NULL; 136 137 dec_1000_pci_intr = alpha_shared_intr_alloc(INTRCNT_DEC_1000_IRQ_LEN); 138 for (i = 0; i < INTRCNT_DEC_1000_IRQ_LEN; i++) 139 alpha_shared_intr_set_maxstrays(dec_1000_pci_intr, i, 140 PCI_STRAY_MAX); 141 142 pci_1000_imi(); 143 #if NSIO 144 sio_intr_setup(pc, iot); 145 #endif 146 set_iointr(dec_1000_iointr); 147 } 148 149 int 150 dec_1000_intr_map(ccv, bustag, buspin, line, ihp) 151 void *ccv; 152 pcitag_t bustag; 153 int buspin, line; 154 pci_intr_handle_t *ihp; 155 { 156 int device; 157 158 if (buspin == 0) /* No IRQ used. */ 159 return 1; 160 if (!(1 <= buspin && buspin <= 4)) 161 goto bad; 162 163 alpha_pci_decompose_tag(pc_tag, bustag, NULL, &device, NULL); 164 165 switch(device) { 166 case 6: 167 if(buspin != 1) 168 break; 169 *ihp = 0xc; /* integrated ncr scsi */ 170 return 0; 171 case 11: 172 case 12: 173 case 13: 174 *ihp = (device - 11) * 4 + buspin - 1; 175 return 0; 176 } 177 178 bad: printf("dec_1000_intr_map: can't map dev %d pin %d\n", device, buspin); 179 return 1; 180 } 181 182 const char * 183 dec_1000_intr_string(ccv, ih) 184 void *ccv; 185 pci_intr_handle_t ih; 186 { 187 static const char irqmsg_fmt[] = "dec_1000 irq %ld"; 188 static char irqstr[sizeof irqmsg_fmt]; 189 190 if (ih >= INTRCNT_DEC_1000_IRQ_LEN) 191 panic("dec_1000_intr_string: bogus dec_1000 IRQ 0x%lx\n", ih); 192 193 snprintf(irqstr, sizeof irqstr, irqmsg_fmt, ih); 194 return (irqstr); 195 } 196 197 void * 198 dec_1000_intr_establish(ccv, ih, level, func, arg) 199 void *ccv, *arg; 200 pci_intr_handle_t ih; 201 int level; 202 int (*func) __P((void *)); 203 { 204 void *cookie; 205 206 if (ih >= INTRCNT_DEC_1000_IRQ_LEN) 207 panic("dec_1000_intr_establish: IRQ too high, 0x%lx\n", ih); 208 209 cookie = alpha_shared_intr_establish(dec_1000_pci_intr, ih, IST_LEVEL, 210 level, func, arg, "dec_1000 irq"); 211 212 if (cookie != NULL && 213 alpha_shared_intr_isactive(dec_1000_pci_intr, ih)) 214 dec_1000_enable_intr(ih); 215 return (cookie); 216 } 217 218 void 219 dec_1000_intr_disestablish(ccv, cookie) 220 void *ccv, *cookie; 221 { 222 struct alpha_shared_intrhand *ih = cookie; 223 unsigned int irq = ih->ih_num; 224 int s; 225 226 s = splhigh(); 227 228 alpha_shared_intr_disestablish(dec_1000_pci_intr, cookie, 229 "dec_1000 irq"); 230 if (alpha_shared_intr_isactive(dec_1000_pci_intr, irq) == 0) { 231 dec_1000_disable_intr(irq); 232 alpha_shared_intr_set_dfltsharetype(dec_1000_pci_intr, irq, 233 IST_NONE); 234 } 235 236 splx(s); 237 } 238 239 static void 240 dec_1000_iointr(framep, vec) 241 void *framep; 242 unsigned long vec; 243 { 244 int irq; 245 246 if (vec >= 0x900) { 247 if (vec >= 0x900 + (INTRCNT_DEC_1000_IRQ_LEN << 4)) 248 panic("dec_1000_iointr: vec 0x%lx out of range\n", vec); 249 irq = (vec - 0x900) >> 4; 250 251 intrcnt[INTRCNT_DEC_1000_IRQ + irq]++; 252 253 if (!alpha_shared_intr_dispatch(dec_1000_pci_intr, irq)) { 254 alpha_shared_intr_stray(dec_1000_pci_intr, irq, 255 "dec_1000 irq"); 256 if (ALPHA_SHARED_INTR_DISABLE(dec_1000_pci_intr, irq)) 257 dec_1000_disable_intr(irq); 258 } 259 return; 260 } 261 #if NSIO 262 if (vec >= 0x800) { 263 sio_iointr(framep, vec); 264 return; 265 } 266 #endif 267 panic("dec_1000_iointr: weird vec 0x%lx\n", vec); 268 } 269 270 /* 271 * Read and write the mystery ICU IMR registers 272 */ 273 274 #define IR() bus_space_read_2(another_mystery_icu_iot, \ 275 another_mystery_icu_ioh, 0) 276 277 #define IW(v) bus_space_write_2(another_mystery_icu_iot, \ 278 another_mystery_icu_ioh, 0, (v)) 279 280 /* 281 * Enable and disable interrupts at the ICU level 282 */ 283 284 static void 285 dec_1000_enable_intr(irq) 286 int irq; 287 { 288 IW(IR() | 1 << irq); 289 } 290 291 static void 292 dec_1000_disable_intr(irq) 293 int irq; 294 { 295 IW(IR() & ~(1 << irq)); 296 } 297 /* 298 * Initialize mystery ICU 299 */ 300 static void 301 pci_1000_imi() 302 { 303 IW(0); /* XXX ?? */ 304 } 305
Indexes created Mon Sep 29 03:10:08 GMT 2025