pci_eb164.c revision 1.4 1 1.4 cgd /* $NetBSD: pci_eb164.c,v 1.4 1996/11/25 03:47:05 cgd Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.1 cgd * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 1.1 cgd * All rights reserved.
6 1.1 cgd *
7 1.1 cgd * Author: Chris G. Demetriou
8 1.1 cgd *
9 1.1 cgd * Permission to use, copy, modify and distribute this software and
10 1.1 cgd * its documentation is hereby granted, provided that both the copyright
11 1.1 cgd * notice and this permission notice appear in all copies of the
12 1.1 cgd * software, derivative works or modified versions, and any portions
13 1.1 cgd * thereof, and that both notices appear in supporting documentation.
14 1.1 cgd *
15 1.1 cgd * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.1 cgd * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.1 cgd *
19 1.1 cgd * Carnegie Mellon requests users of this software to return to
20 1.1 cgd *
21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1 cgd * School of Computer Science
23 1.1 cgd * Carnegie Mellon University
24 1.1 cgd * Pittsburgh PA 15213-3890
25 1.1 cgd *
26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the
27 1.1 cgd * rights to redistribute these changes.
28 1.1 cgd */
29 1.1 cgd
30 1.1 cgd #include <sys/types.h>
31 1.1 cgd #include <sys/param.h>
32 1.1 cgd #include <sys/time.h>
33 1.1 cgd #include <sys/systm.h>
34 1.1 cgd #include <sys/errno.h>
35 1.1 cgd #include <sys/malloc.h>
36 1.1 cgd #include <sys/device.h>
37 1.1 cgd #include <sys/syslog.h>
38 1.1 cgd
39 1.1 cgd #include <vm/vm.h>
40 1.1 cgd
41 1.1 cgd #include <machine/autoconf.h>
42 1.1 cgd
43 1.1 cgd #include <dev/pci/pcireg.h>
44 1.1 cgd #include <dev/pci/pcivar.h>
45 1.1 cgd
46 1.1 cgd #include <alpha/pci/ciareg.h>
47 1.1 cgd #include <alpha/pci/ciavar.h>
48 1.1 cgd
49 1.1 cgd #include <alpha/pci/pci_eb164.h>
50 1.1 cgd
51 1.1 cgd #ifndef EVCNT_COUNTERS
52 1.1 cgd #include <machine/intrcnt.h>
53 1.1 cgd #endif
54 1.1 cgd
55 1.1 cgd #include "sio.h"
56 1.1 cgd #if NSIO
57 1.1 cgd #include <alpha/pci/siovar.h>
58 1.1 cgd #endif
59 1.1 cgd
60 1.1 cgd int dec_eb164_intr_map __P((void *, pcitag_t, int, int,
61 1.1 cgd pci_intr_handle_t *));
62 1.1 cgd const char *dec_eb164_intr_string __P((void *, pci_intr_handle_t));
63 1.1 cgd void *dec_eb164_intr_establish __P((void *, pci_intr_handle_t,
64 1.1 cgd int, int (*func)(void *), void *));
65 1.1 cgd void dec_eb164_intr_disestablish __P((void *, void *));
66 1.1 cgd
67 1.3 cgd #define EB164_SIO_IRQ 4
68 1.3 cgd #define EB164_MAX_IRQ 24
69 1.3 cgd #define PCI_STRAY_MAX 5
70 1.3 cgd
71 1.3 cgd struct alpha_shared_intr *eb164_pci_intr;
72 1.3 cgd #ifdef EVCNT_COUNTERS
73 1.3 cgd struct evcnt eb164_intr_evcnt;
74 1.3 cgd #endif
75 1.3 cgd
76 1.3 cgd bus_space_tag_t eb164_intrgate_iot;
77 1.3 cgd bus_space_handle_t eb164_intrgate_ioh;
78 1.3 cgd
79 1.1 cgd void eb164_iointr __P((void *framep, unsigned long vec));
80 1.4 cgd extern void eb164_intr_enable __P((int irq)); /* pci_eb164_intr.S */
81 1.4 cgd extern void eb164_intr_disable __P((int irq)); /* pci_eb164_intr.S */
82 1.1 cgd
83 1.1 cgd void
84 1.1 cgd pci_eb164_pickintr(ccp)
85 1.1 cgd struct cia_config *ccp;
86 1.1 cgd {
87 1.1 cgd bus_space_tag_t iot = ccp->cc_iot;
88 1.1 cgd pci_chipset_tag_t pc = &ccp->cc_pc;
89 1.3 cgd int i;
90 1.1 cgd
91 1.1 cgd pc->pc_intr_v = ccp;
92 1.1 cgd pc->pc_intr_map = dec_eb164_intr_map;
93 1.1 cgd pc->pc_intr_string = dec_eb164_intr_string;
94 1.1 cgd pc->pc_intr_establish = dec_eb164_intr_establish;
95 1.1 cgd pc->pc_intr_disestablish = dec_eb164_intr_disestablish;
96 1.1 cgd
97 1.3 cgd eb164_intrgate_iot = iot;
98 1.3 cgd if (bus_space_map(eb164_intrgate_iot, 0x804, 3, 0,
99 1.3 cgd &eb164_intrgate_ioh) != 0)
100 1.3 cgd panic("pci_eb164_pickintr: couldn't map interrupt PLD");
101 1.3 cgd for (i = 0; i < EB164_MAX_IRQ; i++)
102 1.4 cgd eb164_intr_disable(i);
103 1.3 cgd
104 1.3 cgd eb164_pci_intr = alpha_shared_intr_alloc(EB164_MAX_IRQ);
105 1.3 cgd for (i = 0; i < EB164_MAX_IRQ; i++)
106 1.3 cgd alpha_shared_intr_set_maxstrays(eb164_pci_intr, i,
107 1.3 cgd PCI_STRAY_MAX);
108 1.3 cgd
109 1.1 cgd #if NSIO
110 1.1 cgd sio_intr_setup(iot);
111 1.4 cgd eb164_intr_enable(EB164_SIO_IRQ);
112 1.1 cgd #endif
113 1.1 cgd
114 1.1 cgd set_iointr(eb164_iointr);
115 1.1 cgd }
116 1.1 cgd
117 1.1 cgd int
118 1.1 cgd dec_eb164_intr_map(ccv, bustag, buspin, line, ihp)
119 1.1 cgd void *ccv;
120 1.1 cgd pcitag_t bustag;
121 1.1 cgd int buspin, line;
122 1.1 cgd pci_intr_handle_t *ihp;
123 1.1 cgd {
124 1.1 cgd struct cia_config *ccp = ccv;
125 1.1 cgd pci_chipset_tag_t pc = &ccp->cc_pc;
126 1.1 cgd int device;
127 1.3 cgd int eb164_irq, pinbase, pinoff;
128 1.1 cgd
129 1.1 cgd if (buspin == 0) {
130 1.1 cgd /* No IRQ used. */
131 1.1 cgd return 1;
132 1.1 cgd }
133 1.1 cgd if (buspin > 4) {
134 1.1 cgd printf("pci_map_int: bad interrupt pin %d\n", buspin);
135 1.1 cgd return 1;
136 1.1 cgd }
137 1.1 cgd
138 1.1 cgd pci_decompose_tag(pc, bustag, NULL, &device, NULL);
139 1.1 cgd switch (device) {
140 1.3 cgd #if 0 /* THIS CODE SHOULD NEVER BE CALLED FOR THE SIO */
141 1.3 cgd case 8: /* SIO */
142 1.3 cgd eb164_irq = 4;
143 1.3 cgd break;
144 1.3 cgd #endif
145 1.3 cgd
146 1.1 cgd case 11:
147 1.3 cgd eb164_irq = 5; /* IDE */
148 1.1 cgd break;
149 1.1 cgd
150 1.4 cgd case 5:
151 1.3 cgd case 6:
152 1.1 cgd case 7:
153 1.1 cgd case 9:
154 1.3 cgd switch (buspin) {
155 1.3 cgd case 1:
156 1.3 cgd pinbase = 0;
157 1.3 cgd break;
158 1.3 cgd case 2:
159 1.3 cgd case 3:
160 1.3 cgd case 4:
161 1.3 cgd pinbase = (buspin * 4) - 1;
162 1.3 cgd break;
163 1.3 cgd #ifdef DIAGNOSTIC
164 1.3 cgd default:
165 1.3 cgd panic("dec_eb164_intr_map: slot buspin switch");
166 1.3 cgd #endif
167 1.3 cgd };
168 1.3 cgd switch (device) {
169 1.3 cgd case 5:
170 1.3 cgd pinoff = 2;
171 1.3 cgd break;
172 1.3 cgd
173 1.3 cgd case 6:
174 1.3 cgd case 7:
175 1.3 cgd case 9:
176 1.3 cgd pinoff = device - 6;
177 1.3 cgd break;
178 1.3 cgd #ifdef DIAGNOSTIC
179 1.3 cgd default:
180 1.3 cgd panic("dec_eb164_intr_map: slot device switch");
181 1.3 cgd #endif
182 1.3 cgd }
183 1.3 cgd eb164_irq = pinoff + pinbase;
184 1.1 cgd break;
185 1.1 cgd default:
186 1.1 cgd panic("pci_eb164_map_int: invalid device number %d\n",
187 1.1 cgd device);
188 1.1 cgd }
189 1.1 cgd
190 1.3 cgd if (eb164_irq > EB164_MAX_IRQ)
191 1.1 cgd panic("pci_eb164_map_int: eb164_irq too large (%d)\n",
192 1.1 cgd eb164_irq);
193 1.1 cgd
194 1.1 cgd *ihp = eb164_irq;
195 1.1 cgd return (0);
196 1.1 cgd }
197 1.1 cgd
198 1.1 cgd const char *
199 1.1 cgd dec_eb164_intr_string(ccv, ih)
200 1.1 cgd void *ccv;
201 1.1 cgd pci_intr_handle_t ih;
202 1.1 cgd {
203 1.2 cgd #if 0
204 1.1 cgd struct cia_config *ccp = ccv;
205 1.2 cgd #endif
206 1.1 cgd static char irqstr[15]; /* 11 + 2 + NULL + sanity */
207 1.1 cgd
208 1.3 cgd if (ih > EB164_MAX_IRQ)
209 1.3 cgd panic("dec_eb164_intr_string: bogus eb164 IRQ 0x%x\n", ih);
210 1.1 cgd sprintf(irqstr, "eb164 irq %d", ih);
211 1.1 cgd return (irqstr);
212 1.1 cgd }
213 1.1 cgd
214 1.1 cgd void *
215 1.1 cgd dec_eb164_intr_establish(ccv, ih, level, func, arg)
216 1.1 cgd void *ccv, *arg;
217 1.1 cgd pci_intr_handle_t ih;
218 1.1 cgd int level;
219 1.1 cgd int (*func) __P((void *));
220 1.1 cgd {
221 1.3 cgd #if 0
222 1.3 cgd struct cia_config *ccp = ccv;
223 1.3 cgd #endif
224 1.3 cgd void *cookie;
225 1.1 cgd
226 1.3 cgd if (ih > EB164_MAX_IRQ)
227 1.3 cgd panic("dec_eb164_intr_establish: bogus eb164 IRQ 0x%x\n", ih);
228 1.1 cgd
229 1.3 cgd cookie = alpha_shared_intr_establish(eb164_pci_intr, ih, IST_LEVEL,
230 1.3 cgd level, func, arg, "eb164 irq");
231 1.1 cgd
232 1.3 cgd if (cookie != NULL && alpha_shared_intr_isactive(eb164_pci_intr, ih))
233 1.4 cgd eb164_intr_enable(ih);
234 1.1 cgd return (cookie);
235 1.1 cgd }
236 1.1 cgd
237 1.3 cgd void
238 1.1 cgd dec_eb164_intr_disestablish(ccv, cookie)
239 1.1 cgd void *ccv, *cookie;
240 1.1 cgd {
241 1.3 cgd #if 0
242 1.3 cgd struct cia_config *ccp = ccv;
243 1.3 cgd #endif
244 1.1 cgd
245 1.1 cgd panic("dec_eb164_intr_disestablish not implemented"); /* XXX */
246 1.1 cgd }
247 1.1 cgd
248 1.1 cgd void
249 1.1 cgd eb164_iointr(framep, vec)
250 1.1 cgd void *framep;
251 1.1 cgd unsigned long vec;
252 1.1 cgd {
253 1.3 cgd int irq;
254 1.3 cgd
255 1.3 cgd if (vec >= 0x900) {
256 1.3 cgd if (vec >= 0x900 + (EB164_MAX_IRQ << 4))
257 1.3 cgd panic("eb164_iointr: vec 0x%x out of range\n", vec);
258 1.3 cgd irq = (vec - 0x900) >> 4;
259 1.3 cgd
260 1.3 cgd #ifdef EVCNT_COUNTERS
261 1.3 cgd eb164_intr_evcnt.ev_count++;
262 1.3 cgd #else
263 1.3 cgd if (EB164_MAX_IRQ != INTRCNT_EB164_IRQ_LEN)
264 1.3 cgd panic("eb164 interrupt counter sizes inconsistent");
265 1.3 cgd intrcnt[INTRCNT_EB164_IRQ + irq]++;
266 1.3 cgd #endif
267 1.1 cgd
268 1.3 cgd if (!alpha_shared_intr_dispatch(eb164_pci_intr, irq)) {
269 1.3 cgd alpha_shared_intr_stray(eb164_pci_intr, irq,
270 1.3 cgd "eb164 irq");
271 1.3 cgd if (eb164_pci_intr[irq].intr_nstrays ==
272 1.3 cgd eb164_pci_intr[irq].intr_maxstrays)
273 1.4 cgd eb164_intr_disable(irq);
274 1.3 cgd }
275 1.3 cgd return;
276 1.3 cgd }
277 1.3 cgd #if NSIO
278 1.3 cgd if (vec >= 0x800) {
279 1.3 cgd sio_iointr(framep, vec);
280 1.3 cgd return;
281 1.3 cgd }
282 1.3 cgd #endif
283 1.1 cgd panic("eb164_iointr: weird vec 0x%x\n", vec);
284 1.3 cgd }
285 1.3 cgd
286 1.4 cgd #if 0 /* THIS DOES NOT WORK! see pci_eb164_intr.S. */
287 1.3 cgd u_int8_t eb164_intr_mask[3] = { 0xff, 0xff, 0xff };
288 1.3 cgd
289 1.3 cgd void
290 1.4 cgd eb164_intr_enable(irq)
291 1.3 cgd int irq;
292 1.3 cgd {
293 1.3 cgd int byte = (irq / 8), bit = (irq % 8);
294 1.3 cgd
295 1.3 cgd #if 1
296 1.4 cgd printf("eb164_intr_enable: enabling %d (%d:%d)\n", irq, byte, bit);
297 1.3 cgd #endif
298 1.3 cgd eb164_intr_mask[byte] &= ~(1 << bit);
299 1.3 cgd
300 1.3 cgd bus_space_write_1(eb164_intrgate_iot, eb164_intrgate_ioh, byte,
301 1.3 cgd eb164_intr_mask[byte]);
302 1.3 cgd }
303 1.3 cgd
304 1.3 cgd void
305 1.4 cgd eb164_intr_disable(irq)
306 1.3 cgd int irq;
307 1.3 cgd {
308 1.3 cgd int byte = (irq / 8), bit = (irq % 8);
309 1.3 cgd
310 1.3 cgd #if 1
311 1.4 cgd printf("eb164_intr_disable: disabling %d (%d:%d)\n", irq, byte, bit);
312 1.3 cgd #endif
313 1.3 cgd eb164_intr_mask[byte] |= (1 << bit);
314 1.3 cgd
315 1.3 cgd bus_space_write_1(eb164_intrgate_iot, eb164_intrgate_ioh, byte,
316 1.3 cgd eb164_intr_mask[byte]);
317 1.1 cgd }
318 1.4 cgd #endif
319