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pci_eb164.c revision 1.13
      1 /* $NetBSD: pci_eb164.c,v 1.13 1998/04/16 19:50:55 thorpej Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
      5  * All rights reserved.
      6  *
      7  * Author: Chris G. Demetriou
      8  *
      9  * Permission to use, copy, modify and distribute this software and
     10  * its documentation is hereby granted, provided that both the copyright
     11  * notice and this permission notice appear in all copies of the
     12  * software, derivative works or modified versions, and any portions
     13  * thereof, and that both notices appear in supporting documentation.
     14  *
     15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  *
     19  * Carnegie Mellon requests users of this software to return to
     20  *
     21  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  *  School of Computer Science
     23  *  Carnegie Mellon University
     24  *  Pittsburgh PA 15213-3890
     25  *
     26  * any improvements or extensions that they make and grant Carnegie the
     27  * rights to redistribute these changes.
     28  */
     29 
     30 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     31 
     32 __KERNEL_RCSID(0, "$NetBSD: pci_eb164.c,v 1.13 1998/04/16 19:50:55 thorpej Exp $");
     33 
     34 #include <sys/types.h>
     35 #include <sys/param.h>
     36 #include <sys/time.h>
     37 #include <sys/systm.h>
     38 #include <sys/errno.h>
     39 #include <sys/malloc.h>
     40 #include <sys/device.h>
     41 #include <sys/syslog.h>
     42 
     43 #include <vm/vm.h>
     44 
     45 #include <machine/autoconf.h>
     46 
     47 #include <dev/pci/pcireg.h>
     48 #include <dev/pci/pcivar.h>
     49 
     50 #include <alpha/pci/ciareg.h>
     51 #include <alpha/pci/ciavar.h>
     52 
     53 #include <alpha/pci/pci_eb164.h>
     54 
     55 #ifndef EVCNT_COUNTERS
     56 #include <machine/intrcnt.h>
     57 #endif
     58 
     59 #include "sio.h"
     60 #if NSIO
     61 #include <alpha/pci/siovar.h>
     62 #endif
     63 
     64 int	dec_eb164_intr_map __P((void *, pcitag_t, int, int,
     65 	    pci_intr_handle_t *));
     66 const char *dec_eb164_intr_string __P((void *, pci_intr_handle_t));
     67 void	*dec_eb164_intr_establish __P((void *, pci_intr_handle_t,
     68 	    int, int (*func)(void *), void *));
     69 void	dec_eb164_intr_disestablish __P((void *, void *));
     70 
     71 #define	EB164_SIO_IRQ	4
     72 #define	EB164_MAX_IRQ	24
     73 #define	PCI_STRAY_MAX	5
     74 
     75 struct alpha_shared_intr *eb164_pci_intr;
     76 #ifdef EVCNT_COUNTERS
     77 struct evcnt eb164_intr_evcnt;
     78 #endif
     79 
     80 bus_space_tag_t eb164_intrgate_iot;
     81 bus_space_handle_t eb164_intrgate_ioh;
     82 
     83 void	eb164_iointr __P((void *framep, unsigned long vec));
     84 extern void	eb164_intr_enable __P((int irq));	/* pci_eb164_intr.S */
     85 extern void	eb164_intr_disable __P((int irq));	/* pci_eb164_intr.S */
     86 
     87 void
     88 pci_eb164_pickintr(ccp)
     89 	struct cia_config *ccp;
     90 {
     91 	bus_space_tag_t iot = &ccp->cc_iot;
     92 	pci_chipset_tag_t pc = &ccp->cc_pc;
     93 	int i;
     94 
     95         pc->pc_intr_v = ccp;
     96         pc->pc_intr_map = dec_eb164_intr_map;
     97         pc->pc_intr_string = dec_eb164_intr_string;
     98         pc->pc_intr_establish = dec_eb164_intr_establish;
     99         pc->pc_intr_disestablish = dec_eb164_intr_disestablish;
    100 
    101 	eb164_intrgate_iot = iot;
    102 	if (bus_space_map(eb164_intrgate_iot, 0x804, 3, 0,
    103 	    &eb164_intrgate_ioh) != 0)
    104 		panic("pci_eb164_pickintr: couldn't map interrupt PLD");
    105 	for (i = 0; i < EB164_MAX_IRQ; i++)
    106 		eb164_intr_disable(i);
    107 
    108 	eb164_pci_intr = alpha_shared_intr_alloc(EB164_MAX_IRQ);
    109 	for (i = 0; i < EB164_MAX_IRQ; i++)
    110 		alpha_shared_intr_set_maxstrays(eb164_pci_intr, i,
    111 			PCI_STRAY_MAX);
    112 
    113 #if NSIO
    114 	sio_intr_setup(pc, iot);
    115 	eb164_intr_enable(EB164_SIO_IRQ);
    116 #endif
    117 
    118 	set_iointr(eb164_iointr);
    119 }
    120 
    121 int
    122 dec_eb164_intr_map(ccv, bustag, buspin, line, ihp)
    123         void *ccv;
    124         pcitag_t bustag;
    125         int buspin, line;
    126         pci_intr_handle_t *ihp;
    127 {
    128 	struct cia_config *ccp = ccv;
    129 	pci_chipset_tag_t pc = &ccp->cc_pc;
    130 	int device;
    131 	int eb164_irq, pinbase, pinoff;
    132 
    133 #ifndef DIAGNOSTIC
    134 	pinbase = pinoff = 0;			/* XXX gcc -Wuninitialized */
    135 #endif
    136 
    137         if (buspin == 0) {
    138                 /* No IRQ used. */
    139                 return 1;
    140         }
    141         if (buspin > 4) {
    142                 printf("dec_eb164_intr_map: bad interrupt pin %d\n", buspin);
    143                 return 1;
    144         }
    145 
    146 	alpha_pci_decompose_tag(pc, bustag, NULL, &device, NULL);
    147 	switch (device) {
    148 	/*
    149 	 * There might be a PCI IDE controller on one of the SIO's
    150 	 * functions, so go ahead and map this interrupt.
    151 	 */
    152 	case 8: 					/* SIO */
    153 		eb164_irq = 4;
    154 		break;
    155 
    156 	case 11:
    157 		eb164_irq = 5;				/* IDE */
    158 		break;
    159 
    160 	case 5:
    161 	case 6:
    162 	case 7:
    163 	case 9:
    164 		switch (buspin) {
    165 		case 1:
    166 			pinbase = 0;
    167 			break;
    168 		case 2:
    169 		case 3:
    170 		case 4:
    171 			pinbase = (buspin * 4) - 1;
    172 			break;
    173 #ifdef DIAGNOSTIC
    174 		default:
    175 			panic("dec_eb164_intr_map: slot buspin switch");
    176 #endif
    177 		};
    178 		switch (device) {
    179 		case 5:
    180 			pinoff = 2;
    181 			break;
    182 
    183 		case 6:
    184 		case 7:
    185 		case 9:
    186 			pinoff = device - 6;
    187 			break;
    188 #ifdef DIAGNOSTIC
    189 		default:
    190 			panic("dec_eb164_intr_map: slot device switch");
    191 #endif
    192 		}
    193 		eb164_irq = pinoff + pinbase;
    194 		break;
    195 	default:
    196 		panic("dec_eb164_intr_map: invalid device number %d\n",
    197 		    device);
    198 	}
    199 
    200 	if (eb164_irq > EB164_MAX_IRQ)
    201 		panic("dec_eb164_intr_map: eb164_irq too large (%d)\n",
    202 		    eb164_irq);
    203 
    204 	*ihp = eb164_irq;
    205 	return (0);
    206 }
    207 
    208 const char *
    209 dec_eb164_intr_string(ccv, ih)
    210 	void *ccv;
    211 	pci_intr_handle_t ih;
    212 {
    213 #if 0
    214 	struct cia_config *ccp = ccv;
    215 #endif
    216         static char irqstr[15];          /* 11 + 2 + NULL + sanity */
    217 
    218         if (ih > EB164_MAX_IRQ)
    219                 panic("dec_eb164_intr_string: bogus eb164 IRQ 0x%x\n", ih);
    220         sprintf(irqstr, "eb164 irq %d", ih);
    221         return (irqstr);
    222 }
    223 
    224 void *
    225 dec_eb164_intr_establish(ccv, ih, level, func, arg)
    226         void *ccv, *arg;
    227         pci_intr_handle_t ih;
    228         int level;
    229         int (*func) __P((void *));
    230 {
    231 #if 0
    232 	struct cia_config *ccp = ccv;
    233 #endif
    234 	void *cookie;
    235 
    236 	if (ih > EB164_MAX_IRQ)
    237 		panic("dec_eb164_intr_establish: bogus eb164 IRQ 0x%x\n", ih);
    238 
    239 	cookie = alpha_shared_intr_establish(eb164_pci_intr, ih, IST_LEVEL,
    240 	    level, func, arg, "eb164 irq");
    241 
    242 	if (cookie != NULL && alpha_shared_intr_isactive(eb164_pci_intr, ih))
    243 		eb164_intr_enable(ih);
    244 	return (cookie);
    245 }
    246 
    247 void
    248 dec_eb164_intr_disestablish(ccv, cookie)
    249         void *ccv, *cookie;
    250 {
    251 #if 0
    252 	struct cia_config *ccp = ccv;
    253 #endif
    254 
    255 	panic("dec_eb164_intr_disestablish not implemented"); /* XXX */
    256 }
    257 
    258 void
    259 eb164_iointr(framep, vec)
    260 	void *framep;
    261 	unsigned long vec;
    262 {
    263 	int irq;
    264 
    265 	if (vec >= 0x900) {
    266 		if (vec >= 0x900 + (EB164_MAX_IRQ << 4))
    267 			panic("eb164_iointr: vec 0x%x out of range\n", vec);
    268 		irq = (vec - 0x900) >> 4;
    269 
    270 #ifdef EVCNT_COUNTERS
    271 		eb164_intr_evcnt.ev_count++;
    272 #else
    273 		if (EB164_MAX_IRQ != INTRCNT_EB164_IRQ_LEN)
    274 			panic("eb164 interrupt counter sizes inconsistent");
    275 		intrcnt[INTRCNT_EB164_IRQ + irq]++;
    276 #endif
    277 
    278 		if (!alpha_shared_intr_dispatch(eb164_pci_intr, irq)) {
    279 			alpha_shared_intr_stray(eb164_pci_intr, irq,
    280 			    "eb164 irq");
    281 			if (eb164_pci_intr[irq].intr_nstrays ==
    282 			    eb164_pci_intr[irq].intr_maxstrays)
    283 				eb164_intr_disable(irq);
    284 		}
    285 		return;
    286 	}
    287 #if NSIO
    288 	if (vec >= 0x800) {
    289 		sio_iointr(framep, vec);
    290 		return;
    291 	}
    292 #endif
    293 	panic("eb164_iointr: weird vec 0x%x\n", vec);
    294 }
    295 
    296 #if 0		/* THIS DOES NOT WORK!  see pci_eb164_intr.S. */
    297 u_int8_t eb164_intr_mask[3] = { 0xff, 0xff, 0xff };
    298 
    299 void
    300 eb164_intr_enable(irq)
    301 	int irq;
    302 {
    303 	int byte = (irq / 8), bit = (irq % 8);
    304 
    305 #if 1
    306 	printf("eb164_intr_enable: enabling %d (%d:%d)\n", irq, byte, bit);
    307 #endif
    308 	eb164_intr_mask[byte] &= ~(1 << bit);
    309 
    310 	bus_space_write_1(eb164_intrgate_iot, eb164_intrgate_ioh, byte,
    311 	    eb164_intr_mask[byte]);
    312 }
    313 
    314 void
    315 eb164_intr_disable(irq)
    316 	int irq;
    317 {
    318 	int byte = (irq / 8), bit = (irq % 8);
    319 
    320 #if 1
    321 	printf("eb164_intr_disable: disabling %d (%d:%d)\n", irq, byte, bit);
    322 #endif
    323 	eb164_intr_mask[byte] |= (1 << bit);
    324 
    325 	bus_space_write_1(eb164_intrgate_iot, eb164_intrgate_ioh, byte,
    326 	    eb164_intr_mask[byte]);
    327 }
    328 #endif
    329