pci_eb164.c revision 1.14
1 /* $NetBSD: pci_eb164.c,v 1.14 1998/04/18 01:18:37 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 42 * All rights reserved. 43 * 44 * Author: Chris G. Demetriou 45 * 46 * Permission to use, copy, modify and distribute this software and 47 * its documentation is hereby granted, provided that both the copyright 48 * notice and this permission notice appear in all copies of the 49 * software, derivative works or modified versions, and any portions 50 * thereof, and that both notices appear in supporting documentation. 51 * 52 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 53 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 54 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 55 * 56 * Carnegie Mellon requests users of this software to return to 57 * 58 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 59 * School of Computer Science 60 * Carnegie Mellon University 61 * Pittsburgh PA 15213-3890 62 * 63 * any improvements or extensions that they make and grant Carnegie the 64 * rights to redistribute these changes. 65 */ 66 67 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 68 69 __KERNEL_RCSID(0, "$NetBSD: pci_eb164.c,v 1.14 1998/04/18 01:18:37 thorpej Exp $"); 70 71 #include <sys/types.h> 72 #include <sys/param.h> 73 #include <sys/time.h> 74 #include <sys/systm.h> 75 #include <sys/errno.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/syslog.h> 79 80 #include <vm/vm.h> 81 82 #include <machine/autoconf.h> 83 84 #include <dev/pci/pcireg.h> 85 #include <dev/pci/pcivar.h> 86 #include <dev/pci/pciidereg.h> 87 #include <dev/pci/pciidevar.h> 88 89 #include <alpha/pci/ciareg.h> 90 #include <alpha/pci/ciavar.h> 91 92 #include <alpha/pci/pci_eb164.h> 93 94 #ifndef EVCNT_COUNTERS 95 #include <machine/intrcnt.h> 96 #endif 97 98 #include "sio.h" 99 #if NSIO 100 #include <alpha/pci/siovar.h> 101 #endif 102 103 int dec_eb164_intr_map __P((void *, pcitag_t, int, int, 104 pci_intr_handle_t *)); 105 const char *dec_eb164_intr_string __P((void *, pci_intr_handle_t)); 106 void *dec_eb164_intr_establish __P((void *, pci_intr_handle_t, 107 int, int (*func)(void *), void *)); 108 void dec_eb164_intr_disestablish __P((void *, void *)); 109 110 void *dec_eb164_pciide_compat_intr_establish __P((void *, struct device *, 111 struct pci_attach_args *, int, int (*)(void *), void *)); 112 113 #define EB164_SIO_IRQ 4 114 #define EB164_MAX_IRQ 24 115 #define PCI_STRAY_MAX 5 116 117 struct alpha_shared_intr *eb164_pci_intr; 118 #ifdef EVCNT_COUNTERS 119 struct evcnt eb164_intr_evcnt; 120 #endif 121 122 bus_space_tag_t eb164_intrgate_iot; 123 bus_space_handle_t eb164_intrgate_ioh; 124 125 void eb164_iointr __P((void *framep, unsigned long vec)); 126 extern void eb164_intr_enable __P((int irq)); /* pci_eb164_intr.S */ 127 extern void eb164_intr_disable __P((int irq)); /* pci_eb164_intr.S */ 128 129 void 130 pci_eb164_pickintr(ccp) 131 struct cia_config *ccp; 132 { 133 bus_space_tag_t iot = &ccp->cc_iot; 134 pci_chipset_tag_t pc = &ccp->cc_pc; 135 int i; 136 137 pc->pc_intr_v = ccp; 138 pc->pc_intr_map = dec_eb164_intr_map; 139 pc->pc_intr_string = dec_eb164_intr_string; 140 pc->pc_intr_establish = dec_eb164_intr_establish; 141 pc->pc_intr_disestablish = dec_eb164_intr_disestablish; 142 143 pc->pc_pciide_compat_intr_establish = 144 dec_eb164_pciide_compat_intr_establish; 145 146 eb164_intrgate_iot = iot; 147 if (bus_space_map(eb164_intrgate_iot, 0x804, 3, 0, 148 &eb164_intrgate_ioh) != 0) 149 panic("pci_eb164_pickintr: couldn't map interrupt PLD"); 150 for (i = 0; i < EB164_MAX_IRQ; i++) 151 eb164_intr_disable(i); 152 153 eb164_pci_intr = alpha_shared_intr_alloc(EB164_MAX_IRQ); 154 for (i = 0; i < EB164_MAX_IRQ; i++) 155 alpha_shared_intr_set_maxstrays(eb164_pci_intr, i, 156 PCI_STRAY_MAX); 157 158 #if NSIO 159 sio_intr_setup(pc, iot); 160 eb164_intr_enable(EB164_SIO_IRQ); 161 #endif 162 163 set_iointr(eb164_iointr); 164 } 165 166 int 167 dec_eb164_intr_map(ccv, bustag, buspin, line, ihp) 168 void *ccv; 169 pcitag_t bustag; 170 int buspin, line; 171 pci_intr_handle_t *ihp; 172 { 173 struct cia_config *ccp = ccv; 174 pci_chipset_tag_t pc = &ccp->cc_pc; 175 int device; 176 int eb164_irq, pinbase, pinoff; 177 178 #ifndef DIAGNOSTIC 179 pinbase = pinoff = 0; /* XXX gcc -Wuninitialized */ 180 #endif 181 182 if (buspin == 0) { 183 /* No IRQ used. */ 184 return 1; 185 } 186 if (buspin > 4) { 187 printf("dec_eb164_intr_map: bad interrupt pin %d\n", buspin); 188 return 1; 189 } 190 191 alpha_pci_decompose_tag(pc, bustag, NULL, &device, NULL); 192 switch (device) { 193 /* 194 * There might be a PCI IDE controller on one of the SIO's 195 * functions, so go ahead and map this interrupt. 196 */ 197 case 8: /* SIO */ 198 eb164_irq = 4; 199 break; 200 201 case 11: 202 eb164_irq = 5; /* IDE */ 203 break; 204 205 case 5: 206 case 6: 207 case 7: 208 case 9: 209 switch (buspin) { 210 case 1: 211 pinbase = 0; 212 break; 213 case 2: 214 case 3: 215 case 4: 216 pinbase = (buspin * 4) - 1; 217 break; 218 #ifdef DIAGNOSTIC 219 default: 220 panic("dec_eb164_intr_map: slot buspin switch"); 221 #endif 222 }; 223 switch (device) { 224 case 5: 225 pinoff = 2; 226 break; 227 228 case 6: 229 case 7: 230 case 9: 231 pinoff = device - 6; 232 break; 233 #ifdef DIAGNOSTIC 234 default: 235 panic("dec_eb164_intr_map: slot device switch"); 236 #endif 237 } 238 eb164_irq = pinoff + pinbase; 239 break; 240 default: 241 panic("dec_eb164_intr_map: invalid device number %d\n", 242 device); 243 } 244 245 if (eb164_irq > EB164_MAX_IRQ) 246 panic("dec_eb164_intr_map: eb164_irq too large (%d)\n", 247 eb164_irq); 248 249 *ihp = eb164_irq; 250 return (0); 251 } 252 253 const char * 254 dec_eb164_intr_string(ccv, ih) 255 void *ccv; 256 pci_intr_handle_t ih; 257 { 258 #if 0 259 struct cia_config *ccp = ccv; 260 #endif 261 static char irqstr[15]; /* 11 + 2 + NULL + sanity */ 262 263 if (ih > EB164_MAX_IRQ) 264 panic("dec_eb164_intr_string: bogus eb164 IRQ 0x%x\n", ih); 265 sprintf(irqstr, "eb164 irq %d", ih); 266 return (irqstr); 267 } 268 269 void * 270 dec_eb164_intr_establish(ccv, ih, level, func, arg) 271 void *ccv, *arg; 272 pci_intr_handle_t ih; 273 int level; 274 int (*func) __P((void *)); 275 { 276 #if 0 277 struct cia_config *ccp = ccv; 278 #endif 279 void *cookie; 280 281 if (ih > EB164_MAX_IRQ) 282 panic("dec_eb164_intr_establish: bogus eb164 IRQ 0x%x\n", ih); 283 284 cookie = alpha_shared_intr_establish(eb164_pci_intr, ih, IST_LEVEL, 285 level, func, arg, "eb164 irq"); 286 287 if (cookie != NULL && alpha_shared_intr_isactive(eb164_pci_intr, ih)) 288 eb164_intr_enable(ih); 289 return (cookie); 290 } 291 292 void 293 dec_eb164_intr_disestablish(ccv, cookie) 294 void *ccv, *cookie; 295 { 296 #if 0 297 struct cia_config *ccp = ccv; 298 #endif 299 300 panic("dec_eb164_intr_disestablish not implemented"); /* XXX */ 301 } 302 303 void * 304 dec_eb164_pciide_compat_intr_establish(v, dev, pa, chan, func, arg) 305 void *v; 306 struct device *dev; 307 struct pci_attach_args *pa; 308 int chan; 309 int (*func) __P((void *)); 310 void *arg; 311 { 312 pci_chipset_tag_t pc = pa->pa_pc; 313 void *cookie = NULL; 314 int bus, irq; 315 316 alpha_pci_decompose_tag(pc, pa->pa_tag, &bus, NULL, NULL); 317 318 /* 319 * If this isn't PCI bus #0, all bets are off. 320 */ 321 if (bus != 0) 322 return (NULL); 323 324 irq = PCIIDE_COMPAT_IRQ(chan); 325 #if NSIO 326 cookie = sio_intr_establish(NULL /*XXX*/, irq, IST_EDGE, IPL_BIO, 327 func, arg); 328 #endif 329 return (cookie); 330 } 331 332 void 333 eb164_iointr(framep, vec) 334 void *framep; 335 unsigned long vec; 336 { 337 int irq; 338 339 if (vec >= 0x900) { 340 if (vec >= 0x900 + (EB164_MAX_IRQ << 4)) 341 panic("eb164_iointr: vec 0x%x out of range\n", vec); 342 irq = (vec - 0x900) >> 4; 343 344 #ifdef EVCNT_COUNTERS 345 eb164_intr_evcnt.ev_count++; 346 #else 347 if (EB164_MAX_IRQ != INTRCNT_EB164_IRQ_LEN) 348 panic("eb164 interrupt counter sizes inconsistent"); 349 intrcnt[INTRCNT_EB164_IRQ + irq]++; 350 #endif 351 352 if (!alpha_shared_intr_dispatch(eb164_pci_intr, irq)) { 353 alpha_shared_intr_stray(eb164_pci_intr, irq, 354 "eb164 irq"); 355 if (eb164_pci_intr[irq].intr_nstrays == 356 eb164_pci_intr[irq].intr_maxstrays) 357 eb164_intr_disable(irq); 358 } 359 return; 360 } 361 #if NSIO 362 if (vec >= 0x800) { 363 sio_iointr(framep, vec); 364 return; 365 } 366 #endif 367 panic("eb164_iointr: weird vec 0x%x\n", vec); 368 } 369 370 #if 0 /* THIS DOES NOT WORK! see pci_eb164_intr.S. */ 371 u_int8_t eb164_intr_mask[3] = { 0xff, 0xff, 0xff }; 372 373 void 374 eb164_intr_enable(irq) 375 int irq; 376 { 377 int byte = (irq / 8), bit = (irq % 8); 378 379 #if 1 380 printf("eb164_intr_enable: enabling %d (%d:%d)\n", irq, byte, bit); 381 #endif 382 eb164_intr_mask[byte] &= ~(1 << bit); 383 384 bus_space_write_1(eb164_intrgate_iot, eb164_intrgate_ioh, byte, 385 eb164_intr_mask[byte]); 386 } 387 388 void 389 eb164_intr_disable(irq) 390 int irq; 391 { 392 int byte = (irq / 8), bit = (irq % 8); 393 394 #if 1 395 printf("eb164_intr_disable: disabling %d (%d:%d)\n", irq, byte, bit); 396 #endif 397 eb164_intr_mask[byte] |= (1 << bit); 398 399 bus_space_write_1(eb164_intrgate_iot, eb164_intrgate_ioh, byte, 400 eb164_intr_mask[byte]); 401 } 402 #endif 403
Indexes created Sun Sep 28 16:09:52 GMT 2025